Previously, the callback was incorrectly passed a channel of zero as
argument regardless of the channel that triggered the IRQ. This fixes
the issue and also uses `bitarithm_test_and_clear()` to only iterate
over the channels that actually have an IRQ flag set, rather than
all channels.
The linter was unhappy that `unsinged long` and `uint32_t` were used
inconsistency (in the `timer_init()` declaration, implementation, as
well as in the `DEBUG()` format specifiers).
Allow two threads to share the same timer - provided they use distinct
sets of timer channels - without occasionally corrupting registers or
state flags.
rtc_set_alarm() / rtt_set_alarm() are heavily used by ztimer during ISR. This will reduce time spent during ISR drastically. We trust that the peripheral is able to propagate the alarm asynchronously.
These models have 256 kByte RAM, but the upper 64 kByte are used as CCM data RAM accessible at 0x1000:0000. The access to 0x2003:xxxx leads to a hard fault.
Due to the RIOT_EPOCH of 2020 this overflow will happen in year 2084. It would be scary if IoT devices are still around then.
We can save RAM and ROM. Furthermore, this overflow handling should block BACKUP power mode in order to keep track of the reference year.
There are STM32 families where all models use only the Synopsys DWC2 USB OTG core while others completely use only the USB Device FS core. For these families then either the driver `drivers/usbdev_synopsys_dwc2` or the driver `cpu/stm32/periph/usbdev` is used depending on the respective family. However, the STM32 families F1 and L4 use both cores. The correct driver must therefore be selected depending on the CPU line or CPU model.
This splits up the clock configs.
It allows CPU_FAM based file sourcing and also common CPU_FAMs.
The dependancies are also included in wildcards would be used for the CPU_FAM macro.
This should be much more readable.
This also takes into account the HSE speeds in order to match the make/header resolution.
Some hidden symbols were added to make sorting many CPU_SERIES dependencies easier.
Make sure the STATUS register has been synced between the different clock domains.
Especially the LETIMER needs some time to update the STATUS register after it has been enabled. If the LETIMER is started and stopped with just a short delay, pm_layered gets confused because the timer seems to be inactive ...
This allows boards to define different crystal frequencies. The correct frequency is required by the system-related methods to ensure proper function of the underlying emlib.
As implmented, dma_resume assumed that transfers widths were 1 byte and
that the memory address incrmenting was always on and periphial address
incrementing always off. This resulted in memory corruption anytime
these assumptions were not true and a dma was resumed. The DMA module
allows intitiating transfers that did not meet these assumption.
This patch adds proper handling inside dma_resume to safely resume any
transfer. Clearifications and errors are added/fixed in the module's
header file. Also, a few constants are removed from the gobal namespace.
As it was, the calculation of DMA2's IRQ number was inccrorect for some
STM families. The implmentation alocates streams numbers 0 to 7 for the
first DMA controller and 8 and up for the second DMA controller. This
offset of +8 was not accounted for when IRQ's of the second DMA
controller was calculated. This patch corrects this.
Use `DWC2_USB_OTG_FS_TOTAL_FIFO_SIZE` instead of `USB_OTG_FS_TOTAL_FIFO_SIZE` since the latter is only defined in the vendor headers for STM32 MCUs. The STM32-specific problem that `USB_OTG_FS_TOTAL_FIFO_SIZE` is not defined in the vendor headers for all STM32 families has therefore been moved from the driver to the STM32-specific USB device header.
The `usbdev_synopsys_dwc2 driver` requires the `ztimer_msec` module and is therefore responsible for pulling it in. Therefore, the dependency on `ztimer_msec` can be removed here.
`thread_stack_init()` didn't correctly set up the stack alignment.
This fixes the issue and brings the function closer to the Cortex M
version, laying the groundwork for future code duplication.
This fixes https://github.com/RIOT-OS/RIOT/issues/11885
There are two schemes for accessing the packet buffer area (PMA) from the CPU:
- 2 x 16 bit/word access scheme where two 16-bit half-words per word can be accessed. With this scheme the access can be half-word aligned and the PMA address offset corresponds therefore to the local USB IP address. The size of the PMA SRAM is usually 1024 byte.
- 1 x 16 bit/word access scheme where one 16-bit half word per word can be accessed. With this scheme the access can only be word-aligned and the PMA address offset to a half-word is therefore twice the local USB IP address. The size of the PMA SRAM is usually 512 byte.
Which access scheme is used depends on the STM32 model.
The addressing of the Packet buffer Memory Area (PMA) is done locally in the USB IP core in half-words with 16-bit. The `_ep_in_buf` and `_ep_out_buf` arrays which hold these USB IP local addresses in the PMA for initialized EPs therefore always use `uint16_t`.
If the MCU does not have an internal D+ pullup and there is no dedicated GPIO to simulate a USB disconnect, the D+ GPIO is temporarily configured as an output and pushed down to simulate a disconnect/connect cycle to allow the host to recognize the device. However, this requires an external pullup on D+ signal to work
If `RCC_CFGR_USBPRE` is defined, the USB device FS clock of 48 MHz is derived from the PLL clock. In this case the PLL clock must be configured and must be either 48 MHz or 72 MHz. If the PLL clock is 72 MHz it is pre-divided by 1.5, the PLL clock of 48 MHz is used directly.
The definition in `pkg/esp32_sdk/Makefile.include` was evaluated by
`make` after the include paths were already set, resulting in
`ESP32_SDK_DIR` being empty in
INCLUDES += -I$(ESP32_SDK_DIR)/components
[...]
This in turn resulted in
cc1: error: /components: No such file or directory [-Werror=missing-include-dirs]
[...]
The parameters for parity and stop bits was confused, resulting in
the following compilation error with GCC 12.2.0:
/home/maribu/Repos/software/RIOT/cpu/esp_common/periph/uart.c: In function '_uart_config':
/home/maribu/Repos/software/RIOT/cpu/esp_common/periph/uart.c:394:61: error: implicit conversion from 'uart_stop_bits_t' to 'uart_parity_t' -Werror=enum-conversion]
394 | if (_uart_set_mode(uart, _uarts[uart].data, _uarts[uart].stop,
| ~~~~~~~~~~~~^~~~~
/home/maribu/Repos/software/RIOT/cpu/esp_common/periph/uart.c:395:42: error: implicit conversion from 'uart_parity_t' to 'uart_stop_bits_t' -Werror=enum-conversion]
395 | _uarts[uart].parity) != UART_OK) {
| ~~~~~~~~~~~~^~~~~~~
cc1: all warnings being treated as errors
This swaps the parameters.
For a number of STM32 MCUs with the USB-FS device interface the signals USB_DP and USB_DM are not defined as GPIO alternative function but as additional function. Additional functions are directly selected/enabled through peripheral registers hand have not to be configured. In this case, the configuration defines GIO_AF_UNDEF as alternative function.
This file is an excerpt of STM32 header file `stm32/smsis/f7/include/stm32f767xx.h` since the ESP32x SoCs use the same Synopsys DWC2 IP core as USB peripherals.
Since `esp_can.h` is included by main `cpu/esp32/include/periph_cpu.h` after the include of the specific `periph_cpu_$(CPU_FAM)`, it is not necessary to include `esp_can.h` in each specific `periph_cpu_$(CPU_FAM)`.
Makefiles don't do comments, so these were forwarded into the variable.
*Most* users would expand the arguments to a shell where it'd be
ignored, but not all of them.
Contributes-To: https://github.com/RIOT-OS/RIOT/pull/18489
(This is also where the one version that is added here was removed).
Due to the lack of new official avr-libc releases (which includes the
vendor header files needed to support different version of MCUs),
support for new MCUs was lacking. Distributions such as Debian addressed
this by extending the upstream code with vendor header files directly
obtained from Atmel / Microchip, but without paying attention to
details. As such, a naming inconsistency (ASIZE vs ASPACE) between
officially supported MCUs and new MCUs was introduced.
Now that avr-libc 2.1.0 is officially released, hardware support for new
MCUs is provided by upstream out of the box and only ASIZE is used as
name. This commit adds a bit of glue code to create aliases for ASIZE on
older avr-libc versions where needed. This fixes compilation with the
new avr-libc release and results in more consistent code.
- most were trivial
- missing group close or open
- extra space
- no doxygen comment
- name commad might open an implicit group
this hould also be implicit cosed but does not happen somtimes
- crazy: internal declared groups have to be closed internal
Add tracing support via GPIOs to trace the basic state of the Ethernet
peripheral. The following signals are provided:
- One GPIO pin is toggled on entry of the Ethernet ISR
- On TX start an GPIO is set, on TX completion it is cleared
- On RX complete an GPIO is set, once this is passed to the upper layer
the GPIO is cleared again
In order to reduce the overhead, GPIO LL is used. By default the
on-board LEDs are used as tracing GPIOs. This makes it easy to debug
when the state machine gets stuck without the need to attach a scope or
logic analyzer.
If module `core_mutex_priority_inheritance` is enabled, the scheduling has to be active to lock/unlock the mutex/rmutex used by FreeRTOS semaphores. If scheduling is not active FreeRTOS semaphore function always succeed.
For ESP32x, the operations on recursive locking variables have to be guarded by disabling interrupts to prevent unintended context switches. For ESP8266, interrupts must not be disabled, otherwise the intended context switch doesn't work when trying to lock a rmutex that is already locked by another thread.
Dynamic allocation and initialization of the mutex used by a newlib locking variable must not be interrupted. Since a thread context switch can occur on exit from an ISR, the allocation and initialization of the mutex must be guarded by disabling interrupts. The same must be done for the release of such a locking variable.
With the improvements of the locking mechanism, thread safety of malloc/realloc/calloc/free is guaranteed. Module malloc_thread_safe is not needed any longer.
When FreeRTOS semaphores, as required by ESP-IDF, are used together with `gnrc_netif`, RIOT may crash if `STATUS_RECEIVE_BLOCKED` is used as a blocking mechanism in the FreeRTOS adaptation layer. The reason for this is that `gnrc_netif` uses thread flags since PR #16748. If the `gnrc_netif` thread is blocked because of a FreeRTOS semaphore, and is thus in `STATUS_RECEIVE_BLOCKED` state, the `_msg_send` function will cause a crash because it then assumes that `target->wait_data` contains a pointer to a message of type `msg_t`, but by using thread flags it contains the flag mask. This situation can happen if the ESP hardware is used while another thread is sending something timer controlled to the `gnrc_netif` thread.
To solve this problem `STATUS_MUTEX_LOCKED` is used instead of `STATUS_RECEIVE_BLOCKED` and `STATUS_SEND_BLOCKED`
To reduce the required RAM in default configuration, the BLE interface is used as netdev_default instead of ESP-NOW. Further network interfaces can be enabled with the modules `esp_now`, `esp_wifi` or `esp_eth`.
When using Bluetooth LE, the former UART interrupt number 5 is occupied by the ESP32 Bluetooth Controller. Therefore, another interrupt number has to be used for UART.
The package uses the nRFx SDK package `nrfx`. In addition, the `mynewt-nimble` repository contains some files (`porting/nimble/src/hal_timer.c` and `porting/npl/riot/src/nrf5x_isr.c`) that are compilable only for nRF MCUs. To allow the compilation for other platforms, the use of the `nrfx` package and the compilation of these files are now dependent on the use of any nRF5x MCU.
