RIOT-OS/RIOT
RIOT-OS/RIOT
1
0
Fork 0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00
Code Releases Activity

cpu/efm32/gpio: block power modes if IRQs are enabled

Browse Source
This commit is contained in:
Jue 2022-10-17 23:02:45 +02:00
parent f6016d3999
commit 68625e5aa9
1 changed files with 27 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
cpu/efm32/periph/gpio.c
View File

@ -22,8 +22,10 @@
*/
#include "cpu.h"
#include "board.h"
#include "periph/gpio.h"
#include "pm_layered.h"
#include "em_gpio.h"
@ -115,7 +117,7 @@ int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
}
/* just in case, disable the interrupt for this pin */
GPIO_IntDisable(_pin_mask(pin));
gpio_irq_disable(pin);
/* store interrupt callback */
isr_ctx[_pin_num(pin)].cb = cb;
@ -123,7 +125,7 @@ int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
/* enable interrupts */
GPIO_ExtIntConfig(_port_num(pin), _pin_num(pin), _pin_num(pin),
flank & GPIO_RISING, flank & GPIO_FALLING, true);
flank & GPIO_RISING, flank & GPIO_FALLING, false);
NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn);
NVIC_ClearPendingIRQ(GPIO_ODD_IRQn);
@ -131,17 +133,38 @@ int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
NVIC_EnableIRQ(GPIO_EVEN_IRQn);
NVIC_EnableIRQ(GPIO_ODD_IRQn);
/* enable IRQ */
gpio_irq_enable(pin);
return 0;
}
void gpio_irq_enable(gpio_t pin)
{
GPIO_IntEnable(_pin_mask(pin));
unsigned pin_extirq = _pin_mask(pin);
#if IS_ACTIVE(MODULE_PM_LAYERED) && defined(GPIO_INT_PM_BLOCKER)
/* block pm mode if the irq is about to be enabled */
if (!(GPIO_EnabledIntGet() & pin_extirq)) {
pm_block(GPIO_INT_PM_BLOCKER);
}
#endif
GPIO_IntEnable(pin_extirq);
}
void gpio_irq_disable(gpio_t pin)
{
GPIO_IntDisable(_pin_mask(pin));
unsigned pin_extirq = _pin_mask(pin);
#if IS_ACTIVE(MODULE_PM_LAYERED) && defined(GPIO_INT_PM_BLOCKER)
/* unblock pm mode if the irq is about to be disabled */
if (GPIO_EnabledIntGet() & pin_extirq) {
pm_unblock(GPIO_INT_PM_BLOCKER);
}
#endif
GPIO_IntDisable(pin_extirq);
}
/**