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Merge pull request #18933 from jue89/feature/cpu_efm32_series_2_adc
cpu/efm32: add periph_adc support for Gecko Series 2
This commit is contained in:
Juergen Fitschen
GitHub
commit
a6ff838a4b
@ -13,6 +13,7 @@ config BOARD_XG23_PK6068A
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select CPU_MODEL_EFR32ZG23A020F512GM48
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# Put defined MCU peripherals here (in alphabetical order)
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select HAS_PERIPH_ADC
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select HAS_PERIPH_I2C
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select HAS_PERIPH_SPI
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select HAS_PERIPH_TIMER
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@ -3,6 +3,7 @@ CPU_FAM = efr32zg23
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CPU_MODEL = efr32zg23a020f512gm48
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_adc
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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@ -67,6 +67,8 @@ PIN 1 is the bottom-left contact when the header faces you horizontally.
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| Timer | 0 | TIMER0 | | Default ztimer backend | EM1 |
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| | 1 | LETIMER0 | | | EM3 |
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| UART | 0 | EUSART1 | RX: PA9, TX: PA8 | Default STDIO output | EM1 |
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| ADC_LINE | 0 | IADC0 | IN+: PA10, IN-: GND | Single-ended, V_ref: 2 * 1.21V | EM1 |
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| | 1 | IADC0 | IN+: PA0, IN-:PA5 | Differential, V_ref: 2 * 1.21V | EM1 |
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### User interface
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| Peripheral | Mapped to | Pin | Comments |
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@ -55,6 +55,38 @@ static const clk_div_t clk_div_config[] = {
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#define CLK_DIV_NUMOF ARRAY_SIZE(clk_div_config)
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/** @} */
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/**
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* @name ADC configuration
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* @{
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*/
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static const adc_conf_t adc_config[] = {
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{
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.dev = IADC0,
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.cmu = cmuClock_IADC0,
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.reference = iadcCfgReferenceInt1V2,
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.reference_mV = 1210,
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.gain = iadcCfgAnalogGain0P5x,
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.available_res = { ADC_RES_10BIT, ADC_RES_16BIT }
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}
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};
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static const adc_chan_conf_t adc_channel_config[] = {
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{
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.dev = 0,
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.input_pos = GPIO_PIN(PA, 10),
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.input_neg = GPIO_UNDEF
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},
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{
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.dev = 0,
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.input_pos = GPIO_PIN(PA, 0),
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.input_neg = GPIO_PIN(PA, 5)
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},
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};
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#define ADC_DEV_NUMOF ARRAY_SIZE(adc_config)
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#define ADC_NUMOF ARRAY_SIZE(adc_channel_config)
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/** @} */
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/**
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* @name I2C configuration
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* @{
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@ -25,7 +25,11 @@
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#include "cpu_conf.h"
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#if defined(_SILICON_LABS_32B_SERIES_2)
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#include "em_iadc.h"
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#else
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#include "em_adc.h"
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#endif
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#include "em_cmu.h"
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#include "em_device.h"
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#include "em_gpio.h"
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@ -57,57 +61,6 @@ typedef struct {
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CMU_ClkDiv_TypeDef div; /**< Divisor */
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} clk_div_t;
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#if (defined(ADC_COUNT) && (ADC_COUNT > 0)) || defined(DOXYGEN)
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/**
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* @brief Internal macro for combining ADC resolution (x) with number of
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* shifts (y).
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*/
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#define ADC_MODE(x, y) ((y << 4) | x)
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/**
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* @brief Internal define to note that resolution is not supported.
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*/
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#define ADC_MODE_UNDEF(x) (ADC_MODE(x, 15))
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#ifndef DOXYGEN
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/**
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* @brief Possible ADC resolution settings
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* @{
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*/
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#define HAVE_ADC_RES_T
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typedef enum {
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ADC_RES_6BIT = ADC_MODE(adcRes6Bit, 0), /**< ADC resolution: 6 bit */
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ADC_RES_8BIT = ADC_MODE(adcRes8Bit, 0), /**< ADC resolution: 8 bit */
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ADC_RES_10BIT = ADC_MODE(adcRes12Bit, 2), /**< ADC resolution: 10 bit (shifted from 12 bit) */
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ADC_RES_12BIT = ADC_MODE(adcRes12Bit, 0), /**< ADC resolution: 12 bit */
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ADC_RES_14BIT = ADC_MODE_UNDEF(0), /**< ADC resolution: 14 bit (unsupported) */
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ADC_RES_16BIT = ADC_MODE_UNDEF(1), /**< ADC resolution: 16 bit (unsupported) */
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} adc_res_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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/**
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* @brief ADC device configuration
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*/
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typedef struct {
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ADC_TypeDef *dev; /**< ADC device used */
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CMU_Clock_TypeDef cmu; /**< the device CMU channel */
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} adc_conf_t;
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/**
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* @brief ADC channel configuration
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*/
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typedef struct {
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uint8_t dev; /**< device index */
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#if defined(_SILICON_LABS_32B_SERIES_0)
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ADC_SingleInput_TypeDef input; /**< input channel */
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#elif defined(_SILICON_LABS_32B_SERIES_1)
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ADC_PosSel_TypeDef input; /**< input channel */
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#endif
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ADC_Ref_TypeDef reference; /**< channel voltage reference */
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ADC_AcqTime_TypeDef acq_time; /**< channel acquisition time */
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} adc_chan_conf_t;
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#endif
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/**
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* @brief Length of CPU ID in octets.
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@ -245,6 +198,183 @@ typedef enum {
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/** @} */
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#endif /* ndef DOXYGEN */
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#if defined(_SILICON_LABS_32B_SERIES_2)
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/**
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* @brief Internal macro for combining over-sampling rate (osr), digital
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* averaging count (avg) and output resolution (res).
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*
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* @note The efr32xg23 reference manual provides this folumar:
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* res = 11 bit + log_2(osr * avg) bit
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*/
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#if defined(_IADC_CFG_DIGAVG_MASK)
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#define ADC_MODE(osr, avg, res) ((osr << 16) | (avg << 8) | res)
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#else
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#define ADC_MODE(osr, res) ((osr << 16) | res)
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#endif
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/**
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* @brief Internal macro to extract averaging count
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*/
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#define ADC_MODE_OSR(mode) ((mode & 0xff0000) >> 16)
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#if defined(_IADC_CFG_DIGAVG_MASK)
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/**
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* @brief Internal macro to extract over-sampling rate
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*/
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#define ADC_MODE_AVG(mode) ((mode & 0x00ff00) >> 8)
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#endif
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/**
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* @brief Internal macro to extract output resolution
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*/
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#define ADC_MODE_RES(mode) ((mode & 0x0000ff) >> 0)
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/**
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* @brief Possible ADC resolution settings
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* @{
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*/
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#define HAVE_ADC_RES_T
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#if defined(_IADC_CFG_DIGAVG_MASK)
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typedef enum {
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ADC_RES_6BIT = ADC_MODE(iadcCfgOsrHighSpeed2x, iadcDigitalAverage1, 6),
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ADC_RES_8BIT = ADC_MODE(iadcCfgOsrHighSpeed2x, iadcDigitalAverage1, 8),
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ADC_RES_10BIT = ADC_MODE(iadcCfgOsrHighSpeed2x, iadcDigitalAverage1, 10),
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ADC_RES_12BIT = ADC_MODE(iadcCfgOsrHighSpeed2x, iadcDigitalAverage1, 12),
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ADC_RES_14BIT = ADC_MODE(iadcCfgOsrHighSpeed8x, iadcDigitalAverage1, 14),
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ADC_RES_16BIT = ADC_MODE(iadcCfgOsrHighSpeed16x, iadcDigitalAverage2, 16),
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} adc_res_t;
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#else
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typedef enum {
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ADC_RES_6BIT = ADC_MODE(iadcCfgOsrHighSpeed2x, 6),
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ADC_RES_8BIT = ADC_MODE(iadcCfgOsrHighSpeed2x, 8),
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ADC_RES_10BIT = ADC_MODE(iadcCfgOsrHighSpeed2x, 10),
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ADC_RES_12BIT = ADC_MODE(iadcCfgOsrHighSpeed2x, 12),
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ADC_RES_14BIT = ADC_MODE(iadcCfgOsrHighSpeed8x, 14),
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ADC_RES_16BIT = ADC_MODE(iadcCfgOsrHighSpeed32x, 16),
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} adc_res_t;
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#endif
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/**
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* @brief ADC device configuration
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*/
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typedef struct {
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/**
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* IADC device configuration
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*/
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IADC_TypeDef *dev;
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/**
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* CMU gate for the IADC device
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*/
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CMU_Clock_TypeDef cmu;
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/**
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* Voltage reference to use
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*/
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IADC_CfgReference_t reference;
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/**
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* Voltage of the reference in mV
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*
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* @note Required internally for offset correction.
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*/
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uint32_t reference_mV;
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/**
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* Ampilfication of the analog input signal
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*
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* @note The maximum input voltage is
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* \ref adc_conf_t.gain * \ref adc_conf_t.reference_mV
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*/
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IADC_CfgAnalogGain_t gain;
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/**
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* Available resoltions
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*
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* @note Resolutions made available to the applications have to be
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* specified during \ref adc_init. This will configure the IADC
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* accordingly and allows for quick \ref adc_sample calls.
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*/
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adc_res_t available_res[IADC0_CONFIGNUM];
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} adc_conf_t;
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/**
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* @brief ADC channel configuration
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*/
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typedef struct {
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/**
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* \ref adc_conf_t device index
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*/
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uint8_t dev;
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/**
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* Positive analog input
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*/
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gpio_t input_pos;
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/**
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* Negative analog input.
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* Can be set to \ref GPIO_UNDEF for single-ended ADC lines.
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*
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* @note For differential inputs make sure that
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* \ref adc_chan_conf_t.input_pos is an even pin number and
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* \ref adc_chan_conf_t.input_neg is an odd pin number or the other
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* way around.
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*/
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gpio_t input_neg;
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} adc_chan_conf_t;
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#else /* defined(_SILICON_LABS_32B_SERIES_2) */
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/**
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* @brief Internal macro for combining ADC resolution (x) with number of
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* shifts (y).
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*/
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#define ADC_MODE(x, y) ((y << 4) | x)
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/**
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* @brief Internal define to note that resolution is not supported.
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*/
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#define ADC_MODE_UNDEF(x) (ADC_MODE(x, 15))
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#ifndef DOXYGEN
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/**
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* @brief Possible ADC resolution settings
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* @{
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*/
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#define HAVE_ADC_RES_T
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typedef enum {
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ADC_RES_6BIT = ADC_MODE(adcRes6Bit, 0), /**< ADC resolution: 6 bit */
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ADC_RES_8BIT = ADC_MODE(adcRes8Bit, 0), /**< ADC resolution: 8 bit */
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ADC_RES_10BIT = ADC_MODE(adcRes12Bit, 2), /**< ADC resolution: 10 bit (shifted from 12 bit) */
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ADC_RES_12BIT = ADC_MODE(adcRes12Bit, 0), /**< ADC resolution: 12 bit */
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ADC_RES_14BIT = ADC_MODE_UNDEF(0), /**< ADC resolution: 14 bit (unsupported) */
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ADC_RES_16BIT = ADC_MODE_UNDEF(1), /**< ADC resolution: 16 bit (unsupported) */
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} adc_res_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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/**
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* @brief ADC device configuration
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*/
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typedef struct {
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ADC_TypeDef *dev; /**< ADC device used */
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CMU_Clock_TypeDef cmu; /**< the device CMU channel */
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} adc_conf_t;
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/**
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* @brief ADC channel configuration
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*/
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typedef struct {
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uint8_t dev; /**< device index */
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#if defined(_SILICON_LABS_32B_SERIES_0)
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ADC_SingleInput_TypeDef input; /**< input channel */
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#elif defined(_SILICON_LABS_32B_SERIES_1)
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ADC_PosSel_TypeDef input; /**< input channel */
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#endif
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ADC_Ref_TypeDef reference; /**< channel voltage reference */
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ADC_AcqTime_TypeDef acq_time; /**< channel acquisition time */
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} adc_chan_conf_t;
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#endif /* !defined(_SILICON_LABS_32B_SERIES_2) */
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/**
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* @brief Override hardware crypto supported methods.
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* @{
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@ -1,5 +1,14 @@
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include $(RIOTCPU)/efm32/efm32-info.mk
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# Select the correct implementation for `periph_adc`
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ifneq (,$(filter periph_adc,$(USEMODULE)))
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ifeq (2,$(EFM32_SERIES))
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SRC += adc_series2.c
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else
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SRC += adc_series01.c
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endif
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endif
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# Select the correct implementation for `periph_timer`
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ifneq (,$(filter periph_hwrng,$(USEMODULE)))
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ifeq (1,$(EFM32_SERIES))
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148
cpu/efm32/periph/adc_series2.c
Normal file
148
cpu/efm32/periph/adc_series2.c
Normal file
@ -0,0 +1,148 @@
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/*
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* Copyright (C) 2022 SSV Software Systems GmbH
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_efm32
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* @ingroup drivers_periph_adc
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* @{
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*
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* @file
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* @brief Low-level ADC driver implementation
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*
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* @author Juergen Fitschen <me@jue.yt>
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*
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* @}
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*/
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#include <assert.h>
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#include "cpu.h"
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#include "mutex.h"
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#include "periph_conf.h"
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#include "periph/adc.h"
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#include "periph/gpio.h"
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#include "em_cmu.h"
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#include "em_gpio.h"
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#include "em_iadc.h"
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static mutex_t adc_lock[ADC_DEV_NUMOF];
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int adc_init(adc_t line)
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{
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assert(line < ADC_NUMOF);
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uint8_t dev = adc_channel_config[line].dev;
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assert(dev < ADC_DEV_NUMOF);
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/* initialize lock */
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mutex_init(&adc_lock[dev]);
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/* enable clock */
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CMU_ClockEnable(adc_config[dev].cmu, true);
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/* make sure we're in a known state */
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IADC_reset(adc_config[dev].dev);
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/* init IADC periph */
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const IADC_Init_t init = IADC_INIT_DEFAULT;
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IADC_AllConfigs_t configs = { 0 };
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for (size_t i = 0; i < IADC0_CONFIGNUM; i++) {
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configs.configs[i].adcMode = iadcCfgModeNormal;
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configs.configs[i].osrHighSpeed = ADC_MODE_OSR(adc_config[dev].available_res[i]);
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configs.configs[i].digAvg = ADC_MODE_AVG(adc_config[dev].available_res[i]);
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configs.configs[i].analogGain = adc_config[dev].gain;
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configs.configs[i].reference = adc_config[dev].reference;
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configs.configs[i].vRef = adc_config[dev].reference_mV;
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configs.configs[i].twosComplement = iadcCfgTwosCompUnipolar;
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}
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IADC_init(adc_config[dev].dev, &init, &configs);
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return 0;
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}
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static inline GPIO_Port_TypeDef _port_num(gpio_t pin)
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{
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return ((pin & 0xf0) >> 4);
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}
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static inline uint8_t _pin_num(gpio_t pin)
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{
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return (pin & 0x0f);
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}
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static void _setup_abus(gpio_t pin) {
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const uint32_t alloc = GPIO_ABUSALLOC_AEVEN0_ADC0
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| GPIO_ABUSALLOC_AODD0_ADC0;
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switch (_port_num(pin)) {
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case gpioPortA:
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GPIO->ABUSALLOC = alloc;
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break;
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case gpioPortB:
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GPIO->BBUSALLOC = alloc;
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break;
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case gpioPortC:
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case gpioPortD:
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GPIO->CDBUSALLOC = alloc;
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break;
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}
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}
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int32_t adc_sample(adc_t line, adc_res_t res)
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{
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assert(line < ADC_NUMOF);
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uint8_t dev = adc_channel_config[line].dev;
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/* find config to given resolution */
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uint8_t config;
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for (config = 0; config < IADC0_CONFIGNUM; config++) {
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if (adc_config[dev].available_res[config] == res) {
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/* we found the corresponding config */
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break;
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}
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}
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/* unsopported resolution */
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if (config >= IADC0_CONFIGNUM) {
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return -1;
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}
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/* lock device */
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mutex_lock(&adc_lock[dev]);
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/* setup channel and start sampling */
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static const IADC_InitSingle_t init = {
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.alignment = iadcAlignRight20,
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.showId = false,
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.dataValidLevel = iadcFifoCfgDvl4,
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.fifoDmaWakeup = false,
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.triggerSelect = iadcTriggerSelImmediate,
|
||||
.triggerAction = iadcTriggerActionOnce,
|
||||
.start = true
|
||||
};
|
||||
IADC_SingleInput_t input = IADC_SINGLEINPUT_DEFAULT;
|
||||
input.configId = config;
|
||||
input.posInput = IADC_portPinToPosInput(_port_num(adc_channel_config[line].input_pos),
|
||||
_pin_num(adc_channel_config[line].input_pos));
|
||||
_setup_abus(adc_channel_config[line].input_pos);
|
||||
if (adc_channel_config[line].input_neg != GPIO_UNDEF) {
|
||||
input.negInput = IADC_portPinToNegInput(_port_num(adc_channel_config[line].input_neg),
|
||||
_pin_num(adc_channel_config[line].input_neg));
|
||||
_setup_abus(adc_channel_config[line].input_neg);
|
||||
}
|
||||
|
||||
IADC_initSingle(adc_config[dev].dev, &init, &input);
|
||||
|
||||
/* wait for the conservation to provide the result in the fifo */
|
||||
while ((IADC_getStatus(adc_config[dev].dev) & IADC_STATUS_SINGLEFIFODV) == 0) {}
|
||||
uint32_t result = IADC_pullSingleFifoData(adc_config[dev].dev);
|
||||
|
||||
/* unlock device */
|
||||
mutex_unlock(&adc_lock[dev]);
|
||||
|
||||
return result >> (20 - ADC_MODE_RES(res));
|
||||
}
|
||||
4
dist/tools/doccheck/exclude_patterns
vendored
4
dist/tools/doccheck/exclude_patterns
vendored
@ -13133,3 +13133,7 @@ boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member timer_config
|
||||
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member UART_0_ISR_RX \(macro definition\) of file periph_conf\.h is not documented\.
|
||||
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member UART_NUMOF \(macro definition\) of file periph_conf\.h is not documented\.
|
||||
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member uart_config\[\] \(variable\) of file periph_conf\.h is not documented\.
|
||||
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member ADC_DEV_NUMOF \(macro definition\) of file periph_conf\.h is not documented\.
|
||||
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member ADC_NUMOF \(macro definition\) of file periph_conf\.h is not documented\.
|
||||
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member adc_config\[\] \(variable\) of file periph_conf\.h is not documented\.
|
||||
boards/xg23\-pk6068a/include/periph_conf\.h:[0-9]+: warning: Member adc_channel_config\[\] \(variable\) of file periph_conf\.h is not documented\.
|
||||
|
||||
Loading…
Reference in New Issue
Block a user