cpu/esp32: implement periph_spi_reconfigure

cpu/esp32/Kconfig.esp32

@@ -21,6 +21,7 @@ config CPU_FAM_ESP32
     select HAS_PERIPH_GPIO_LL_IRQ
     select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_HIGH
     select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_LOW
+    select HAS_PERIPH_SPI_RECONFIGURE
     select HAS_PUF_SRAM
 
     select PACKAGE_ESP32_SDK if TEST_KCONFIG

cpu/esp32/Kconfig.esp32c3

@@ -22,6 +22,7 @@ config CPU_FAM_ESP32C3
     select HAS_PERIPH_GPIO_LL_IRQ
     select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_HIGH
     select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_LOW
+    select HAS_PERIPH_SPI_RECONFIGURE
     select HAS_PUF_SRAM
 
     select PACKAGE_ESP32_SDK if TEST_KCONFIG

cpu/esp32/Kconfig.esp32s2

@@ -17,6 +17,7 @@ config CPU_FAM_ESP32S2
     select HAS_PERIPH_GPIO_LL_IRQ
     select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_HIGH
     select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_LOW
+    select HAS_PERIPH_SPI_RECONFIGURE
     select HAS_PUF_SRAM
 
     select PACKAGE_ESP32_SDK if TEST_KCONFIG

cpu/esp32/Kconfig.esp32s3

@@ -23,6 +23,7 @@ config CPU_FAM_ESP32S3
     select HAS_PERIPH_GPIO_LL_IRQ
     select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_HIGH
     select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_LOW
+    select HAS_PERIPH_SPI_RECONFIGURE
     select HAS_PUF_SRAM
     select HAS_TINYUSB_DEVICE
 

cpu/esp32/Makefile.features

@@ -21,6 +21,7 @@ FEATURES_PROVIDED += periph_gpio_ll
 FEATURES_PROVIDED += periph_gpio_ll_irq
 FEATURES_PROVIDED += periph_gpio_ll_irq_level_triggered_high
 FEATURES_PROVIDED += periph_gpio_ll_irq_level_triggered_low
+FEATURES_PROVIDED += periph_spi_reconfigure
 FEATURES_PROVIDED += puf_sram
 
 ifeq (xtensa,$(CPU_ARCH))

cpu/esp32/include/esp_idf_api/gpio.h

@@ -21,6 +21,7 @@
 #define ESP_IDF_API_GPIO_H
 
 #include "esp_err.h"
+#include "hal/gpio_types.h"
 
 #ifndef DOXYGEN     /* Hide implementation details from doxygen */
 

cpu/esp32/include/periph_cpu.h

@@ -664,6 +664,16 @@ typedef enum {
     SPI_CLK_10MHZ  = 10000000           /**< drive the SPI bus with 10MHz */
 } spi_clk_t;
 /** @} */
+
+/**
+ * @brief   SPI pin getters
+ * @{
+ */
+#define spi_pin_mosi(dev) spi_config[dev].mosi
+#define spi_pin_miso(dev) spi_config[dev].miso
+#define spi_pin_clk(dev)  spi_config[dev].sck
+/** @} */
+
 #endif /* !DOXYGEN */
 
 /**

cpu/esp32/periph/spi.c

@@ -45,6 +45,7 @@
 #include "soc/rtc.h"
 
 #include "esp_idf_api/periph_ctrl.h"
+#include "esp_idf_api/gpio.h"
 
 #undef MHZ
 #include "macros/units.h"
@@ -72,7 +73,7 @@ static struct _spi_bus_t _spi[] = {
 #ifdef SPI0_CTRL
     {
         .pins_initialized = false,
-        .lock = MUTEX_INIT,
+        .lock = MUTEX_INIT_LOCKED,
         .hostid = spi_config[0].ctrl,
         .periph = &spi_periph_signal[spi_config[0].ctrl],
         .clk_last = 0,
@@ -82,7 +83,7 @@ static struct _spi_bus_t _spi[] = {
 #ifdef SPI1_CTRL
     {
         .pins_initialized = false,
-        .lock = MUTEX_INIT,
+        .lock = MUTEX_INIT_LOCKED,
         .hostid = spi_config[1].ctrl,
         .periph = &spi_periph_signal[spi_config[1].ctrl],
         .clk_last = 0,
@@ -176,6 +177,8 @@ void spi_init_pins(spi_t bus)
     /* connect MISO input signal to the MISO pin through the GPIO matrix */
     esp_rom_gpio_connect_in_signal(spi_config[bus].miso,
                                    _spi[bus].periph->spiq_in, false);
+
+    mutex_unlock(&_spi[bus].lock);
 }
 
 int spi_init_cs(spi_t bus, spi_cs_t cs)
@@ -204,6 +207,39 @@ int spi_init_cs(spi_t bus, spi_cs_t cs)
     return SPI_OK;
 }
 
+void spi_deinit_pins(spi_t bus)
+{
+    assert(bus < SPI_NUMOF);
+
+    /* avoid multiple pin deinitializations */
+    if (!_spi[bus].pins_initialized) {
+        return;
+    }
+    _spi[bus].pins_initialized = false;
+
+    if (gpio_is_valid(spi_config[bus].sck)) {
+        esp_idf_gpio_reset_pin(spi_config[bus].sck);
+        gpio_set_pin_usage(spi_config[bus].sck, _GPIO);
+    }
+
+    if (gpio_is_valid(spi_config[bus].mosi)) {
+        esp_idf_gpio_reset_pin(spi_config[bus].mosi);
+        gpio_set_pin_usage(spi_config[bus].mosi, _GPIO);
+    }
+
+    if (gpio_is_valid(spi_config[bus].miso)) {
+        esp_idf_gpio_reset_pin(spi_config[bus].miso);
+        gpio_set_pin_usage(spi_config[bus].miso, _GPIO);
+    }
+
+    if (gpio_is_valid(spi_config[bus].cs)) {
+        esp_idf_gpio_reset_pin(spi_config[bus].cs);
+        gpio_set_pin_usage(spi_config[bus].cs, _GPIO);
+    }
+
+    mutex_lock(&_spi[bus].lock);
+}
+
 void IRAM_ATTR spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
 {
     DEBUG("%s bus=%u cs=%u mode=%u clk=%u\n", __func__, bus, cs, mode, clk);