Merge pull request #18785 from maribu/boards/blxxxpill/periph_conf

boards/common/blxxxpill: Fix pin conflicts in periph_conf
2024-12-29 04:50:03 +01:00 · 2022-10-27 21:22:10 +02:00 · 2022-10-27 21:22:10 +02:00 · ed1d8e0a3d
commit ed1d8e0a3d
parent 1481df8a31 051a1f1e32
20 changed files with 9047 additions and 66 deletions
--- a/boards/common/blxxxpill/doc.txt
+++ b/boards/common/blxxxpill/doc.txt
@ -13,10 +13,10 @@ There are also versions that only report to have 32 KiB, but actually have
 64 KiB.


-## Hardware
+## Pinout
+
+![pinout](pinouts/pinout-bluepill.svg)

-![bluepill]
-(https://camo.githubusercontent.com/6122268d77e4677a08d0e13e2e2aaf070a0a6a69/687474703a2f2f73312e62696c642e6d652f62696c6465722f3131303431372f38383135303232313438363837343334302e6a7067)
 ### MCU

 | MCU       | STM32F103C8               |
--- a/boards/common/blxxxpill/doc/README.md
+++ b/boards/common/blxxxpill/doc/README.md
@ -0,0 +1,6 @@
+Pinout Generation
+=================
+
+[GenPinoutSVG](https://github.com/stevenj/GenPinoutSVG) was used to generate
+the Pinout diagram. The only post-processing applied was cropping the SVG to its
+contents.
--- a/boards/common/blxxxpill/doc/bluepill-top-view.svg
+++ b/boards/common/blxxxpill/doc/bluepill-top-view.svg
--- a/boards/common/blxxxpill/doc/pinout-bluepill.csv
+++ b/boards/common/blxxxpill/doc/pinout-bluepill.csv
@ -0,0 +1,122 @@
+LABELS,DEFAULT,TYPE,GROUP,Name, Official Name, GPIO, Analog 1, Analog 2, RTC,  Func 1, Func 2, Func 3
+BORDER COLOR, grey
+BORDER WIDTH, 2
+BORDER OPACITY, 1
+FILL COLOR, white,  white,  white,  deepskyblue,    gray,   green,  purple, yellow, orange, red,    gold,   brown
+OPACITY,    1,      1,      1,      1,              1,      1,      1,      1,      1,      1,      1,      1
+FONT , Rubik, , , Work Sans, Work Sans
+FONT SIZE , 25, , , 25, 25
+FONT COLOR , black, , , , , white
+FONT SLANT , normal , , , , ,
+FONT BOLD , 700 , , , 700
+FONT STRETCH , normal
+FONT OUTLINE , yellow , , , , blue
+FONT OUTLINE THICKNESS, 0.1
+BOXES, STD, , , PIN BOX, NAME BOX, SKEWED, SKEWED, SKEWED, SKEWED, SKEWED, SKEWED, SKEWED
+
+TYPE, IO, black, 1
+TYPE, INPUT, black, 1
+TYPE, OUTPUT, black, 1
+
+WIRE, DIGITAL, black, 1, 5
+WIRE, PWM, black, 1, 5
+WIRE, ANALOG, black, 1, 5
+WIRE, POWER, black, 1, 10
+
+GROUP, NONE, grey, 0.1
+
+BOX, STD, black, 1, white, 0, 1, 100,55,2,2,0,0
+BOX, PIN BOX, black, 1, white, 0, 1, 80, 55, 5, 5, -10, 0
+BOX, NAME BOX, black, 1, white, 0, 1, 125, 55, 5, 5, -10, 0
+BOX, SKEWED, black, 1, white, 0, 1, 125,55,5,5,-10,0
+BOX, PAGE BORDER, black, 1, white, 1, 50, 100,100,0,0,0,0
+BOX, DETAIL BOX, darkblue, 1, white, 0, 3, 250, 200, 15,15,0,0
+
+PAGE, A4-L
+DPI, 300
+
+DRAW
+
+# Add image of board
+ICON, bluepill-top-view.svg, 880, 908, 100%, 100%
+
+BOX, DETAIL BOX, 1800, 100, 1100, 300, , TOP, "Legend"
+ANCHOR, 1820,140
+PINSET, RIGHT, PACKED, CENTER, CENTER, 74.75, 30, 45, 60, 10, 0
+#           wire,       type,   group,  pin-name,   comment,    analog, PWM,    SPI,    I2C,    POWER,  UART,   QDEC
+PIN,        DIGITAL,    INPUT,  NONE,   ,           Input
+PIN,        DIGITAL,    OUTPUT, NONE,   ,           Output
+PIN,        DIGITAL,    IO,     NONE,   ,           "I/O"
+ANCHOR, 2220,140
+PINSET, RIGHT, PACKED, CENTER, CENTER, 74.75, 30, 45, 60, 10, 0
+PIN,        ANALOG,     IO,     NONE,   ,           ,           Analog
+PIN,        PWM,        IO,     NONE,   ,           ,           ,       PWM
+PIN,        DIGITAL,    IO,     NONE,   ,           ,           ,       ,       SPI
+ANCHOR, 2640,140
+PINSET, RIGHT, PACKED, CENTER, CENTER, 74.75, 30, 45, 60, 10, 0
+PIN,        DIGITAL,    IO,     NONE,   ,           ,           ,       ,       ,       I2C
+PIN,        DIGITAL,    IO,     NONE,   ,           ,           ,       ,       ,       ,       ,       UART
+PIN,        POWER,      IO,     NONE,   ,           ,           ,       ,       ,       ,       Power
+
+BOX, DETAIL BOX, 1800, 500, 1100, 220, , TOP, "Internally Connected to ADC"
+ANCHOR, 1820,540
+PINSET, RIGHT, PACKED, CENTER, CENTER, 74.75, 30, 45, 60, 10, 0
+#           wire,       type,   group,  pin-name,   comment,    analog, PWM,    SPI,    I2C,    POWER,  UART,   QDEC
+PIN,        ANALOG,     IO,     NONE,   NTC,        ,           "A6"
+PIN,        ANALOG,     IO,     NONE,   VREF,       ,           "A7"
+
+BOX, DETAIL BOX, 1800, 800, 1100, 220, , TOP, "Default Interface for STDIO"
+MESSAGE, 1820, 860, 48, Name, 36, LEFT, TOP
+TEXT, none, black, "UART for STM32F103C8 (64 KiB flash)", NL
+TEXT, none, black, "USB for STM32F103CB (128 KiB flash)", NL
+
+# Left Side Pins
+ANCHOR, 520,170
+PINSET, LEFT, PACKED, CENTER, CENTER, 74.75, 30, 45, 60, 10, 0
+
+#           wire,       type,   group,  pin-name,   comment,    analog, PWM,    SPI,    I2C,    POWER,  UART,   QDEC
+PIN,        ANALOG,     INPUT,  NONE,   ,           "VAT"
+PIN,        DIGITAL,    OUTPUT, NONE,   "PC 13",    "LED1"
+PIN,        DIGITAL,    IO,     NONE,   "PC 14"
+PIN,        DIGITAL,    IO,     NONE,   "PC 15"
+PIN,        ANALOG,     IO,     NONE,   "PA 0",     ,           "A0"
+PIN,        DIGITAL,    IO,     NONE,   "PA 1",     ,           "A1"
+PIN,        DIGITAL,    OUTPUT, NONE,   "PA 2",     ,           ,       ,       ,       ,       ,       "TX1"
+PIN,        DIGITAL,    INPUT,  NONE,   "PA 3",     ,           ,       ,       ,       ,       ,       "RX1"
+PIN,        DIGITAL,    OUTPUT, NONE,   "PA 4",     ,           "A2",   ,       "CS1"
+PIN,        DIGITAL,    OUTPUT, NONE,   "PA 5",     ,           "A3",   ,       "SCLK1"
+PIN,        DIGITAL,    INPUT,  NONE,   "PA 6",     ,           "A4",   ,       "MISO1"
+PIN,        DIGITAL,    OUTPUT, NONE,   "PA 7",     ,           "A5",   ,       "MOSI1"
+PIN,        PWM,        OUTPUT, NONE,   "PB 0",     ,           "A8",   "PWM2"
+PIN,        PWM,        OUTPUT, NONE,   "PB 1",     ,           "A9",   "PWM3"
+PIN,        DIGITAL,    OUTPUT, NONE,   "PB 10",    ,           ,       ,       ,       "SCL1", ,       "TX2"
+PIN,        DIGITAL,    INPUT,  NONE,   "PB 11",    ,           ,       ,       ,       "SDA1", ,       "RX2"
+PIN,        DIGITAL,    INPUT,  NONE,   ,           "RESET"
+PIN,        POWER,      OUTPUT, NONE,   ,           ,           ,       ,       ,       ,       "+3.3V"
+PIN,        POWER,      OUTPUT, NONE,   ,           ,           ,       ,       ,       ,       "GND"
+PIN,        POWER,      OUTPUT, NONE,   ,           ,           ,       ,       ,       ,       "GND"
+
+# Right Side Pins
+ANCHOR, 1235,170
+PINSET, RIGHT, PACKED, CENTER, CENTER, 74.75, 30, 45, 60, 10, 0
+#           wire,       type,   group,  pin-name,   comment,    analog, PWM,    SPI,    I2C,    POWER,  UART,   QDEC
+PIN,        POWER,      OUTPUT, NONE,   ,           ,           ,       ,       ,       ,       "+3.3V"
+PIN,        POWER,      OUTPUT, NONE,   ,           ,           ,       ,       ,       ,       "GND"
+PIN,        POWER,      OUTPUT, NONE,   ,           ,           ,       ,       ,       ,       "+5V"
+PIN,        DIGITAL,    IO,     NONE,   "PB 9",     ,           ,       ,       ,       "SDA0"
+PIN,        DIGITAL,    IO,     NONE,   "PB 8",     ,           ,       ,       ,       "SCL0"
+PIN,        DIGITAL,    INPUT,  NONE,   "PB 7",     ,           ,       ,       ,       ,       ,       ,       "QDEC0-B"
+PIN,        DIGITAL,    INPUT,  NONE,   "PB 6",     ,           ,       ,       ,       ,       ,       ,       "QDEC0-A"
+PIN,        PWM,        OUTPUT, NONE,   "PB 5",     ,           ,       "PWM1"
+PIN,        PWM,        IO,     NONE,   "PB 4",     ,           ,       "PWM0", ,       ,       ,       ,       "QDEC1-A"
+PIN,        DIGITAL,    INPUT,  NONE,   "PB 3",     ,           ,       ,       ,       ,       ,       ,       "QDEC1-B"
+PIN,        DIGITAL,    IO,     NONE,   "PA 15"
+PIN,        DIGITAL,    IO,     NONE,   "PA 12",    "USB D+\\nstdio"
+PIN,        DIGITAL,    IO,     NONE,   "PA 11",    "USB D-\\nstdio"
+PIN,        DIGITAL,    OUTPUT, NONE,   "PA 10",    "stdio",    ,       ,       ,       ,       ,       "TX0"
+PIN,        DIGITAL,    INPUT,  NONE,   "PA 9",     "stdio",    ,       ,       ,       ,       ,       "RX0",  "QDEC2-A"
+PIN,        DIGITAL,    IO,     NONE,   "PA 8",     ,           ,       ,       ,       ,       ,       ,       "QDEC2-B"
+PIN,        DIGITAL,    OUTPUT, NONE,   "PB 15",    ,           ,       ,       "MOSI0"
+PIN,        DIGITAL,    INPUT,  NONE,   "PB 14",    ,           ,       ,       "MISO0"
+PIN,        DIGITAL,    OUTPUT, NONE,   "PB 13",    ,           ,       ,       "SCLK0"
+PIN,        DIGITAL,    OUTPUT, NONE,   "PB 12",    ,           ,       ,       "CS0"
--- a/boards/common/blxxxpill/include/periph_conf.h
+++ b/boards/common/blxxxpill/include/periph_conf.h
@ -61,12 +61,21 @@ static const adc_conf_t adc_config[] = {
    { .pin = GPIO_PIN(PORT_A, 5), .dev = 0, .chan = 5 },
    { .pin = GPIO_PIN(PORT_A, 6), .dev = 0, .chan = 6 },
    { .pin = GPIO_PIN(PORT_A, 7), .dev = 0, .chan = 7 },
-    { .pin = GPIO_PIN(PORT_B, 0), .dev = 0, .chan = 8 },
-    { .pin = GPIO_PIN(PORT_B, 1), .dev = 0, .chan = 9 },
    /* ADC Temperature channel */
    { .pin = GPIO_UNDEF, .dev = 0, .chan = 16 },
    /* ADC VREF channel */
    { .pin = GPIO_UNDEF, .dev = 0, .chan = 17 },
+    /* The blackpill has a few pins less. PB0 and PB1 are among the GPIOs not
+     * exposed due to the lower pincount.
+     *
+     * Also, this conflicts with PWM. We prefer PWM over ADC here to provide
+     * 6 external ADC inputs, and 4 PWM outputs (instead of 8 ADC inputs and
+     * 2 PWM outputs). */
+#if !defined(BOARD_BLACKPILL) && !defined(BOARD_BLACKPILL_128KIB) \
+    && !defined(MODULE_PERIPH_PWM)
+    { .pin = GPIO_PIN(PORT_B, 0), .dev = 0, .chan = 8 },
+    { .pin = GPIO_PIN(PORT_B, 1), .dev = 0, .chan = 9 },
+#endif
 };

 #define ADC_NUMOF           ARRAY_SIZE(adc_config)
@ -134,33 +143,41 @@ static const timer_conf_t timer_config[] = {
 */

 static const qdec_conf_t qdec_config[] = {
+    {
+        .dev        = TIM4,
+        .max        = 0x0000ffff,
+        .rcc_mask   = RCC_APB1ENR_TIM4EN,
+        .chan       = { { .pin = GPIO_PIN(PORT_B, 6),   .cc_chan = 0 },
+                        { .pin = GPIO_PIN(PORT_B, 7),   .cc_chan = 1 } },
+        .bus        = APB1,
+        .irqn       = TIM4_IRQn,
+    },
+    /* this conflicts with PWM */
+#ifndef MODULE_PERIPH_PWM
+    {
+        .dev        = TIM3,
+        .max        = 0x0000ffff,
+        .rcc_mask   = RCC_APB1ENR_TIM3EN,
+        .chan       = { { .pin = GPIO_PIN(PORT_B, 4),   .cc_chan = 0 },
+                        { .pin = GPIO_PIN(PORT_B, 5),   .cc_chan = 1 } },
+        /* by default TIM3 is routed to PA6 (cc_chan 0) and PA7 (cc_chan 1) */
+        .remap      = AFIO_MAPR_TIM3_REMAP_1,
+        .bus        = APB1,
+        .irqn       = TIM3_IRQn,
+    },
+#endif
+    /* this conflicts with UART_DEV(0) */
+#ifndef MODULE_PERIPH_UART
    {
        .dev      = TIM1,
        .max      = 0x0000ffff,
        .rcc_mask = RCC_APB2ENR_TIM1EN,
-        .chan     = { { .pin = GPIO_PIN(PORT_A, 8),             .cc_chan = 0 },
-                      { .pin = GPIO_PIN(PORT_A, 9),             .cc_chan = 1 } },
+        .chan     = { { .pin = GPIO_PIN(PORT_A, 8),     .cc_chan = 0 },
+                      { .pin = GPIO_PIN(PORT_A, 9),     .cc_chan = 1 } },
        .bus      = APB2,
        .irqn     = TIM1_UP_IRQn
    },
-    {
-        .dev      = TIM3,
-        .max      = 0x0000ffff,
-        .rcc_mask = RCC_APB1ENR_TIM3EN,
-        .chan     = { { .pin = GPIO_PIN(PORT_A, 6),             .cc_chan = 0 },
-                      { .pin = GPIO_PIN(PORT_A, 7),             .cc_chan = 1 } },
-        .bus      = APB1,
-        .irqn     = TIM3_IRQn
-    },
-    {
-        .dev      = TIM4,
-        .max      = 0x0000ffff,
-        .rcc_mask = RCC_APB1ENR_TIM4EN,
-        .chan     = { { .pin = GPIO_PIN(PORT_B, 6),             .cc_chan = 0 },
-                      { .pin = GPIO_PIN(PORT_B, 7),             .cc_chan = 1 } },
-        .bus      = APB1,
-        .irqn     = TIM4_IRQn
-    }
+#endif
 };

 #define QDEC_NUMOF           ARRAY_SIZE(qdec_config)
@ -225,8 +242,8 @@ static const i2c_conf_t i2c_config[] = {
    {
        .dev            = I2C1,
        .speed          = I2C_SPEED_NORMAL,
-        .scl_pin        = GPIO_PIN(PORT_B, 6),
-        .sda_pin        = GPIO_PIN(PORT_B, 7),
+        .scl_pin        = GPIO_PIN(PORT_B, 8),
+        .sda_pin        = GPIO_PIN(PORT_B, 9),
        .bus            = APB1,
        .rcc_mask       = RCC_APB1ENR_I2C1EN,
        .clk            = CLOCK_APB1,
@ -256,15 +273,24 @@ static const i2c_conf_t i2c_config[] = {
 */
 static const pwm_conf_t pwm_config[] = {
    {
-        .dev      = TIM1,
-        .rcc_mask = RCC_APB2ENR_TIM1EN,
-        .chan     = { { .pin = GPIO_PIN(PORT_A, 8),  .cc_chan = 0 },
-                      { .pin = GPIO_PIN(PORT_A, 9),  .cc_chan = 1 },
-                      { .pin = GPIO_PIN(PORT_A, 10), .cc_chan = 2 },
-                      { .pin = GPIO_PIN(PORT_A, 11), .cc_chan = 3 } },
+        .dev      = TIM3,
+        .rcc_mask = RCC_APB1ENR_TIM3EN,
+        /* by default TIM3 is routed to PA6 (cc_chan 0) and PA7 (cc_chan 1) */
+        .remap      = AFIO_MAPR_TIM3_REMAP_1,
+        .chan     = {
+                        { .pin = GPIO_PIN(PORT_B, 4), .cc_chan = 0 },
+                        { .pin = GPIO_PIN(PORT_B, 5), .cc_chan = 1 },
+#if !defined(BOARD_BLACKPILL) && !defined(BOARD_BLACKPILL_128KIB)
+                        /* The blackpill has a few pins less. PB0 and PB1 are
+                         * among the GPIOs not exposed due to the lower
+                         * pincount */
+                        { .pin = GPIO_PIN(PORT_B, 0), .cc_chan = 2 },
+                        { .pin = GPIO_PIN(PORT_B, 1), .cc_chan = 3 },
+#endif
+                    },
        .af       = GPIO_AF_OUT_PP,
-        .bus      = APB2
-    }
+        .bus      = APB1,
+    },
 };

 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
@ -275,6 +301,22 @@ static const pwm_conf_t pwm_config[] = {
 * @{
 */
 static const spi_conf_t spi_config[] = {
+    {
+        .dev      = SPI2,
+        .mosi_pin = GPIO_PIN(PORT_B, 15),
+        .miso_pin = GPIO_PIN(PORT_B, 14),
+        .sclk_pin = GPIO_PIN(PORT_B, 13),
+        .cs_pin   = GPIO_PIN(PORT_B, 12),
+        .rccmask  = RCC_APB1ENR_SPI2EN,
+        .apbbus   = APB1,
+#ifdef MODULE_PERIPH_DMA
+        .tx_dma   = 3,
+        .tx_dma_chan = DMA_CHAN_CONFIG_UNSUPPORTED,
+        .rx_dma   = 2,
+        .rx_dma_chan = DMA_CHAN_CONFIG_UNSUPPORTED
+#endif
+    },
+#ifndef MODULE_PERIPH_ADC
    {
        .dev      = SPI1,
        .mosi_pin = GPIO_PIN(PORT_A, 7),
@ -290,21 +332,7 @@ static const spi_conf_t spi_config[] = {
        .rx_dma_chan = DMA_CHAN_CONFIG_UNSUPPORTED
 #endif
    },
-    {
-        .dev      = SPI2,
-        .mosi_pin = GPIO_PIN(PORT_B, 15),
-        .miso_pin = GPIO_PIN(PORT_B, 14),
-        .sclk_pin = GPIO_PIN(PORT_B, 13),
-        .cs_pin   = GPIO_PIN(PORT_B, 12),
-        .rccmask  = RCC_APB1ENR_SPI2EN,
-        .apbbus   = APB1,
-#ifdef MODULE_PERIPH_DMA
-        .tx_dma   = 3,
-        .tx_dma_chan = DMA_CHAN_CONFIG_UNSUPPORTED,
-        .rx_dma   = 2,
-        .rx_dma_chan = DMA_CHAN_CONFIG_UNSUPPORTED
 #endif
-    }
 };

 #define SPI_NUMOF           ARRAY_SIZE(spi_config)
--- a/cpu/stm32/include/periph/cpu_pwm.h
+++ b/cpu/stm32/include/periph/cpu_pwm.h
@ -45,6 +45,10 @@ typedef struct {
 typedef struct {
    TIM_TypeDef *dev;               /**< Timer used */
    uint32_t rcc_mask;              /**< bit in clock enable register */
+#ifdef CPU_FAM_STM32F1
+    uint32_t remap;                 /**< AFIO remap mask to route periph to other
+                                         pins (or zero, if not needed) */
+#endif
    pwm_chan_t chan[TIMER_CHANNEL_NUMOF]; /**< channel mapping
                                           *   set to {GPIO_UNDEF, 0}
                                           *   if not used */
--- a/cpu/stm32/include/periph/cpu_qdec.h
+++ b/cpu/stm32/include/periph/cpu_qdec.h
@ -52,7 +52,10 @@ typedef struct {
    uint32_t rcc_mask;              /**< bit in clock enable register */
    qdec_chan_t chan[QDEC_CHAN];    /**< channel mapping, set to {GPIO_UNDEF, 0}
                                     *   if not used */
-#ifndef CPU_FAM_STM32F1
+#ifdef CPU_FAM_STM32F1
+    uint32_t remap;                 /**< AFIO remap mask to route periph to other
+                                         pins (or zero, if not needed) */
+#else
    gpio_af_t af;                   /**< alternate function used */
 #endif
    uint8_t bus;                    /**< APB bus */
--- a/cpu/stm32/periph/pwm.c
+++ b/cpu/stm32/periph/pwm.c
@ -28,6 +28,7 @@
 #include "assert.h"
 #include "periph/pwm.h"
 #include "periph/gpio.h"
+#include "periph_conf.h"

 #define CCMR_MODE1          (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | \
                             TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2)
@ -60,6 +61,11 @@ uint32_t pwm_init(pwm_t pwm, pwm_mode_t mode, uint32_t freq, uint16_t res)
        TIM_CHAN(pwm, i) = (mode == PWM_RIGHT) ? res : 0;
    }

+    /* remap the timer to the configured pins (F1 only) */
+#ifdef CPU_FAM_STM32F1
+    AFIO->MAPR |= pwm_config[pwm].remap;
+#endif
+
    /* configure the used pins */
    unsigned i = 0;
    while ((i < TIMER_CHANNEL_NUMOF) && (pwm_config[pwm].chan[i].pin != GPIO_UNDEF)) {
--- a/cpu/stm32/periph/qdec.c
+++ b/cpu/stm32/periph/qdec.c
@ -26,6 +26,9 @@
 #include "periph/qdec.h"
 #include "periph/gpio.h"

+#define ENABLE_DEBUG 0
+#include "debug.h"
+
 #ifdef QDEC_NUMOF

 /**
@ -59,6 +62,15 @@ int32_t qdec_init(qdec_t qdec, qdec_mode_t mode, qdec_cb_t cb, void *arg)
    /* Power on the used timer */
    periph_clk_en(qdec_config[qdec].bus, qdec_config[qdec].rcc_mask);

+    /* Route peripheral to correct pins (STM32F1 only, other MCU families route
+     * pins to peripheral rather than peripheral to pins */
+#ifdef CPU_FAM_STM32F1
+    DEBUG("[qdec] AFIO->MAPR = 0x%" PRIx32 ", |= 0x%" PRIx32 "\n",
+          AFIO->MAPR, qdec_config[qdec].remap);
+    AFIO->MAPR |= qdec_config[qdec].remap;
+    DEBUG("[qdec] AFIO->MAPR = 0x%" PRIx32 "\n", AFIO->MAPR);
+#endif
+
    /* Reset configuration and CC channels */
    dev(qdec)->CR1 = 0;
    dev(qdec)->CR2 = 0;
--- a/doc/doxygen/src/pinouts/pinout-bluepill.svg
+++ b/doc/doxygen/src/pinouts/pinout-bluepill.svg
--- a/makefiles/cflags.inc.mk
+++ b/makefiles/cflags.inc.mk
@ -87,6 +87,13 @@ ifeq (,$(filter -DDEVELHELP,$(CFLAGS)))
    CFLAGS += -DNDEBUG
  endif
 endif
-
 # Add the optional flags that are not architecture/toolchain blacklisted
 CFLAGS += $(filter-out $(OPTIONAL_CFLAGS_BLACKLIST),$(OPTIONAL_CFLAGS))
+
+# Improve C++ compatibility with our C headers: In C it is both valid and good
+# practise to implicitly initialize struct members with zero by omitting them
+# in a initializer list. The C++ compiler greatly frowns upon this, even within
+# `extern "C" { ... }`. The best would be to configure the C++ compiler to
+# accept good C practises within `extern "C" { ... }` while enforcing good C++
+# practises elsewhere. But in absence of this, we disable the warning for now.
+CXXEXFLAGS += -Wno-missing-field-initializers
--- a/pkg/cryptoauthlib/Makefile
+++ b/pkg/cryptoauthlib/Makefile
@ -14,7 +14,6 @@ CFLAGS += $(INCLUDES)
 CFLAGS += -DATCA_HAL_I2C
 CFLAGS += -Wno-cast-align
 CFLAGS += -Wno-char-subscripts
-CFLAGS += -Wno-missing-field-initializers
 CFLAGS += -Wno-overflow
 CFLAGS += -Wno-pointer-to-int-cast
 CFLAGS += -Wno-sign-compare
--- a/pkg/semtech-loramac/Makefile.loramac_region
+++ b/pkg/semtech-loramac/Makefile.loramac_region
@ -1,6 +1,7 @@
 MODULE = semtech_loramac_mac_region

-CFLAGS += -Wno-missing-field-initializers -Wno-unused-parameter -Wno-sign-compare
+CFLAGS += -Wno-sign-compare
+CFLAGS += -Wno-unused-parameter

 INCLUDES += -I$(PKGDIRBASE)/semtech-loramac/src/boards \
            -I$(PKGDIRBASE)/semtech-loramac/src/radio
--- a/pkg/tensorflow-lite/Makefile.tensorflow-lite-kernels
+++ b/pkg/tensorflow-lite/Makefile.tensorflow-lite-kernels
@ -1,6 +1,5 @@
 MODULE = tensorflow-lite-kernels

-CXXEXFLAGS += -Wno-missing-field-initializers
 CXXEXFLAGS += -Wno-unused-function
 CXXEXFLAGS += -Wno-unused-parameter

--- a/pkg/tensorflow-lite/Makefile.tensorflow-lite-kernels-internal
+++ b/pkg/tensorflow-lite/Makefile.tensorflow-lite-kernels-internal
@ -1,6 +1,5 @@
 MODULE = tensorflow-lite-kernels-internal

-CXXEXFLAGS += -Wno-missing-field-initializers
 CXXEXFLAGS += -Wno-unused-function
 CXXEXFLAGS += -Wno-unused-parameter

--- a/pkg/tensorflow-lite/Makefile.tensorflow-lite-micro-kernels
+++ b/pkg/tensorflow-lite/Makefile.tensorflow-lite-micro-kernels
@ -1,6 +1,5 @@
 MODULE = tensorflow-lite-micro-kernels

-CXXEXFLAGS += -Wno-missing-field-initializers
 CXXEXFLAGS += -Wno-strict-overflow
 CXXEXFLAGS += -Wno-type-limits
 CXXEXFLAGS += -Wno-unused-parameter
--- a/pkg/uwb-core/Makefile
+++ b/pkg/uwb-core/Makefile
@ -12,7 +12,6 @@ CFLAGS += -Wno-strict-prototypes
 CFLAGS += -Wno-maybe-uninitialized
 CFLAGS += -Wno-missing-braces
 CFLAGS += -Wno-missing-declarations
-CFLAGS += -Wno-missing-field-initializers
 CFLAGS += -Wno-old-style-definition
 CFLAGS += -Wno-return-type
 CFLAGS += -Wno-sign-compare
--- a/sys/ztimer/Makefile
+++ b/sys/ztimer/Makefile
@ -10,7 +10,4 @@ SRC := core.c util.c periodic.c
 # enable submodules
 SUBMODULES := 1

-# disable obsolete warning
-CFLAGS += -Wno-missing-field-initializers
-
 include $(RIOTBASE)/Makefile.base
--- a/tests/can_trx/Makefile
+++ b/tests/can_trx/Makefile
@ -25,7 +25,4 @@ ifneq (,$(filter ncv7356,$(TRX_TO_BUILD)))
 	CFLAGS += -DNCV7356_MODE1_PIN=$(NCV7356_MODE1_PIN)
 endif

-# Some boards throw a missing-field-initializers error
-CFLAGS += -Wno-missing-field-initializers
-
 include $(RIOTBASE)/Makefile.include
--- a/tests/conn_can/Makefile
+++ b/tests/conn_can/Makefile
@ -37,9 +37,6 @@ endif
 CFLAGS += -DCAN_PKT_BUF_SIZE=64
 CFLAGS += -DCAN_ROUTER_MAX_FILTER=32

-# Some boards throw a missing-field-initializers error
-CFLAGS += -Wno-missing-field-initializers
-
 include $(RIOTBASE)/Makefile.include

 ifndef CONFIG_GNRC_PKTBUF_SIZE