RIOT-OS/RIOT
RIOT-OS/RIOT
1
0
Fork 0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00
Code Releases Activity

cpu/efm32/wdt: add series 2 support

Browse Source
This commit is contained in:
Jue 2022-10-19 10:54:27 +02:00
parent ccf327a32b
commit 2ce1df5cd6
5 changed files with 31 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
cpu/efm32/Kconfig
View File

@ -30,6 +30,10 @@ config CPU_EFM32_SERIES1
bool
select HAS_PERIPH_WDT_CB
config CPU_EFM32_SERIES2
bool
select HAS_PERIPH_WDT_CB
## Definition of specific features
config HAS_ARCH_EFM32
bool

2
cpu/efm32/Makefile.features
View File

@ -32,7 +32,7 @@ ifeq (1,$(EFM32_TRNG))
FEATURES_PROVIDED += periph_hwrng
endif
ifeq (1,$(EFM32_SERIES))
ifneq (,$(filter $(EFM32_SERIES),1 2))
FEATURES_PROVIDED += periph_wdt_cb
endif

2
cpu/efm32/include/periph_cpu.h
View File

@ -507,7 +507,7 @@ typedef struct {
#define NWDT_TIME_LOWER_LIMIT ((1U << (3U + wdogPeriod_9)) + 1U)
#define NWDT_TIME_UPPER_LIMIT ((1U << (3U + wdogPeriod_256k)) + 1U)
#ifdef _SILICON_LABS_32B_SERIES_1
#if defined(_SILICON_LABS_32B_SERIES_1) || defined(_SILICON_LABS_32B_SERIES_2)
#define WDT_TIME_LOWER_LIMIT NWDT_TIME_LOWER_LIMIT
#define WDT_TIME_UPPER_LIMIT NWDT_TIME_UPPER_LIMIT
#endif

4
cpu/efm32/periph/Makefile
View File

@ -49,8 +49,8 @@ endif
ifneq (,$(filter periph_wdt,$(USEMODULE)))
ifeq (0,$(EFM32_SERIES))
SRC += wdt_series0.c
else ifeq (1,$(EFM32_SERIES))
SRC += wdt_series1.c
else ifneq (,$(filter $(EFM32_SERIES),1 2))
SRC += wdt_series12.c
endif
endif

25
cpu/efm32/periph/wdt_series1.c → cpu/efm32/periph/wdt_series12.c
View File

@ -16,6 +16,7 @@
* EFM32 Series 1 MCUs
*
* @author Bas Stottelaar <basstottelaar@gmail.com>
* @author Juergen Fitschen <me@jue.yt>
* @}
*/
@ -41,14 +42,23 @@ static wdt_cb_t wdt_cb;
static void *wdt_arg;
#endif
static inline uint32_t _get_clock(void)
{
#if defined(_SILICON_LABS_32B_SERIES_0) || defined(_SILICON_LABS_32B_SERIES_1)
return WDT_CLOCK_HZ;
#else
return CMU_ClockFreqGet(cmuClock_WDOG0);
#endif
}
static uint32_t _get_calculated_time(WDOG_PeriodSel_TypeDef period)
{
return ((1 << (3 + (int)period)) + 1) / WDT_CLOCK_HZ * MS_PER_SEC;
return ((1 << (3 + (int)period)) + 1) / _get_clock() * MS_PER_SEC;
}
static WDOG_PeriodSel_TypeDef _get_period(uint32_t max_time)
{
const uint32_t cycles = (max_time * WDT_CLOCK_HZ) / MS_PER_SEC;
const uint32_t cycles = (max_time * _get_clock()) / MS_PER_SEC;
DEBUG("[wdt_series1] _get_period: cycles=%" PRIu32 "\n", cycles);
@ -92,14 +102,25 @@ static void _init(uint32_t min_time, uint32_t max_time, bool warn)
}
/* initialize clock */
#if defined(_SILICON_LABS_32B_SERIES_0) || defined(_SILICON_LABS_32B_SERIES_1)
CMU_ClockEnable(cmuClock_HFLE, true);
#else
CMU_ClockSelectSet(cmuClock_WDOG0CLK, cmuSelect_ULFRCO);
CMU_ClockEnable(cmuClock_WDOG0, true);
#endif
/* initialize watchdog */
WDOG_Init_TypeDef init = WDOG_INIT_DEFAULT;
init.enable = false;
#if defined(_WDOG_CFG_EM1RUN_MASK)
init.em1Run = true;
#endif
init.em2Run = true;
init.em3Run = true;
#if defined(_SILICON_LABS_32B_SERIES_0) || defined(_SILICON_LABS_32B_SERIES_1)
init.clkSel = wdogClkSelULFRCO;
#endif
init.perSel = _get_period(max_time);
uint32_t calculated_time = _get_calculated_time(init.perSel);