1
0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00

cpu/stm32/periph_pwm: support pin remap for F1

Add support to route timer peripheral to alternative pins for the
STM32F1.
This commit is contained in:
Marian Buschsieweke 2022-10-22 02:48:30 +02:00
parent b6845cef79
commit 5ddc332b52
No known key found for this signature in database
GPG Key ID: CB8E3238CE715A94
2 changed files with 10 additions and 0 deletions

View File

@ -45,6 +45,10 @@ typedef struct {
typedef struct {
TIM_TypeDef *dev; /**< Timer used */
uint32_t rcc_mask; /**< bit in clock enable register */
#ifdef CPU_FAM_STM32F1
uint32_t remap; /**< AFIO remap mask to route periph to other
pins (or zero, if not needed) */
#endif
pwm_chan_t chan[TIMER_CHANNEL_NUMOF]; /**< channel mapping
* set to {GPIO_UNDEF, 0}
* if not used */

View File

@ -28,6 +28,7 @@
#include "assert.h"
#include "periph/pwm.h"
#include "periph/gpio.h"
#include "periph_conf.h"
#define CCMR_MODE1 (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | \
TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2)
@ -60,6 +61,11 @@ uint32_t pwm_init(pwm_t pwm, pwm_mode_t mode, uint32_t freq, uint16_t res)
TIM_CHAN(pwm, i) = (mode == PWM_RIGHT) ? res : 0;
}
/* remap the timer to the configured pins (F1 only) */
#ifdef CPU_FAM_STM32F1
AFIO->MAPR |= pwm_config[pwm].remap;
#endif
/* configure the used pins */
unsigned i = 0;
while ((i < TIMER_CHANNEL_NUMOF) && (pwm_config[pwm].chan[i].pin != GPIO_UNDEF)) {