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cpu/efm32: allow series 2 boards to setup clock trees flexibly

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Jue 2022-10-17 22:58:07 +02:00
parent 8f3c06c8ff
commit 775861510c
2 changed files with 61 additions and 10 deletions
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55
cpu/efm32/cpu.c
View File

@ -1,5 +1,6 @@
/*
* Copyright (C) 2015-2017 Freie Universität Berlin
* 2022 SSV Software Systems GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
@ -15,6 +16,7 @@
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Bas Stottelaar <basstottelaar@gmail.com>
* @author Juergen Fitschen <me@jue.yt>
*
* @}
*/
@ -29,16 +31,6 @@
#include "em_dbg.h"
#include "em_emu.h"
/**
* @brief Default settings for CMU initialization.
*/
#ifndef CMU_HFXOINIT
#define CMU_HFXOINIT CMU_HFXOINIT_DEFAULT
#endif
#ifndef CMU_LFXOINIT
#define CMU_LFXOINIT CMU_LFXOINIT_DEFAULT
#endif
/**
* @brief Default settings for EMU initialization
*/
@ -70,6 +62,18 @@ static void dcdc_init(void)
}
#endif
#if (_SILICON_LABS_32B_SERIES < 2)
/**
* @brief Default settings for CMU initialization.
*/
#ifndef CMU_HFXOINIT
#define CMU_HFXOINIT CMU_HFXOINIT_DEFAULT
#endif
#ifndef CMU_LFXOINIT
#define CMU_LFXOINIT CMU_LFXOINIT_DEFAULT
#endif
/**
* @brief Configure clock sources and the CPU frequency
*
@ -144,6 +148,37 @@ static void clk_init(void)
}
}
#else /* (_SILICON_LABS_32B_SERIES >= 2) */
static void clk_init(void)
{
/* init oscillators */
#ifdef CMU_HFXOINIT
CMU_HFXOInit_TypeDef init_hfxo = CMU_HFXOINIT;
CMU_HFXOInit(&init_hfxo);
#endif
#ifdef CMU_LFXOINIT
CMU_LFXOInit_TypeDef init_lfxo = CMU_LFXOINIT;
CMU_LFXOInit(&init_lfxo);
#endif
/* setup clock prescalers */
#if defined(CLK_DIV_NUMOF)
for (size_t i = 0; i < CLK_DIV_NUMOF; i++) {
CMU_ClockDivSet(clk_div_config[i].clk, clk_div_config[i].div);
}
#endif
/* select clock sources */
#if defined(CLK_MUX_NUMOF)
for (size_t i = 0; i < CLK_MUX_NUMOF; i++) {
CMU_ClockSelectSet(clk_mux_config[i].clk, clk_mux_config[i].src);
}
#endif
}
#endif /* (_SILICON_LABS_32B_SERIES >= 2) */
/**
* @brief Initialize sleep modes
*

16
cpu/efm32/include/periph_cpu.h
View File

@ -41,6 +41,22 @@
extern "C" {
#endif
/**
* @brief Clock mux configuration
*/
typedef struct {
CMU_Clock_TypeDef clk; /**< Clock domain */
CMU_Select_TypeDef src; /**< Source clock */
} clk_mux_t;
/**
* @brief Clock divider configuration
*/
typedef struct {
CMU_Clock_TypeDef clk; /**< Clock domain */
CMU_ClkDiv_TypeDef div; /**< Divisor */
} clk_div_t;
#if (defined(ADC_COUNT) && (ADC_COUNT > 0)) || defined(DOXYGEN)
/**
* @brief Internal macro for combining ADC resolution (x) with number of