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drivers: add USB OTG FS/HS driver for Synopsys DWC2 IP core

This commit is contained in:
Gunar Schorcht 2022-09-24 23:30:47 +02:00
parent da2f024f8b
commit 7db66e49b3
7 changed files with 383 additions and 163 deletions

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@ -137,3 +137,6 @@ clen
# RO (read only) => to, row, rob, rod, roe, rot
ro
# Synopsys (vendor name) => Synopsis
synopsys

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@ -57,6 +57,7 @@ rsource "periph_common/Kconfig"
rsource "rtt_rtc/Kconfig"
rsource "soft_spi/Kconfig"
rsource "soft_uart/Kconfig"
rsource "usbdev_synopsys_dwc2/Kconfig"
endmenu # Peripherals drivers
menu "Sensor Device Drivers"

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@ -195,6 +195,10 @@ ifneq (,$(filter tmp00%,$(USEMODULE)))
USEMODULE += tmp00x
endif
ifneq (,$(filter usbdev_synopsys_dwc2,$(USEMODULE)))
FEATURES_REQUIRED += periph_usbdev
endif
ifneq (,$(filter vcnl40%0,$(USEMODULE)))
USEMODULE += vcnl40x0
endif

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@ -0,0 +1,79 @@
/*
* Copyright (C) 2019 Koen Zandberg
* 2022 Gunar Schorcht
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup drivers_periph_usbdev
* @{
*
* @file
* @brief Low level USB FS/HS driver definitions for MCUs with Synopsys DWC2 IP core
*
* @author Koen Zandberg <koen@bergzand.net>
* @author Gunar Schorcht <gunar@schorcht.net>
*/
#ifndef USBDEV_SYNOPSYS_DWC2_H
#define USBDEV_SYNOPSYS_DWC2_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief USB OTG peripheral type.
*
* High speed peripheral is assumed to have DMA support available.
*
* @warning Only one of each type is supported at the moment, it is not
* supported to have two FS type or two HS type peripherals enabled on a
* single MCU.
*/
typedef enum {
DWC2_USB_OTG_FS = 0, /**< Full speed peripheral */
DWC2_USB_OTG_HS = 1, /**< High speed peripheral */
} dwc2_usb_otg_fshs_type_t;
#if defined(MCU_STM32)
/**
* @brief Type of USB OTG peripheral phy.
*
* The FS type only supports the built-in type, the HS phy can have either the
* FS built-in phy enabled or the HS ULPI interface enabled.
*/
typedef enum {
DWC2_USB_OTG_PHY_BUILTIN,
DWC2_USB_OTG_PHY_ULPI,
} dwc2_usb_otg_fshs_phy_t;
#endif
/**
* @brief stm32 USB OTG configuration
*/
typedef struct {
uintptr_t periph; /**< USB peripheral base address */
dwc2_usb_otg_fshs_type_t type; /**< FS or HS type */
#if defined(MCU_STM32)
dwc2_usb_otg_fshs_phy_t phy; /**< Built-in or ULPI phy */
uint32_t rcc_mask; /**< bit in clock enable register */
uint8_t irqn; /**< IRQ channel */
uint8_t ahb; /**< AHB bus */
gpio_t dm; /**< Data- gpio */
gpio_t dp; /**< Data+ gpio */
gpio_af_t af; /**< Alternative function */
#endif /* defined(MCU_STM32) */
} dwc2_usb_otg_fshs_config_t;
#ifdef __cplusplus
}
#endif
#endif /* USBDEV_SYNOPSYS_DWC2_H */
/** @} */

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@ -0,0 +1,14 @@
# Copyright (c) 2021 HAW Hamburg
#
# This file is subject to the terms and conditions of the GNU Lesser
# General Public License v2.1. See the file LICENSE in the top level
# directory for more details.
#
config MODULE_USBDEV_SYNOPSYS_DWC2
bool
depends on TEST_KCONFIG
depends on HAS_PERIPH_USBDEV
select MODULE_ZTIMER_MSEC
help
USBDEV low-level driver for MCUs with Synopsys DWC2 USB OTG FS/HS IP core"

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@ -0,0 +1 @@
include $(RIOTBASE)/Makefile.base