9334897ab9
Merge pull request #15086 from maribu/ibs-after-stackpointer
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cpu/cortexm_common: Flush pipeline after triggering PendSV
2020-09-26 21:05:04 +02:00
6a2b2aab5d
Merge pull request #14879 from benpicco/cpu/kinetis/rtc_mktimr
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cpu/kinetis: RTC use rtc_mktime()
2020-09-25 21:48:16 +02:00
a1473431da
Merge pull request #14878 from benpicco/cpu/fe310/rtc_mktime
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cpu/fe310: RTC: use rtc_mktime()
2020-09-25 21:19:04 +02:00
benpicco
a923cda323
Merge pull request #14944 from benpicco/drivers/mtd_mci
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cpu/lpc23xx: add MTD wrapper for MCI driver
2020-09-25 18:22:48 +02:00
Benjamin Valentin
d092c12a66
cpu/fe310: RTC: use rtc_mktime()
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Use RTC helper functions instead of libc functions.
This gives us y2038 safety by the extended epoch and saves
a good chunk of memory:
picolibc mktime():
text data bss dec hex filename
15048 520 2504 18072 4698 tests/periph_rtc/bin/hifive1/tests_periph_rtc.elf
rtc_mktime():
text data bss dec hex filename
7632 40 2452 10124 278c tests/periph_rtc/bin/hifive1/tests_periph_rtc.elf
2020-09-25 18:22:10 +02:00
benpicco
2bfe7e1ce2
Merge pull request #15090 from aabadie/pr/boards/nucleo-g071rb
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boards/nucleo-g071rb: add initial support
2020-09-25 18:21:29 +02:00
84f1a70b7f
cpu/stm32/rtt: adapt for stm32g0
2020-09-25 15:20:14 +02:00
Marian Buschsieweke
49f3d1056d
cpu/cortexm_common: Code style
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Fix code alignment
2020-09-25 13:58:25 +02:00
Marian Buschsieweke
304f4ec7d4
cpu/cortexm_common: flush pipeline after PendSV
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https://interrupt.memfault.com/blog/arm-cortex-m-exceptions-and-nvic#pendsv-example
2020-09-25 13:58:06 +02:00
25e1fec90c
cpu/stm32: add support for stm32g071rb
2020-09-25 13:08:07 +02:00
da9168c652
cpu/stm32: rename stmclk_fx to stmclk_f2f4f7
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This commit also removes all f0/f1/f3 specific code from this file
2020-09-24 11:27:24 +02:00
042a550f0d
boards: cpu: stm32f1/f3: rework clock configuration and init
2020-09-24 11:27:24 +02:00
MrKevinWeiss
7893158b5a
drivers/dev_enums: Remove unused dev_enums.h
2020-09-24 09:27:39 +02:00
97a0ba33c2
Merge pull request #14557 from bergzand/pr/cortexm_common/pendsv_priority
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cortexm_common: Make no_thread_idle compatible with cortex-m0
2020-09-23 11:49:41 +02:00
chrysn
9295f69da4
Merge pull request #15062 from kaspar030/fix_efm32_16b_timer_set_absolute
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cpu/efm32/periph/timer: fix timer_set_absolute() in 16bit case
2020-09-23 11:28:00 +02:00
eb73515e2c
cortexm_common: Enable no_thread_idle for all architectures
2020-09-23 11:02:01 +02:00
ba58273b04
cortexm_common: Enable using pendsv IRQ at lower priority
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This modifies the cortex-m thread specifics to allow running the PendSV
interrupt continuously at lower priority and removes the priority
modifications during the interrupt itself. Interrupts are disabled
during the scheduling itself, but enabled briefly after the sleep to
ensure that they are handled if activated during the scheduling or the
sleep.
2020-09-23 11:01:29 +02:00
Francisco
195b7e6e16
Merge pull request #14945 from aabadie/pr/boards/stm32l0l1_clock_kconfig
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boards/stm32l0l1: rework clock initialization and configuration
2020-09-23 09:30:19 +02:00
dcb25eb3fc
cpu/efm32/periph/timer: fix timer_set_absolute() in 16bit case
2020-09-22 23:15:23 +02:00
c14d7ec7db
cpu/stm32l0l1: refactor clock initialization sequence
2020-09-22 22:30:20 +02:00
425a2f69a2
cpu/stm32l0l1: ensure PLL is enabled when required
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PLL is required for the 48MHz output used by HWRNG and also when it's used as system clock
2020-09-22 22:30:20 +02:00
8ac1909ea3
cpu: boards: stm32l0l1: use IS_ACTIVE where possible in stmclk
2020-09-22 22:30:19 +02:00
23117a844e
boards: cpu: stm32l0: rework clock configuration
2020-09-22 22:30:19 +02:00
MrKevinWeiss
d95452b979
cpu/native: Remove unused TIMER_0_EN
2020-09-22 16:26:01 +02:00
MrKevinWeiss
a65ce2a058
cpu/ezr32wg: fix comment
2020-09-22 16:26:01 +02:00
MrKevinWeiss
263aea60cb
cpu/lpc1768: Cleanup timer to remove dev_enums
2020-09-22 16:26:01 +02:00
MrKevinWeiss
7c3082a7a3
cpu/lm4f120: Update timer macros to timer_config_t
2020-09-22 16:26:01 +02:00
Francisco
bcd2b3e369
Merge pull request #14030 from benpicco/cpu/sam0_common-rtc_tamper
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cpu/sam0_common: GPIO: use tamper detection to wake from Deep Sleep
2020-09-22 11:41:48 +02:00
Francisco
64f6b7ffa4
Merge pull request #14702 from maribu/sched_active_thread
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treewide: Fix direct access to scheduler internals
2020-09-21 09:09:59 +02:00
Benjamin Valentin
310eb4970c
cpu/sam0_common: GPIO: use tamper detection to wake from Deep Sleep
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On samd5x only the RTC can wake the CPU from Deep Sleep (pm modes 0 & 1).
The external interrupt controller is disabled, but we can use the tamper
detection of the RTC.
If an gpio interrupt is configured on one of the five tamper detect pins,
those can be used to wake the CPU from Deep Sleep / Hibernate.
2020-09-17 18:46:25 +02:00
Benjamin Valentin
0499d016ad
cpu/sam0_common: implement RTC tamper detection
2020-09-17 18:45:50 +02:00
Francisco
6a826555cf
Merge pull request #14877 from maribu/stm32-eth-fix
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cpu/stm32/periph/eth: Fix transmission bug
2020-09-16 14:30:44 +02:00
Benjamin Valentin
cff8e862b8
picolibc: model as a feature
2020-09-15 22:11:21 +02:00
chrysn
5b97b49b1d
cpu/nrf52: Remove unused static inline USB poweroff
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The function was never in used, and this is breaking builds using LLVM
that treats unused static inlines as an error.
2020-09-15 15:55:05 +02:00
Marian Buschsieweke
f5398cf57b
Merge pull request #14940 from benpicco/cpu/cortexm_common-puf_sram
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cpu/cortexm_common: advertise puf_sram feature
2020-09-15 10:58:41 +02:00
18cda40fb5
Merge pull request #14710 from bergzand/pr/cortexm/thread_remove_nop_ctx_switch
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cortexm_common: Skip context save/restore on scheduling the previous thread
2020-09-11 18:28:43 +02:00
Benjamin Valentin
d9116684e5
cpu/cortexm_common: advertise puf_sram feature
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`puf_sram` is a feature of the linker script, it does not need vendor
specific hardware support.
2020-09-11 16:30:45 +02:00
benpicco
842933855f
Merge pull request #14995 from benpicco/cpu/cc2538-register
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cc2538_rf: register with netdev
2020-09-11 16:03:08 +02:00
Benjamin Valentin
a1a67265cd
cc2538_rf: use prefix for global function name
2020-09-11 13:33:37 +02:00
Benjamin Valentin
8ac3332cb6
cc2538_rf: add EUI provoder for primary EUI-64
2020-09-11 13:33:37 +02:00
Benjamin Valentin
1811686540
cc2538_rf: register with netdev
2020-09-11 13:33:37 +02:00
Benjamin Valentin
6675c5f5c0
cc2538_rf: pass address via pointer
2020-09-11 13:33:37 +02:00
Francisco
858533e68e
Merge pull request #14994 from benpicco/nrf802154-register
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nrf802154: register with netdev
2020-09-11 12:48:40 +02:00
benpicco
5715f5776b
Merge pull request #14804 from bergzand/pr/sam0/gpio_iobus
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sam0_common: Use Single-cycle I/O Port for GPIO when available
2020-09-10 23:45:43 +02:00
Dylan Laduranty
4db8a1f602
Merge pull request #14478 from benpicco/cpu/sam0/tc_pwm
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cpu/sam0_common: add support to run PWM off TC timers
2020-09-10 23:04:58 +02:00
6007a31813
sam0: Add periph_gpio_fast_read feature where applicable
2020-09-10 22:13:25 +02:00
ddb22a3c56
sam0_common: Use Single-cycle I/O Port for GPIO when available
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The Cortex-m0 based ATSAM devices can use the Single-cycle I/O Port for
GPIO. This commit modifies the gpio_t type to use this port when
available. It is mapped back to the peripheral memory space for
configuration access. When it is not available, the _port_iobus() and
_port() functions behave identical, which is the case for the samd51.
2020-09-10 22:13:24 +02:00
Benjamin Valentin
0437461812
cpu/sam0_common: PWM: add support to run PWM off TC timers
2020-09-10 21:47:03 +02:00
5db55360cc
cortexm_common: Determine next thread before unscheduling
2020-09-10 20:42:55 +02:00
benpicco
f75ca11968
Merge pull request #14802 from jia200x/pr/nrf52840_radio_hal
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nrf52840: implement Radio HAL
2020-09-10 18:07:51 +02:00
Jose Alamos
377560f5cc
nrf52840: add radio hal implementation
2020-09-10 17:01:14 +02:00
Cenk Gündoğan
0d0bc91553
Merge pull request #14754 from leandrolanzieri/pr/no_archives
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build system: link object files
2020-09-10 09:36:29 +02:00
Benjamin Valentin
58dc106309
nrf802154: register with netdev
2020-09-10 00:05:25 +02:00
benpicco
be3667bfdd
Merge pull request #14678 from dylad/cpu/saml1x/rtt-init-fix
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cpu/saml1x: fix RTT issue in init process
2020-09-09 22:47:51 +02:00
Dylan Laduranty
35536233f9
cpu/saml1x: fix RTT issue in init process
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RTT module may get stuck during the init process if the RTC was running from
a previous boot. Unsure we don't remove the peripheral clock during the CPU
init if RTC is active from a previous boot and add a workaround to disable
this module as it will be re-init at some point later by the auto_init module
or by the user's application.
2020-09-09 21:27:48 +02:00
benpicco
2ba037ad4a
Merge pull request #14977 from benpicco/CLOCK_CORECLOCK
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always define CLOCK_CORECLOCK
2020-09-09 21:25:53 +02:00
5516b3d6c7
Merge pull request #14990 from MrKevinWeiss/pr/fix/lpcuart
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cpu/lpc1768: Fix uart initialization
2020-09-09 18:09:33 +02:00
MrKevinWeiss
966527d168
cpu/lpc1768: Fix uart initialization
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The pinsel_shift should be multiplied by 2 as each bitfield is 2 bits
2020-09-09 17:44:25 +02:00
benpicco
7bd933f1ce
Merge pull request #14991 from leandrolanzieri/pr/cpu/native/fix_rtc_dependency
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cpu/native: pull xtimer when RTC is used
2020-09-09 17:43:49 +02:00
benpicco
84e36e6fcc
Merge pull request #14985 from jia200x/pr/hal/cc2538_rf/fix_style_issues
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cc2538_rf_hal: fix style issues
2020-09-09 17:41:02 +02:00
Leandro Lanzieri
24d2578606
cpu/native: pull xtimer when RTC is used
2020-09-09 16:59:18 +02:00
Benjamin Valentin
7d29d85ddd
cpu/efm32: define CLOCK_CORECLOCK
2020-09-09 16:44:12 +02:00
benpicco
21fbf62e4e
Merge pull request #14989 from aabadie/pr/cpu/stm32l4wb_apbx_div2_fix
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cpu/stm32l4wb: fix APBx bitfields for divider factor 2
2020-09-09 16:42:57 +02:00
4e235b8e76
cpu/stm32l4wb: fix APBx bitfields for divider factor 2
2020-09-09 15:59:38 +02:00
cdbb3e025a
cpu/fe310: boards/hifive1*: use IS_ACTIVE where possible
2020-09-09 14:14:39 +02:00
ace160a2a3
boards/hifive1: use MHZ utility macro for clock frequency
2020-09-09 14:14:39 +02:00
49e11626d3
cpu/fe310: ensure all clock modes are built
2020-09-09 14:14:39 +02:00
Jose Alamos
9d770ec1bd
cc2538_rf_hal: fix style issues
2020-09-09 13:07:58 +02:00
benpicco
239999fe73
Merge pull request #14984 from jia200x/pr/hal/missing_const
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ieee802154_hal: add missing const qualifiers
2020-09-09 13:03:30 +02:00
Jose Alamos
d3630dcabe
cc2538_rf: add missing const qualifiers
2020-09-09 11:18:01 +02:00
MrKevinWeiss
c2e81b3ca7
cpu/lpc1768: Generalize uart to remove dev_enums
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Change uart dev 1 to use UART2 on p9 and p10 since p0 and p1 are not accessable
2020-09-09 10:25:37 +02:00
MrKevinWeiss
11465c941d
cpu/lm4f120: Remove dev_enums dependency
2020-09-09 10:25:37 +02:00
Francisco
adb0bcab47
Merge pull request #14866 from aabadie/pr/boards/stm32l4wb_clock_kconfig
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boards: cpu: stm32l4/wb: rework clock configuration and initialization
2020-09-09 09:35:29 +02:00
Francisco
757846ad7f
Merge pull request #14921 from aabadie/pr/boards/stm32f0_clock_kconfig
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boards/stm32f0: rework clock initialization and configuration
2020-09-09 09:35:22 +02:00
Francisco
f08e65cd0c
Merge pull request #14981 from maribu/target-arch
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build system: Overwrite TARGET_ARCH per arch
2020-09-09 09:10:52 +02:00
Marian Buschsieweke
7c1949341e
build system: Overwrite TARGET_ARCH per arch
...
Add `TARGET_ARCH_<ARCH>` for each architecture (e.g. `TARGET_ARCH_CORTEX` for
Cortex M) to allow users to overwrite the target triple for a specific arch
from ~/.profile or ~/.bashrc (or the like) without overwriting it for all others
as well.
2020-09-08 22:28:41 +02:00
9dd20c0ccb
cpu: boards: stm32l4/wb: use IS_USED for clock where possible
2020-09-08 18:42:42 +02:00
0745cc4a99
cpu: boards: smt32l4: rework clock configuration
2020-09-08 18:42:41 +02:00
7c923da0c8
cpu/stm32: split f0 clock initialization in separate file
2020-09-08 16:03:44 +02:00
9eef7a47cb
Merge pull request #14830 from benpicco/cpu/lpc23xx-picolibc
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cpu/lpc23xx: enable support for picolibc
2020-09-08 10:35:45 +02:00
Marian Buschsieweke
c5c62e93d3
cpu/esp_common: Declare sched_active_{thread,pid}
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Declare sched_active_thread and sched_active_pid locally in the ESP code for
now. Once the code is cleaned up to no longer tap into scheduler internals but
use the API instead, those can be dropped again.
2020-09-07 12:59:55 +02:00
63554b1a0c
cpu/cc2538/radio: only build required files
2020-09-04 15:25:36 +02:00
Leandro Lanzieri
81cb769cad
makefiles: avoid building archives when compiling
2020-09-04 15:01:10 +02:00
benpicco
6fcf60c0b0
Merge pull request #14791 from jia200x/pr/cc2538_radio_hal
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cc2538_rf: implement Radio HAL
2020-09-04 11:59:32 +02:00
Jose Alamos
1401635787
cc2538: implement radio hal
2020-09-04 11:09:17 +02:00
Benjamin Valentin
7bac063719
cpu/lpc23xx: mci: add xtimer dependency
2020-09-04 01:01:43 +02:00
22252337b6
cortexm_common: simplify FPU guards
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The FPU is only enabled on platforms where it is available. The extra
checks for these platforms are redundant and removed here
2020-09-03 21:00:40 +02:00
Jose Alamos
18d188c5d9
cc2538: add IRQ bit definitions
2020-09-03 18:20:50 +02:00
Jose Alamos
2d7c316226
cc2538_netdev: disable netdev if radio hal is present
2020-09-03 18:20:50 +02:00
Jose Alamos
2917879407
cc2538: move chunks of init function to netdev
2020-09-03 18:20:49 +02:00
Jose Alamos
4cbd3a91b2
cc2538: move IRQ clear to netdev irq handler
2020-09-03 18:20:49 +02:00
Francisco
6ad0e70db2
Merge pull request #14595 from aabadie/pr/cpu/stm32_vectors_generator
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cpu/stm32: generate vectors C files and IRQ defines from CMSIS headers
2020-09-02 21:25:44 +02:00
Leandro Lanzieri
401ed63b41
Merge pull request #14848 from fjmolinas/pr_periph_timer_config
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drivers/Kconfig: add periph timer config menu
2020-09-02 17:33:46 +02:00
Francisco Molina
c4c2673aec
cpu/efm32/Kconfig: add EFM32_XTIMER_USE_LETIMER config
2020-09-02 15:31:28 +02:00
ec2e1a15f9
cpu/stm32: move cmsis package Makefile to stm32 cpu
2020-09-02 11:30:49 +02:00
91c9b8c1b0
cpu/stm32: remove hardcoded CPU_IRQ_NUMOF defines
2020-09-02 11:30:49 +02:00
0da196d98d
cpu/stm32: handle generated irqs.h in build system
2020-09-02 11:30:49 +02:00
39d95b1950
cpu/stm32: add tool to generate a header with IRQ numof defines
2020-09-02 11:30:49 +02:00
6cd6d5948f
cpu/stm32/vectors: remove hand crafted vectors_<fam>.c files
2020-09-02 11:30:49 +02:00
29b2a7aec1
cpu/stm32: integrate use of vectors generator in build system
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The cmsis package is not added as a dependency but used directly before generating the vectors.c file
2020-09-02 11:30:49 +02:00
96ad6e9b84
cpu/stm32/vectors: ignore generated vectors C files
2020-09-02 11:30:48 +02:00
e6bb1a240e
cpu/stm32: add gen_vectors.py script
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This script can be used to automatically generate the vectors.c file corresponding to an STM32 cpu line
2020-09-02 11:30:48 +02:00
benpicco
685efe83fb
Merge pull request #14890 from benpicco/cpu/cc2538-wdt
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cpu/cc2538: add Watchdog implementation
2020-09-02 11:06:18 +02:00
36ecb40dd9
Merge pull request #14919 from bergzand/pr/fe310/unify_ld
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fe310: Unify linker scripts
2020-09-01 18:03:46 +02:00
Cenk Gündoğan
538155c344
Merge pull request #14904 from leandrolanzieri/pr/kconfig/change_prefix_convention
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treewide: modify Kconfig symbol prefixes
2020-09-01 15:57:06 +02:00
32399901f0
fe310: Unify linker scripts
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Similar to the cortex-m common linker scripts, the RISC-V linker scripts
can be unified easily, requiring only the memory addresses and lengths.
This simplifies adding new RISC-V CPU's later
2020-09-01 14:39:55 +02:00
Peter Kietzmann
c5b63fc7ad
Merge pull request #14688 from JannesVolkens/stm32_link_up
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drivers/stm32_eth: add 'NETDEV_EVENT_LINK_UP' event
2020-08-31 22:41:09 +02:00
53ac29aca4
Merge pull request #14887 from bergzand/pr/fe310/plic_periph
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fe310: Add custom PLIC driver as peripheral
2020-08-31 21:25:03 +02:00
Jannes
f3e934988c
drivers/stm32_eth: add 'NETDEV_EVENT_LINK_UP' event
2020-08-31 20:50:47 +02:00
498646aa17
fe310: Remove vendor plic driver
2020-08-31 16:26:43 +02:00
bef82edf43
fe310: Adapt peripherals to use the plic driver
2020-08-31 16:26:43 +02:00
1d999a1335
fe310: Make header guard unique for plic vendor header
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Otherwise it conflicts with the other plic.h header
2020-08-31 16:26:43 +02:00
3180a11b51
fe310: Add PLIC peripheral driver
2020-08-31 16:26:42 +02:00
Leandro Lanzieri
5c3f7bde0c
Merge pull request #14780 from fjmolinas/pr_efm32_lpetimer_cleanup
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cpu/efm32/timer: cleanups and improvements
2020-08-31 15:41:23 +02:00
Leandro Lanzieri
2e79e00ca7
treewide: change Kconfig prefix for module symbols
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This changes the prefix used for the symbols that reprensent modules
(not the ones generated from USEMODULE).
MOD_ => MODULE_
2020-08-31 09:57:28 +02:00
Francisco Molina
cbf78fe3d4
cpu/efm32: allow running both LETIMER and regular timer
2020-08-31 09:38:31 +02:00
Francisco Molina
c77646ff79
cpu/efm32/timer: add enabling/disabling of prescaler timer
2020-08-31 09:38:31 +02:00
Francisco Molina
5c4db4a65b
cpu/efm32: use IS_ACTIVE for CONFIG_EFM32_USE_LETIMER
2020-08-31 09:38:30 +02:00
Leandro Lanzieri
d25fc243c4
treewide: change prefix for generated Kconfig symbols.
...
This changes the prefixes of the symbols generated from USEMODULE and
USEPKG variables. The changes are as follow:
KCONFIG_MODULE_ => KCONFIG_USEMODULE_
KCONFIG_PKG_ => KCONFIG_USEPKG_
MODULE_ => USEMODULE_
PKG_ => USEPKG_
2020-08-31 09:37:09 +02:00
Marian Buschsieweke
8752e03d3e
cpu/stm32/periph/eth: Fix transmission bug
...
Using the TER bit in the TX descriptors when only using a single descriptor for
sending triggered a hardware bug. Thus, stop using the TER bit and store the
currently active TX descriptor in RAM instead.
2020-08-30 20:23:20 +02:00
Benjamin Valentin
18fe16298c
cpu/cc2538: add Watchdog implementation
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The Watchdog on the CC2538 only supports 4 intervals (2ms, 16ms, 250ms & 1s).
Since the watchdog timer API specifies a `max_time`, the interval equal or
below that time is selected.
E.g. for `max_time=125ms` the 16ms interval would be selected.
This is outside the tolerance of the `tests/periph_wdt` test.
Co-authored-by: Thomas Geithner <thomas.geithner@dai-labor.de>
2020-08-30 11:46:39 +02:00
889ea15936
fe310: Use read-modify-store instruction on GPIO
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The rv32imac supports the A (atomic) extensions containing
read-modify-store operations. This commit modifies the GPIO code to use
these for all bitwise operations. The atomic operations are emitted with
relaxed ordering as they do not require multiprocessor synchronization.
This decreases the duration of the gpio operations from 59 ns to 50 ns
per call. depending a bit on the type of operation.
2020-08-29 09:24:02 +02:00
benpicco
029ae8c7d2
Merge pull request #14766 from benpicco/cpu/native-rtc_set_alarm
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cpu/native: RTC: implement rtc_set_alarm()
2020-08-28 17:39:47 +02:00
d369eff042
Merge pull request #14868 from bergzand/pr/fe310/irq_trap_entry_optimize
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fe310: Merge and optimize trap_entry with irq_arch
2020-08-28 15:04:14 +02:00
1e5dc928ad
fe310: Split sched_run call from handle_trap
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This is a small optimization to the RISC-V trap handler. By splitting
the call to sched_run from the trap_handle call, loading the previous
thread ptr can be delayed until after it is determined that a schedule
run is required. This shaves of a few cycles during regular interrupts
that do not trigger the scheduler.
2020-08-28 14:17:58 +02:00
4289b09a33
fe310: Skip most context save on null thread
2020-08-28 14:17:56 +02:00
acf948a296
fe310: Only retrieve mepc and mtval on exception
2020-08-28 14:17:33 +02:00
503806cbb3
fe310: Only save caller-saved registers on regular trap
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This commit reworks the trap entry to only save the callee-saved
registers when a context switch is required. the caller-saved registers
are always stored and restored to adhere to the RISC-V ABI. This saves
considerable cycles on interrupts.
2020-08-28 14:17:01 +02:00
45646a811d
Merge pull request #13003 from benpicco/lpc2387-timer
2020-08-28 13:35:15 +02:00
7eed33bf78
Merge pull request #14846 from hugueslarrive/adc_config
...
Declare adc_config[] like others peripherals configuration arrays
2020-08-28 09:59:21 +02:00
Benjamin Valentin
e2addab7f0
cpu/kinetis: RTC use rtc_mktime()
...
Use RTC helper functions instead of libc functions.
This gives us y2038 safety by the extended epoch
and saves a good chunk of memory:
mktime():
text data bss dec hex filename
24756 232 2736 27724 6c4c testssperiph_rtc/bin/openlabs-kw41z-mini/tests_periph_rtc.elf
rtc_mktime():
text data bss dec hex filename
16348 132 2696 19176 4ae8 tests/periph_rtc/bin/openlabs-kw41z-mini/tests_periph_rtc.elf
2020-08-27 23:16:02 +02:00
benpicco
b6a542668b
Merge pull request #14845 from fjmolinas/pr_driver_netdev_common
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tests/driver_netdev_common: add netdev_default
2020-08-27 17:01:50 +02:00
benpicco
779fb7d470
Merge pull request #14860 from hugueslarrive/adc_f3
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STM32F3 familly ADC implementation
2020-08-27 16:50:44 +02:00
hugues
e314632c2e
cpu/stm32/periph/adc_f3: initial ADC implementation for f3
2020-08-27 15:43:43 +02:00
hugues
6959a905a2
cpu/stm32/include/periph/f3/periph_cpu.h: add ADC support
2020-08-27 15:43:43 +02:00
Francisco
578b8b8885
Merge pull request #14372 from benpicco/cpu/nrf52-full
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cpu/nrf52: add support for the whole family, fix nrf52811
2020-08-27 13:51:12 +02:00
Francisco Molina
c05dd9e6d3
treewide: change netdev driver dependencies against netdev_default
...
- gnrc_netdev_default depends on netdev_default, no need for checking
against both modules.
- fix documentation mentions of the double check
2020-08-27 11:46:25 +02:00
hugues
4c4b754e1c
cpu/nrf51/include/periph_cpu.h: add adc_conf_t typedef
2020-08-27 11:43:22 +02:00
hugues
692f99989a
cpu/nrf51/periph/adc: removes ADC configuration loading
2020-08-27 03:59:44 +02:00
hugues
07cdad29d7
cpu/stm32/periph/adc_f0: removes ADC configuration loading
2020-08-27 03:59:44 +02:00
hugues
5a26f74124
cpu/stm32/periph/adc_l0: removes ADC configuration loading
2020-08-27 03:58:33 +02:00
hugues
779d7a3b00
cpu/stm32/periph/adc_l4: removes ADC configuration loading
2020-08-27 03:56:26 +02:00
hugues
05702d5593
cpu/stm32/periph/adc_f2: removes ADC configuration loading
2020-08-27 03:56:26 +02:00
hugues
7680c8e2cb
cpu/stm32/periph/adc_f1: removes ADC configuration loading
2020-08-27 03:56:26 +02:00
hugues
323725bcf5
cpu/stm32/periph/adc_f4: removes ADC configuration loading
2020-08-27 03:56:26 +02:00
hugues
3921a2f925
cpu/stm32/periph/adc_l1: removes ADC configuration loading
2020-08-27 03:56:26 +02:00
343f183f05
fe310: Merge intr.S into irq_arch
2020-08-26 20:17:21 +02:00
Martine Lenders
3d457b76cc
Merge pull request #14757 from benpicco/socket_zep_reboot
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socket_zep: fix reboot
2020-08-26 19:41:16 +02:00
Benjamin Valentin
a41817bebd
socket_zep: fix reboot
...
The `_zep_params_setup()` function will modify the `argv` string passed to it.
This is a problem because that string is re-used on reboot.
The modified string is then later processed in `socket_zep_setup()`, so we have to keep
the memory around.
The `strdup()` fulfills all this and the memory is freed by `execve()` on reboot.
A proper solution would be to parse the strings in `_zep_params_setup()`.
2020-08-26 15:38:03 +02:00
077a43948b
Merge pull request #14849 from hugueslarrive/max_adc_speed
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cpu/stm32/periph/adc: remove MAX_ADC_SPEED from implementations where it is not used
2020-08-26 15:31:19 +02:00
12f670ea22
Merge pull request #14854 from bergzand/pr/fe310/irq_no_timer_init
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fe310: Remove timer initialization from IRQ code
2020-08-26 14:49:40 +02:00
Francisco
f963089b28
Merge pull request #14718 from bergzand/pr/cortexm_common/hard_fault_add_thread_info
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cortexm_common: Add thread info to hard fault handler
2020-08-26 12:40:25 +02:00
0d484f4d3a
cortexm_common: Add thread info to hard fault handler
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While the hard fault handler prints the offending program counter, it
does not print information about the context triggering the hard fault.
This commit adds a line printing the thread ID and name that triggered
the hard fault. If the hard fault is triggered during an ISR, it only
prints that the hard fault happened during ISR context, not which ISR
triggered it.
2020-08-26 11:42:07 +02:00
32297a9818
fe310: Remove timer initialization from IRQ code
...
The RISC-V timer should only be touched by periph/timer and must not be
initialized and enabled by the IRQ code. The current code can cause an
unhandled interrupt when the timer is not used and the mtime register
hits UINT64_MAX.
2020-08-26 10:33:22 +02:00
hugues
629a5af8ed
cpu/stm32/periph/adc_f0: remove unused MAX_ADC_SPEED
2020-08-25 17:16:49 +02:00
hugues
205ae92b84
cpu/stm32/periph/adc_l0: remove unused MAX_ADC_SPEED
2020-08-25 17:15:39 +02:00
hugues
c519149979
cpu/stm32/periph/adc_l1: remove unused MAX_ADC_SPEED
2020-08-25 17:14:55 +02:00
Benjamin Valentin
d2e0af2941
cpu/native: gpio: provide dummy implementations for GPIO IRQ
2020-08-25 13:53:14 +02:00
Benjamin Valentin
39b41d62cd
cpu/native: allow to disable native periph implementations
2020-08-25 13:53:14 +02:00
Frank Hessel
4275b36cdb
cpu/native: Adapt HW SPI for HW GPIO support
2020-08-25 13:53:14 +02:00
Benjamin Valentin
ea25e8580c
cpu/native: add Linux GPIO implementation
2020-08-25 13:53:14 +02:00
Leandro Lanzieri
8b00d14014
Merge pull request #14837 from aabadie/pr/boards/stm32gx_clock_kconfig
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cpu: boards: stm32gx: improve and add Kconfig clock configuration
2020-08-25 13:33:31 +02:00
9b2aa40e03
Merge pull request #14038 from benpicco/mtd_pagewise
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mtd: add page addressed operations to allow access > 4GiB on SD cards
2020-08-25 13:10:20 +02:00
a1038aa70e
cpu: boards: stm32g4: improve clock configuration
2020-08-25 12:55:16 +02:00
a7f9b4d793
Merge pull request #14836 from aabadie/pr/cpu/stm32g4_full_speed
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cpu/stm32g4: add transition phase when raising +80MHz clock
2020-08-25 10:02:13 +02:00
Benjamin Valentin
178167621b
cpu/lpc2387: timer: use bitarithm_test_and_clear()
2020-08-25 09:19:27 +02:00
Benjamin Valentin
8126651009
cpu/lpc2387: timer: implement timer_set()
...
We can achieve greater accuracy for the relative timer_set()
if we don't use the generic implementation.
Use the same approach as used by atmega_common to trigger interrupts
for too small offsets.
tests/periph_timer_short_relative_set should now succeed for all intervals.
2020-08-25 09:19:27 +02:00
Leandro Lanzieri
53187c5ef7
Merge pull request #14782 from benpicco/cpu/sam0_common-full
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cpu/sam0_common: add all parts to Kconfig
2020-08-24 18:38:11 +02:00
Benjamin Valentin
727e9240eb
cpu/arm7_common: enable support for picolibc
2020-08-24 18:08:08 +02:00
Benjamin Valentin
af57b156c3
cpu/lpc23xx: add support for thread-local storage
2020-08-24 18:08:08 +02:00
benpicco
f3e1032f6e
Merge pull request #14827 from keith-packard/pr/libc/picolibc
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Pr/libc/picolibc
2020-08-24 18:06:56 +02:00
Keith Packard
e215261ced
picolibc: Use most NEWLIB code with picolibc
...
In most places, picolibc and newlib are the same, so use
the existing newlib code when compiling with picolibc.
Signed-off-by: Keith Packard <keithp@keithp.com>
2020-08-24 08:26:16 -07:00
Keith Packard
531050ada2
picolibc: Enable TLS support [v4]
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Allocate and initialize a thread-local block for each thread at the
top of the stack.
Set the tls base when switching to a new thread.
Add tdata/tbss linker instructions to cortex_m and risc-v scripts.
Signed-off-by: Keith Packard <keithp@keithp.com>
---
v2:
Squash fixes
v3:
Replace tabs with spaces
v4:
Add tbss to fe310 linker script
2020-08-24 08:26:16 -07:00
Keith Packard
a0d3436486
cpu/fe310: Add PICOLIBC support [v3]
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Disable the newlib-nano stubs code when picolibc is in use
Signed-off-by: Keith Packard <keithp@keithp.com>
---
v2:
Squash fixes in
v3:
call stdio_init in _PICOLIBC_ mode to initialize uart
v3:
Remove call to stdio_init from nanostubs_init, always
call from cpu_init.
2020-08-24 08:24:54 -07:00
Benjamin Valentin
cd5a847684
cpu/sam0_common: define CPU_FAM based on CPU_MODEL
2020-08-24 16:13:18 +02:00
Benjamin Valentin
52a95642d5
sam0/adc: make driver MCU family agnostic
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Replace checks for `CPU_SAMD21` with checks for actual defines.
2020-08-24 16:13:18 +02:00
Benjamin Valentin
7ed4979148
cpu/samd5x: define CPU_COMMON_SAMD5X symbol and use it
2020-08-24 16:13:18 +02:00
Benjamin Valentin
cc7f897cbc
cpu/saml1x: define CPU_COMMON_SAML1X symbol and use it
2020-08-24 16:13:18 +02:00
Benjamin Valentin
5d96151775
cpu/saml21: define CPU_COMMON_SAML21 symbol and use it
2020-08-24 16:13:18 +02:00
Benjamin Valentin
e32b0783c4
cpu/samd21: define CPU_COMMON_SAMD21 symbol and use it
2020-08-24 16:13:18 +02:00
Benjamin Valentin
582da9b233
cpu/sam0_common: add script to generate Kconfig files for all parts
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e.g. Usage:
./sam0_common/dist/kconfig_gen.sh samd51
2020-08-24 16:13:18 +02:00
Benjamin Valentin
bc904cb396
cpu/saml21: add all parts to Kconfig
2020-08-24 16:13:18 +02:00
Benjamin Valentin
2cd0236a8c
cpu/samd5x: add all parts to Kconfig
2020-08-24 16:11:48 +02:00
Benjamin Valentin
6a490af52b
cpu/saml1x: add all parts to Kconfig
2020-08-24 16:11:48 +02:00
Benjamin Valentin
6b7cce02ec
cpu/samd21: add all parts to Kconfig
2020-08-24 16:11:48 +02:00
benpicco
4b91866392
Merge pull request #14781 from ant9000/yarm
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boards/yarm: Support for YARM board
2020-08-24 16:11:17 +02:00
84bbee784d
cpu/stm32: add transition phase when raising +80MHz clock
2020-08-24 15:42:13 +02:00
benpicco
500bb83d16
Merge pull request #14760 from janosbrodbeck/adc/same54
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cpu/sam0_common: ADC: add support for samd5x/same5x
2020-08-24 13:49:21 +02:00
Keith Packard
76f6362292
cpu/fe310: Don't register __libc_fini_array with atexit
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Picolibc makes atexit state per-thread instead of global, so we can't
register destructors with atexit in a non-thread context as we won't
have any TLS space initialized.
Signed-off-by: Keith Packard <keithp@keithp.com>
2020-08-23 13:13:28 -07:00
ff3bee24b9
picolibc: Provide integration into the build system [v3]
...
Support for picolibc as alternative libc implementation is added with
this commit. For now only cortex-m CPU's are supported.
Enable via PICOLIBC=1
---
v2:
squash fixes in
v3:
Remove picolibc integer printf/scanf stuff from sys/Makefile.include,
it gets set in makefiles/libc/picolibc.mk
fixup for dependency
2020-08-23 13:12:57 -07:00
659c351c02
Merge pull request #14821 from bergzand/pr/cortexm_common/enable_mpu_after_config
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cortexm_common: Enable MPU after configuring regions
2020-08-23 18:02:40 +02:00
b4aa2dae3e
cpu/stm32: remove MPU feature from stm32l052t8
2020-08-21 15:25:26 +02:00
Antonio Galea
6a59569f1f
boards/yarm: definition for SAML21J18B CPU model
2020-08-21 15:18:41 +02:00
fd71e09b69
cpu/stm32: disable MPU for stm32g0
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MPU is broken on cortex-m0+ in the current state
2020-08-21 14:56:47 +02:00
e2d8d40792
cortexm_common: Enable MPU after configuring regions
...
Reordering this ensures that the MPU regions are configured before
enabling the MPU and restricting the memory access.
2020-08-21 13:38:59 +02:00
6fa2b44c01
saml1x: Remove MPU feature
...
The MPU on the cortex-m23 has some differences with the MPU on the older
cortex-m devices. It is not implemented in the cortex-m MPU driver. This
removes the available feature as it gives a false sense of security by
advertising the feature, but implementing it with noop's
2020-08-20 14:37:08 +02:00
benpicco
157705c0c6
Merge pull request #14772 from maribu/esp_sched_cleanup
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cpu/esp: Use API to access sched internals
2020-08-20 00:09:35 +02:00
benpicco
5913e0dc25
Merge pull request #14786 from leandrolanzieri/pr/cpu/esp_atmega/check_stdio
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cpu/[esp/atmega]_common: check if other STDIO implementation is selected
2020-08-20 00:08:41 +02:00
János Brodbeck
083b3c167f
sam0/adc: add support for samd5x/same5x
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Add samd5x/same5x support through introducing ADC_DEV as alias for ADC0/ADC1/ADC. ADC (respectively ADC0) is the default if no device is set.
2020-08-19 18:00:29 +02:00
János Brodbeck
7a7f06a3e1
cpu/samd5x: add ADC resolution type
2020-08-19 17:48:37 +02:00
Francisco
e9833f68d6
Merge pull request #14794 from bergzand/pr/stm32/dma_add_unsuported_trigger_define
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stm32: Add define for when DMA channel selection is not supported
2020-08-19 17:13:10 +02:00
5fab8f7a9a
stm32: Add define for when DMA channel selection is not supported
...
This adds a placeholder define for when the DMA peripheral available on
the MCU doesn't support channel/trigger filtering. This is the case on
the stm32f1 and stm32f3 family.
2020-08-19 16:09:55 +02:00
Francisco
505b9b4a30
Merge pull request #14785 from leandrolanzieri/pr/cpu/cc26x2_cc13x2/remove_pm
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cpu/cc26x2_cc13x2: remove unnecessary pm.c
2020-08-19 13:29:16 +02:00
Francisco
4dce666435
Merge pull request #14764 from hugueslarrive/cpu/stm32/periph/dma
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cpu/stm32/periph/dma: add support for STM32F3
2020-08-19 12:53:35 +02:00
hugues
d06aa3cd63
cpu/stm32/periph/dma: add support for STM32F3
2020-08-19 11:26:04 +02:00
hugues
2f0ac9e820
cpu/stm32/periph/spi: use dma_stop for STM32s that need it
2020-08-19 11:25:34 +02:00
Francisco
cc954274a7
Merge pull request #14763 from hugueslarrive/cpu/stm32/vectors/vectors_f3
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cpu/stm32/vectors/vectors_f3: a small fix for STM32F334x8
2020-08-19 10:08:31 +02:00
Leandro Lanzieri
a64461cdad
cpu/esp_common: stdio_uart by default if there is no other
2020-08-19 10:00:35 +02:00
Leandro Lanzieri
67aec8392c
cpu/atmega_common: use stdio_uart only when no other is defined
2020-08-19 10:00:26 +02:00
Leandro Lanzieri
8f9ce7f81f
cpu/cc26x2_cc13x2: remove unnecessary pm.c
...
This CPU families already use the peripheral implementation of
cc26xx_cc13xx for PM.
2020-08-19 09:50:56 +02:00
benpicco
4a2d867339
Merge pull request #14749 from bergzand/pr/stm32/dynamic_spi_freqs
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stm32: Add support for arbitrary SPI clock rates
2020-08-18 17:57:30 +02:00
Benjamin Valentin
277452807b
cpu/esp_common: flash: implement write_page()
2020-08-18 17:25:40 +02:00
9d49a30560
stm32: Remove obsolete spi_divtable tool
2020-08-18 16:55:01 +02:00
b9d62e47d3
stm32: Add support for arbitrary SPI clock rates
2020-08-18 16:55:01 +02:00
benpicco
04df2bbd8a
Merge pull request #14779 from fjmolinas/pr_stm32f1_rtt_fixes
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cpu/stm32/f1/rtt: fixes and improvements
2020-08-18 16:07:00 +02:00
Francisco Molina
14d4d2aacb
cpu/stm32/f1/rtt: don't trigger callbacks if unset
2020-08-18 14:10:15 +02:00
Francisco Molina
0d60b3370a
cpu/stm32/f1/rtt: some fixes to rtt_set_alarm
...
- disable alarm before setting a new one
- save cb and argument context before enabling the ISR
2020-08-18 13:43:10 +02:00
2f30aaaf06
cpu/cortexm_common: use mpu stack guard if DEVELHELP is enabled
2020-08-18 10:26:21 +02:00
benpicco
22d3bf7c51
Merge pull request #14594 from maribu/stm32-eth-cleanup
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cpu/stm32: Clean up / fix periph_eth
2020-08-17 21:16:27 +02:00
Marian Buschsieweke
90c59b1c6f
Merge pull request #14733 from benpicco/cpu/lpc23xx/rtc_cleanup
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cpu/lpc23xx: RTC: cleanup
2020-08-17 20:34:30 +02:00
Marian Buschsieweke
4fcf37c162
cpu/stm32/periph_eth: Handle lost & spurious IRQs
...
Fixes https://github.com/RIOT-OS/RIOT/issues/13496
2020-08-17 20:30:16 +02:00
Marian Buschsieweke
8d8af31e39
driver/stm32_eth: Integrate into periph_eth
...
The stm32_eth driver was build on top of the internal API periph_eth, which
was unused anywhere. (Additionally, with two obscure exceptions, no functions
where declared in headers, making them pretty hard to use anyway.)
The separation of the driver into two layers incurs overhead, but does not
result in cleaner structure or reuse of code. Thus, this artificial separation
was dropped.
2020-08-17 20:29:33 +02:00
Marian Buschsieweke
28ed07d6e3
cpu/stm32/periph_eth: zero-copy TX (-6 KiB RAM)
...
The Ethernet DMA is capable of collecting a frame from multiple chunks, just
like the send function of the netdev interface passes. The send function was
rewritten to just set up the Ethernet DMA up to collect the outgoing frame
while sending. As a result, the send function blocks until the frame is
sent to keep control over the buffers.
This frees 6 KiB of RAM previously used for TX buffers.
2020-08-17 20:29:33 +02:00
Marian Buschsieweke
51fe77afa4
cpu/stm32/periph_eth: configurable buffer size
...
1. Move buffer configuration from boards to cpu/stm32
2. Allow overwriting buffer configuration
- If the default configuration ever needs touching, this will be due to a
use case and should be done by the application rather than the board
3. Reduce default RX buffer size
- Now that handling of frames split up into multiple DMA descriptors works,
we can make use of this
Note: With the significantly smaller RX buffers the driver will now perform
much worse when receiving data at maximum throughput. But as long as frames
are small (which is to be expected for IoT or boarder gateway scenarios) the
performance should not be affected.
2020-08-17 20:29:29 +02:00
Marian Buschsieweke
932c311ee2
cpu/stm32/periph_eth: Fix RX logic
...
If any incoming frame is bigger than a single DMA buffer, the Ethernet DMA will
split the content and use multiple DMA buffers instead. But only the DMA
descriptor of the last Ethernet frame segment will contain the frame length.
Previously, the frame length calculation, reassembly of the frame, and the
freeing of DMA descriptors was completely broken and only worked in case the
received frame was small enough to fit into one DMA buffer. This is now fixed,
so that smaller DMA buffers can safely be used now.
Additionally the interface was simplified: Previously two receive flavors were
implemented, with only one ever being used. None of those function was
public due to missing declarations in headers. The unused interface was
dropped and the remaining was streamlined to better fit the use case.
2020-08-17 20:28:49 +02:00
Marian Buschsieweke
35d46e6dc3
cpu/esp: Use API to access sched internals
...
Replace access to `sched_active_task` and `sched_active_pid` with calls to
`thread_getpid()` and `thread_get_active()`.
2020-08-17 14:05:05 +02:00
Marian Buschsieweke
b657ebc39a
cpu/native: Don't access sched_active_*
...
Replaced accesses to sched_active_* with API calls in C files
2020-08-17 12:16:08 +02:00
Marian Buschsieweke
c01ef33ccc
cpu/msp430_common: Don't access sched_active_*
...
Replaced accesses to sched_active_* with API calls in C files
2020-08-17 12:16:07 +02:00
Marian Buschsieweke
ac394ce826
cpu/mips32r2_common: Don't access sched_active_*
...
Replaced accesses to sched_active_* with API calls in C files
2020-08-17 12:16:07 +02:00
Marian Buschsieweke
346fb432ed
cpu/fe310: Don't access sched_active_*
...
Replaced accesses to sched_active_* with API calls in C files
2020-08-17 12:16:07 +02:00
Marian Buschsieweke
aeedb3ad16
cpu/cortexm_common: Don't access sched_active_*
...
Replaced accesses to sched_active_* with API calls in C files
2020-08-17 11:27:52 +02:00
Marian Buschsieweke
fa12d9ad52
cpu/atmega_common: Don't access sched_active_*
...
Replaced accesses to sched_active_* with API calls in C files
2020-08-17 11:26:19 +02:00
Marian Buschsieweke
da4979963d
cpu/arm7_common: Don't access sched_active_*
...
Replaced accesses to sched_active_* with API calls in C files
2020-08-17 11:22:03 +02:00
Benjamin Valentin
bdc43c245c
cpu/native: RTC: implement rtc_set_alarm()
...
Use xtimer to simulate an RTC timer.
This allows to simulate software that makes use of `rtc_set_alarm()`
on native.
2020-08-16 23:28:30 +02:00
Benjamin Valentin
f0e77840dc
cpu/nrf52: spi_twi_irq add workaround for nRF52810 vendor file
...
Either nRF52810 should define SPIM_COUNT 2 or nRF52805 should
define SPIM_COUNT 1.
But as it nRF52805 defines SPIM_COUNT 2 and nRF52810 defines SPIM_COUNT 1
even though both have a single SPI and a single, separate TWI peripheral.
Re-define SPIM_COUNT to 2 on nRF52810 as this is the easiest solution.
2020-08-16 23:26:17 +02:00
Benjamin Valentin
5ecf2e8bb1
cpu/nrf52: ensure PWM is present
...
Not all members of the family have a PWM peripheral
2020-08-16 23:26:17 +02:00
Benjamin Valentin
899e97af30
cpu/nrf52: add definitions for remaining family members
2020-08-16 23:26:17 +02:00
hugues
7b3b10303b
cpu/stm32/vectors/vectors_f3: a small fix for STM32F334x8
2020-08-14 14:03:10 +02:00
Cenk Gündoğan
f64511ddb5
Merge pull request #14626 from leandrolanzieri/pr/kconfig/test_modules_kconfig
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kconfig: introduce migration test in CI
2020-08-13 14:11:00 +02:00
Benjamin Valentin
2509c206ee
cpu/lm4f120: GPIO: clear stale interrupt
2020-08-13 10:12:21 +02:00
7e411ec1b0
Merge pull request #14741 from fjmolinas/pr_fe310_configurable_rtt
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cpu/fe310: add unified rtt configuration
2020-08-12 18:36:15 +02:00
Francisco Molina
442b11d0ee
cpu/fe310: add unified rtt configuration
2020-08-12 14:46:59 +02:00
Leandro Lanzieri
7dc6639f59
cpu/cortexm_common: add default Kconfig configuration
2020-08-12 12:22:43 +02:00
Leandro Lanzieri
f4e651e26d
cpu/sam0_common: Add default Kconfig configuration
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The configuration file is included by samd21 so it is merged when using
Kconfig.
2020-08-12 12:22:42 +02:00
Leandro Lanzieri
b98527ef53
cpu: Add 'periph' module to Kconfig
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Select it from cortexm_common module as it is always needed.
2020-08-12 12:22:39 +02:00
Leandro Lanzieri
0ddd2886b7
cpu/sam0_common: add sam0_common_periph module to Kconfig
2020-08-12 12:22:39 +02:00
Leandro Lanzieri
2d53003ee2
cpu/cortexm_common: Model cortexm_common modules
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This models cortexm_common and cortexm_common_periph modules.
2020-08-12 12:22:39 +02:00
Leandro Lanzieri
4ad2180f81
kconfig: Add default modules' symbols
2020-08-12 12:22:38 +02:00
Francisco Molina
8ed8daa493
cpu/cc2538/timer: fix 32 bit timer reload value
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The interval load value was only set to 0xffff regardless of the counter
mode used which mad the 32bit timer apparently stop after 0xffff (it
would never reach values >0xffff).
When a GPTM is configured to one of the 32-bit modes, TAILR appears as a
32-bit register (the upper 16-bits correspond to the contents of the
GPTM Timer B Interval Load (TBILR) register). In a 16-bit mode, the
upper 16 bits of this register read as 0s and have no effect on the
state of TBILR.
Thsi commit set the correct value for TAILR depending on the configured
timer mode.
2020-08-12 11:35:42 +02:00
benpicco
419ee52ddc
Merge pull request #14711 from benpicco/cpu/sam0_common/gpio-intermediate_irq
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cpu/sam0_common: GPIO: ignore stale interrupts
2020-08-11 16:32:57 +02:00
benpicco
ea42705637
Merge pull request #14564 from benpicco/cpu/stm32-bitarithm_test_and_clear
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cpu/stm32: GPIO: use bitarithm_test_and_clear()
2020-08-11 14:05:38 +02:00
benpicco
3ef906c841
Merge pull request #14563 from benpicco/cpu/sam0_common-bitarithm_test_and_clear
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cpu/sam0_common: GPIO: use bitarithm_test_and_clear()
2020-08-11 14:05:06 +02:00
Francisco
16f47fc893
Merge pull request #14502 from benpicco/cpu/sam0_common/flashpage_cleanup
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cpu/sam0_common: flashpage: clean up implementation
2020-08-10 08:21:49 +02:00
Marian Buschsieweke
7d9aed7f66
Merge pull request #14391 from benpicco/cpu/stm32-timer_periodic
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cpu/stm32: implement periph_timer_periodic
2020-08-10 07:58:27 +02:00
Benjamin Valentin
a0972c9e0c
cpu/stm32: implement periph_timer_periodic
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Seems like the Interrupt flag for a Capture/Compare channel gets set when
- the CC-value is reached
- the timer resets before the CC value is reached.
We only want the first event and ignore the second one. Unfortunately I did
not find a way to disable the second event type, so it is filtered in software.
That is we need to
- ignore the CC-interrupts when the COUNT register register is reset
- ignore the CC-interrupts > TOP value/ARR (auto-reload register)
2020-08-09 22:55:22 +02:00
Benjamin Valentin
91ad431e34
cpu/nrf52: fix nrf52811 vector definition
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SWI2 was missing - compare with vendor/nrf52811.h
2020-08-09 21:46:06 +02:00
Benjamin Valentin
4980cb7abe
cpu/nrf52: fix nrf52832 vector definition
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The CPU has 39 interrupt vectors and the FPU interrupt is the last one.
(Yes this MCU has an FPU).
Compare with vendor/nrf52.h
2020-08-09 21:46:06 +02:00
Benjamin Valentin
3f8bb169c6
cpu/nrf52: fix nrf52840 vector definition
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The CPU has 48 interrupt vectors and spi3 is the last one.
See vendor/nrf52840.h
2020-08-09 21:46:06 +02:00
Benjamin Valentin
ec67798cf0
cpu/nrf52: fix spi_twi_irq for nrf52805/10/11
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These smaller parts have SPI1 mapped to TWI0 (if SPI1 exists at all).
2020-08-09 21:46:06 +02:00
Benjamin Valentin
ca2b7e1952
cpu/nrf5x_common: UART: capture whole nrf52 lineup
2020-08-09 21:46:06 +02:00
Benjamin Valentin
1713dca711
cpu/nrf52: gpio: fix build for nrf52811
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We can use a more general conditional here.
2020-08-09 21:46:06 +02:00
Benjamin Valentin
2f236cb092
cpu/nrf52: only enable instruction cache if available
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The instruction cache is not available on all nrf52 MCUs.
2020-08-09 21:46:06 +02:00
Benjamin Valentin
ea2638dcac
cpu/nrf52: split up vector definition
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The interrupt vectors vary between each member of the family.
To retain sanity, split the vectors file up for each MCU.
2020-08-09 21:46:06 +02:00
Benjamin Valentin
307495985a
cpu/nrf52: not all parts have a FPU
2020-08-09 21:46:06 +02:00
Benjamin Valentin
7a9e68af96
cpu/nrf52: add vendor files for nrf52805/10/20/33
2020-08-09 21:46:06 +02:00
Marian Buschsieweke
234a720571
Merge pull request #14516 from benpicco/bitband_hw
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cortexm_common: fix check for bitbanding feature
2020-08-08 14:26:49 +02:00
Benjamin Valentin
0e22910c94
cpu/sam_common: set CPU_HAS_BITBAND
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- https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-11057-32-bit-Cortex-M3-Microcontroller-SAM3X-SAM3A_Datasheet.pdf
- http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-11100-32-bit%20Cortex-M4-Microcontroller-SAM4S_Datasheet.pdf
2020-08-08 12:44:11 +02:00
Benjamin Valentin
e886dad430
cpu/lpc1768: set CPU_HAS_BITBAND
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> Support for Cortex-M3 bit banding.
https://www.nxp.com/docs/en/data-sheet/LPC1769_68_67_66_65_64_63.pdf
2020-08-08 12:44:11 +02:00
Benjamin Valentin
225f56b5e6
cpu/lm4f120: set CPU_HAS_BITBAND
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> A bit-band region maps each word in a bit-band alias region to a single bit in the bit-band region.
> The bit-band regions occupy the lowest 1 MB of the SRAM and peripheral memory regions. A
https://www.mouser.com/datasheet/2/405/lm4f120h5qr-124014.pdf
2020-08-08 12:44:11 +02:00
Benjamin Valentin
fae0b00918
cpu/cc26x0: set CPU_HAS_BITBAND
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> Bit-banding is supported in order to reduce the execution time for
> read-modify-write (RMW) operations to memory.
> With bit-banding, certain regions in the memory map
> (SRAM and peripheral space) can use address aliases to access
> individual bits in one atomic operation.
https://www.ti.com/lit/ug/swcu117i/swcu117i.pdf
2020-08-08 12:44:11 +02:00
Benjamin Valentin
098b37a7dc
cpu/cc26x2_cc13x2: set CPU_HAS_BITBAND
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> Bit-banding is supported in order to reduce the execution time for
> read-modify-write (RMW) operations to memory.
> With bit-banding, certain regions in the memory map
> (SRAM and peripheral space) can use address aliases to access
> individual bits in one atomic operation.
https://www.ti.com/lit/ug/swcu185d/swcu185d.pdf
2020-08-08 12:44:11 +02:00
Benjamin Valentin
b8d49fe627
cpu/cc2538: set CPU_HAS_BITBAND
2020-08-08 12:44:11 +02:00
Benjamin Valentin
848326bed6
cpu/lpc23xx: RTC: cleanup
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- reduce indentation
- sanitize logic in rtc_set_alarm()
- ILR register is clear-on-write, writing 0 has no effect
2020-08-07 19:25:38 +02:00
benpicco
4635be207b
Merge pull request #14726 from benpicco/riot_epoch
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drivers/periph_common: RTC: use RIOT_EPOCH as the RTC reset value
2020-08-07 19:07:28 +02:00
Leandro Lanzieri
6b52c53db3
Merge pull request #14614 from aabadie/pr/boards/hifive1_clock_kconfig
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boards/hifive1*: add kconfig options to configure the clock
2020-08-07 17:40:08 +02:00
Benjamin Valentin
97bf000bcd
cpu/stm32: use RIOT_EPOCH
2020-08-07 17:39:25 +02:00
Benjamin Valentin
69c436b891
cpu/ezr32wg: set CPU_HAS_BITBAND
2020-08-07 17:38:38 +02:00
benpicco
a455d74621
Merge pull request #14729 from gschorcht/cpu/esp32/vendor_dependeny_boarddir
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cpu/esp32: remove the dependency of vendor code on BOARDDIR
2020-08-07 17:03:40 +02:00
benpicco
cc1ffc8a4d
Merge pull request #13357 from benemorius/pr/efm32-letimer
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cpu/efm32/timer: add support for LETIMER
2020-08-07 17:03:01 +02:00
Gunar Schorcht
d19a1f5af5
cpu/esp32: remove the dependency of vendor code on BOARDDIR
2020-08-07 16:09:12 +02:00
benpicco
574676b150
Merge pull request #14700 from fjmolinas/to_cc2538_enhance_rtt
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cpu/cc2538: RTT: implement missing API functions
2020-08-07 15:11:53 +02:00
Benjamin Valentin
6d684ee748
cpu/lpc23xx: use RIOT_EPOCH
2020-08-07 13:24:58 +02:00
Benjamin Valentin
d02aa4a6b5
cpu/sam0_common: RTC: use RIOT_EPOCH
2020-08-07 13:24:10 +02:00
7acf81552a
boards/hifive1* cpu/fe310: improve clock customization
2020-08-06 15:59:34 +02:00
Benjamin Valentin
39d71ac671
cpu/sam0_common: GPIO: ignore interrupts when interrupts are disabled
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If we disable an external interrupt, GPIO events that would generate an interrupt will still set the interrupt flag.
That means once we enable the interrupt again, a stale interrupt will be triggered.
This is surprising and probably not what the user wants, unfortunately the API documentation is not very clear about what to expect.
There is however no way to drop those intermediate interrupts with the current API.
Ignoring the events that occurred while the GPIO interrupt were disabled is probably the right (and expected) thing to.
2020-08-05 16:57:05 +02:00
789f10e816
cpu/msp430_common: increase THREAD_STACKSIZE_DEFAULT to 384
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Both tests/pthread_tls and tests/prng_sha256prng fail without this, but
other platforms run fine with their defaults. Lets consider the higher
value a better default.
2020-08-05 14:32:58 +02:00
4f233cd7ea
cpu: remove cc430
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The only board with this chipset was the chronos, which has been
removed.
2020-08-05 14:32:58 +02:00
038823c731
cpu/msp430_common/vendor/README.md: add some explanation
2020-08-05 14:32:58 +02:00
5a00e2e36c
cpu/msp430_common: use __stack for ISR stacks
2020-08-05 14:32:58 +02:00
aa2f500d51
cpu/msp430_common: update thread_stack_init to changed ABI
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The old mspgcc used R15-R12 for args 0-3. The newer MSP430 EABI uses
R12-15.
See https://www.ti.com/lit/an/slaa664/slaa664.pdf for more details.
2020-08-05 14:32:58 +02:00
909d740d37
cpu/msp430_common: bump msp430-gcc-support-files to 1.210
2020-08-05 14:32:58 +02:00
ef099f9d46
cpu/msp430_common: add NOPs to irq functions
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They might not be necessary, but GCC warns if they're absent.
Thus let's pay the one or two extra instructions for silencing the
warnings.
2020-08-05 14:32:58 +02:00
08c50947cc
cpu/msp430_common: move newlib default module decl to Makefile.dep
2020-08-05 14:32:58 +02:00
fd335d30ee
cpu/msp430: re-create c11_atomics_compat_cpu.hpp using msp430-elf-gcc
2020-08-05 14:32:58 +02:00
10213057b1
cpu/msp430: update deps, move to Makefile.dep
2020-08-05 14:32:57 +02:00
260ec3666f
cpu/msp430: select newlib_nano module if newlib is used
2020-08-05 14:29:07 +02:00
8753457e45
cpu/msp430_common: use default newlib heap_stats
2020-08-05 14:29:07 +02:00
9db23b6c3d
cpu/cc430: update to new support headers
2020-08-05 14:29:07 +02:00
dbcf59f196
cpu/msp430: call newlib _init() in startup script
2020-08-05 14:29:07 +02:00
178e39afc2
cpu/msp430: remove obsolete stdio code
2020-08-05 14:29:07 +02:00
30cf61dd35
cpu/msp430: remove obsolete msp430 specific headers
2020-08-05 14:29:07 +02:00
a0aeeb5ff4
cpu/msp430: update to modern gcc & newlib
2020-08-05 14:29:00 +02:00
bf072bdd55
cpu/msp430_common: add msp430-gcc-support-files 1.208
2020-08-05 14:27:25 +02:00
0268a772ed
Revert "cpu/msp430_common: set top of heap for sbrk"
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This reverts commit 55f433103b
2020-08-05 14:27:25 +02:00
5b6534e02d
Revert "cpu/msp430_common: add real malloc/free functions"
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This reverts commit 419cedf58e
2020-08-05 14:27:25 +02:00
Benjamin Valentin
a8d5f13ad9
cpu/cc2538: rtt: allow to set alarm and overflow cb independently
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Previously the setting the alarm would overwrite the overflow callback
and vice versa.
Since we can only set one alarm in hardware, always set the alarm to the
closest event of the two.
2020-08-04 16:22:44 +02:00
Benjamin Valentin
852fd7f531
cpu/cc2538: rtt: implement rtt_get_alarm()
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We can't read back the alarm, so just store it in a variable.
2020-08-04 16:21:19 +02:00
Benjamin Valentin
d7f722e98f
cpu/cc2538: rtt: implement rtt_set_counter()
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We can't set the hardware counter directly, so always add an offset.
2020-08-04 16:21:17 +02:00
Leandro Lanzieri
d7dbbb71ac
Merge pull request #14226 from benpicco/cpu/sam0_common/i2c_arbitrary_freqs
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cpu/sam0_common: i2c: fix BAUD handling & cleanup
2020-08-04 14:49:10 +02:00
Benjamin Valentin
1472d2095c
cpu/sam0_common: i2c: document frequency constraints
2020-08-04 12:13:28 +02:00
Benjamin Valentin
e560042488
cpu/sam0_common: flashpage: split RWWEE and normal functions
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Move common code into helper functions and extract the commands
that differ between normal and RWWEE page reading / writing.
This cuts down on `#ifdef` use.
2020-08-04 12:00:49 +02:00
Peter Kietzmann
6adf07caf0
Merge pull request #14672 from jia200x/pr/fix_cc2538_rssi
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cc2538: fix RSSI offset
2020-08-03 09:45:16 +02:00
Peter Kietzmann
c1f83aeac8
Merge pull request #14673 from jia200x/pr/fix_nrf_pow
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nrf802154: fix set_tx_power function
2020-08-02 15:19:51 +02:00
Benjamin Valentin
548f59d380
cpu/samd5x: remove RTC workaround
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This is no longer needed.
2020-07-31 22:00:09 +02:00
Benjamin Valentin
83a56ae666
cpu/sam0_common: merge RTC & RTT implementation
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The RTC and RTT share the same peripheral, so they can also
share the same code.
This is needed to integrate the Tamper Detection into common
RTC/RTT code.
2020-07-31 22:00:09 +02:00
Jose Alamos
5c824f6f12
nrf802154: fix set_tx_power function
2020-07-31 17:16:10 +02:00
Jose Alamos
519f8f4529
cc2538: fix RSSI offset
2020-07-31 16:08:04 +02:00
Francisco
7e6fee8260
Merge pull request #14615 from maribu/atmega-idle-stack-size
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cpu/atmega_common: Increase idle stack size with xtimer
2020-07-30 14:43:20 +02:00
Martine Lenders
5cd3ded485
Merge pull request #14649 from gschorcht/cpu/esp32/cleanu_cpp
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cpu/esp32: cleanup of C++ hacks
2020-07-29 11:20:44 +02:00
Francisco
9adc79f91a
Merge pull request #14562 from benpicco/cpu/cc2538-bitarithm_test_and_clear
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cpu/cc2538: GPIO: use bitarithm_test_and_clear()
2020-07-29 10:38:37 +02:00
Gunar Schorcht
2ed4486f21
cpu/esp32: cleanup of C++ hacks
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Since former ESP32 toolchain versions used POSIX threads, module `pthread` was required. The built-in `cxa_ctor_guards` had to be replaced since they used the `pthread_once` function for singleton objects initialization where the parameter `once` was of incompatible type with that provided by RIOT's `pthread` module. The current ESP32 toolchain version no longer uses POSIX threads. The dependency on module `pthread` as well as according C++ hacks can be removed.
2020-07-29 10:14:57 +02:00
Martine Lenders
b1bf8ab981
Merge pull request #14565 from bergzand/pr/sched/fix_retrigger
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sched: Prevent retriggering the scheduler interrupt during idle sleep
2020-07-28 22:11:25 +02:00
Marian Buschsieweke
9a14903066
Merge pull request #14326 from benpicco/cpu/sam0_common/uart_arithmetic
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cpu/sam0_common: UART: implement arithmetic BAUD mode
2020-07-28 19:43:25 +02:00
Martine Lenders
ab88a96a4a
Merge pull request #14638 from benpicco/cpu/native/async_read-cleanup
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cpu/native/async_read: close fds on cleanup
2020-07-28 18:39:41 +02:00
0b1a793dbe
Merge pull request #14624 from kaspar030/fix_msp430_thread_yield_higher
2020-07-28 16:32:30 +02:00
Benjamin Valentin
bd2e6c30e6
cpu/native/async_read: close fds on cleanup
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This was lost when moving to poll().
We need to close the fds on cleanup.
fixes #14636
2020-07-28 14:47:59 +02:00
1d46cf70eb
cpu/msp430_common: fix thread_yield_higher() when called in isr
2020-07-28 13:27:55 +02:00
Benjamin Valentin
274357d583
cpu/lpc23xx: GPIO: use bitarithm_test_and_clear()
2020-07-28 12:44:36 +02:00
Benjamin Valentin
08b3e2bd6b
cpu/cc2538: GPIO: use bitarithm_test_and_clear()
2020-07-28 12:44:23 +02:00
Benjamin Valentin
cc2a3c9fd3
cpu/sam0_common: GPIO: use bitarithm_test_and_clear()
2020-07-28 12:43:39 +02:00
Benjamin Valentin
9970c57cdf
cpu/stm32: GPIO: use bitarithm_test_and_clear()
2020-07-28 12:43:24 +02:00
benpicco
403b6b15c6
Merge pull request #14481 from maribu/cpp-fix-linking
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Makefile.{base,include}: Fix linking for C++ code in external modules
2020-07-28 12:42:14 +02:00
Benjamin Valentin
003c25b2e8
cpu/sam0_common: uart: document frequency constraints
2020-07-28 11:22:22 +02:00
Benjamin Valentin
e1f84de6c5
cpu/sam0_common: UART: simplify init sequence
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We don't need to read-modify-write the CTRLA register to disable
the UART.
The entire CTRLA register is re-written just a few lines below, so
we can just set it to 0 to disable the UART.
There is also no need to reset the UART since we re-write all config
registers in init.
2020-07-28 11:22:22 +02:00
Benjamin Valentin
28c1c502bc
cpu/sam0_common: UART: implement arithmetic BAUD mode
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SAMD20 does not implement a Fractional Baud mode, so we have to
implement Asynchronous Arithmetic mode.
2020-07-28 11:22:22 +02:00
benpicco
ecab75b529
Merge pull request #13632 from benpicco/cpu/sam0_common/uart-deinit
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drivers/periph/uart: add periph_uart_reconfigure feature & implementation for sam0
2020-07-28 11:12:19 +02:00
d59233baf1
Merge pull request #14556 from benpicco/bitarithm_test_and_clear
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core/bitarithm: add bitarithm_test_and_clear()
2020-07-28 10:11:47 +02:00
Benjamin Valentin
e6f33fc436
cpu/sam0_common: uart: implement the periph_uart_reconfigure feature
2020-07-28 10:10:15 +02:00
Benjamin Valentin
62dbb21f19
cpu/sam0_common: UART move pin configuration to function
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Makes the init code easier to read.
2020-07-28 10:10:15 +02:00
benpicco
22e9ba12a3
Merge pull request #14598 from maribu/avr-cpp
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cpu/atmega_common: Provide C++ support (without libstdc++)
2020-07-27 17:41:31 +02:00
Marian Buschsieweke
040bad0425
cpu/atmega_common: increase stack size with xtimer
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If a timer triggers while the idle thread is running, previously a stack
overflow was triggered. This commit increases the idle threads stack size if
xtimer is used.
2020-07-27 16:52:36 +02:00
millotp
69858916c7
boards: enable CAN bus on nucleo-f446re & nucleo-f446ze
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Changed the pinout for the CAN bus:
CAN RX: PB8
CAN TX: PB9
And added periph_can to FEATURES_PROVIDED and to Kconfig files
2020-07-27 14:36:29 +02:00
Marian Buschsieweke
53375f04bf
cpu/stm32/periph_eth: Optimize / fix flush
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- Added missing wait for TX flush
- Grouped access to the same registers of the Ethernet PHY to reduce accesses.
(The compiler won't optimize accesses to `volatile`, as defined in the C
standard.)
2020-07-26 22:12:03 +02:00
Marian Buschsieweke
a5dbec33d9
cpu/stm32/periph_eth: Cleanup & fix DMA descriptor
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- Add missing `volatile` to DMA descriptor, as memory is also accessed by the
DMA without knowledge of the compiler
- Dropped `__attribute__((packed))` from DMA descriptor
- The DMA descriptor fields need to be aligned on word boundries to
properly function
- The compiler can now more efficiently access the fields (safes ~300 B ROM)
- Moved the DMA descriptor struct and the flags to `periph_cpu.h`
- This allows Doxygen documentation being build for it
- Those types and fields are needed for a future PTP implementation
- Renamed DMA descriptor flags
- They now reflect to which field in the DMA descriptor they refer to, so
that confusion is avoided
- Added documentation to the DMA descriptor and the corresponding flags
2020-07-26 22:12:03 +02:00
Benjamin Valentin
4df36cbfda
cpu/sam0_common: i2c: improve readability of baud rate calculation
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Use variables to represent fSCL an fGCLK to make the baud rate calculation
more readable.
2020-07-25 15:14:55 +02:00
Benjamin Valentin
2fb0d9061f
cpu/sam0_common: i2c: fix High Speed
2020-07-25 15:14:55 +02:00
Benjamin Valentin
7269dc4e3a
cpu/sam0_common: i2c: allow arbitrary I2C frequencies
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The Atmel I2C peripheral supports arbitrary I2C frequencies.
Since the `i2c_speed_t` enum just encodes the raw frequency values,
we can just use them in the peripheral definition.
We just have to remove the switch-case block that will generate an error
for values outside of `i2c_speed_t`.
2020-07-25 15:14:55 +02:00
42eb044ec6
Merge pull request #14482 from hugueslarrive/cpu/stm32/periph/pwm
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cpu/stm32/periph/pwm: some bugfixes...
2020-07-24 21:05:57 +02:00
Marian Buschsieweke
7b49310147
cpu/atmega_common: Enable cpp feature
2020-07-24 15:22:34 +02:00
Marian Buschsieweke
7d4911e3ad
cpu/native/Kconfig: Select HAS_LIBSTDCPP
2020-07-23 20:34:20 +02:00
Marian Buschsieweke
c6df3ad643
cpu/arm7_common/Kconfig: Select HAS_LIBSTDCPP
2020-07-23 20:30:26 +02:00
Marian Buschsieweke
d15606908a
cpu/mips32r2_common/Kconfig: Select HAS_LIBSTDCPP
2020-07-23 20:28:32 +02:00
Marian Buschsieweke
f8b7c899f8
cpu/esp_common: Allows use feature cpp
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The vendor code uses C++ code, thus, C++ support needs to be enabled in any
case.
2020-07-23 20:18:33 +02:00
benpicco
f3bce19646
Merge pull request #14503 from maribu/cpp-feature
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build system: Add libstdcpp feature and doc
2020-07-23 19:05:10 +02:00
107356ec5d
Merge pull request #14575 from gschorcht/cpu/stm32/fix_gpio_definition
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cpu/stm32: GPIO ports definition fix
2020-07-23 12:24:44 +02:00
56f9a4a686
Merge pull request #14577 from fjmolinas/pr_cc2538_uart_write_synchronous
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cpu/cc2538/uart: uart_write wait for all bytes to be sent
2020-07-22 14:51:50 +02:00
Francisco Molina
da171f2254
cpu/cc2538/uart: uart_write wait for all bytes to be sent
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uart_write should block until all bytes are sent out, so wait for
transmit fifo to empty before returning.
2020-07-22 12:56:12 +02:00
Gunar Schorcht
044d08d599
cpu/stm32: GPIO ports definition fix
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The available GPIO ports may also differ within a family. Therefore, the vendor definitions GPIO* are used instad of CPU_FAM_STM definitions to determine which ports are available for a certain MCU.
2020-07-22 09:13:52 +02:00
Benjamin Valentin
464dc63f08
cpu/arm7_common: add __ARM_FEATURE_CLZ feature test
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The feature test macro should work on all ARM CPUs supported by gcc.
2020-07-21 16:03:59 +02:00
Benjamin Valentin
a8904edd7d
core/bitarithm: add bitarithm_test_and_clear()
2020-07-21 16:03:59 +02:00
185f703c23
Merge pull request #14163 from aabadie/pr/cpu/stm32g0
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cpu/stm32g0: add basic support + add nucleo-g070rb board
2020-07-21 14:53:59 +02:00
b7219d68f4
Merge pull request #12428 from benpicco/native_poll
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native/async_read: use poll() instead of select()
2020-07-21 14:01:32 +02:00
fc1d642113
cpu/cortexm_init: add specific case for stm32g0 svcall irq
2020-07-21 12:45:25 +02:00
dada52ecd2
cpu/stm32: add stm32g0 support
2020-07-21 12:45:25 +02:00
0b549c6e0c
Merge pull request #14152 from aabadie/pr/pkg/stm32cube
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pkg/stm32cmsis: retrieve STM32 CMSIS header from a package
2020-07-21 12:27:19 +02:00
47e2885f80
cpu/native: async_read: add native_async_read_add_int_handler()
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fcntl(fd, F_SETOWN, getpid()); doesn't seem to work on Linux
to get generate a signal when an event on the GPIO fd occurs.
So fall back to the same method as on OS X and call poll() in
a child process.
2020-07-21 11:50:18 +02:00
a274ea45fc
cpu/native: async_read: rewrite select() call to poll()
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select() can not listen to POLLPRI events which are used by the
Kernel's GPIO API.
In preparation for that, rewrite async_read() to use poll() instead
of select().
2020-07-21 11:50:18 +02:00
0eb66a429f
cortexm_common: Clear PendSV request after idle sleep
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The PendSV interrupt is used to request a scheduling operation. An
interrupt during the idle sleep can re-request the PendSV interrupt,
while the PendSV is still busy scheduling the next thread. This clears
the request after sleep to prevent triggering an extra PendSV interrupt
after the current PendSV handler finished.
2020-07-21 11:23:49 +02:00
f013be5507
Merge pull request #14497 from aabadie/pr/drivers/makefile_dep_cleanup
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drivers/Makefile.dep: remove inappropriate use of FEATURES_PROVIDED for rtt_rtc
2020-07-20 13:04:59 +02:00
Benjamin Valentin
c5f6a5c6f5
cpu/sam0_common: PWM: prepare for TC timers as PWM source
2020-07-19 01:38:15 +02:00
Benjamin Valentin
a96e5666b4
cpu/sam0_common: PWM: fix doxygen group
2020-07-19 01:38:15 +02:00
Leandro Lanzieri
64f75bcc30
cpu/saml21: Add Kconfig symbols
2020-07-16 21:29:46 +02:00
4da79fa0ca
Merge pull request #14471 from leandrolanzieri/pr/kconfig/lpc2387_boards_symbols
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boards/lpc2387-based: Model features in Kconfig
2020-07-16 21:25:00 +02:00
3b778451e1
Merge pull request #14485 from leandrolanzieri/pr/kconfig/saml1x_based_symbols
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boards/saml1x-based: Model features in Kconfig
2020-07-16 21:04:22 +02:00
Leandro Lanzieri
110793be0c
cpu/lpc23xx: Add Kconfig symbols
2020-07-16 19:03:38 +02:00
Leandro Lanzieri
c71c2b79a7
cpu/arm7_common: Add Kconfig symbols
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HAS_ARCH_ARM features now is moved to Kconfig.features as it is being
used by multiple architectures.
2020-07-16 19:03:38 +02:00
a20d663086
Merge pull request #14470 from leandrolanzieri/pr/kconfig/lpc1768_boards_symbols
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boards/lpc1768-based: Model features in Kconfig
2020-07-16 18:59:55 +02:00
d0fb8d727a
Merge pull request #14539 from aabadie/pr/cpu/lpc2387_rename
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cpu/lpc2387: rename to lpc23xx
2020-07-16 18:38:47 +02:00
Leandro Lanzieri
38636a8089
cpu/saml1x: Add Kconfig symbols
2020-07-16 18:09:59 +02:00
Leandro Lanzieri
84de2d8f7b
cpu/saml1x: Specify CPU_FAM only in Makefile.features
2020-07-16 18:09:58 +02:00
e246e7ed2a
Merge pull request #14538 from leandrolanzieri/pr/kconfig/native_symbols
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boards/native: Model features in Kconfig
2020-07-16 18:04:42 +02:00
dea506a719
cpu/stm32wb: define missing IMR bit in CMSIS
2020-07-16 17:35:50 +02:00
1a095b36fa
cpu/stm32: adapt UART driver for stm32l4r5 cpu line
2020-07-16 17:35:49 +02:00
8e87dedbce
cpu/stm32: remove not needed CMSIS vendor headers
2020-07-16 17:35:49 +02:00
f21440b176
cpu/stm32: use CMSIS headers from the stm32cmsis package
2020-07-16 17:35:48 +02:00
1f0a3a6bae
cpu/cortexm_common: add special case for SVC interrupt configuration
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by default stm32f0/l0/l1 families simply call the interrupt enum SVC_IRQn
2020-07-16 17:35:48 +02:00
def5f80998
Merge pull request #14477 from leandrolanzieri/pr/kconfig/sam3_boards_symbols
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boards/sam3-based: Model features in Kconfig
2020-07-16 17:07:03 +02:00
0a699e87c7
cpu/lpc23xx: rename remaining occurrences of lpc2387
2020-07-16 17:01:10 +02:00
46a053e674
cpu/lpc23xx: rename Doxygen group
2020-07-16 17:01:10 +02:00
829b16b472
cpu/lpc23xx: rename lpc2387 to lpc23xx
2020-07-16 17:01:10 +02:00
a4129d0f8f
Merge pull request #14483 from leandrolanzieri/pr/kconfig/samd5x_based_symbols
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boards/same54-xpro: Model features in Kconfig
2020-07-16 16:38:21 +02:00
Leandro Lanzieri
8e5c0f3f84
cpu/lpc1768: Add Kconfig symbols
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Also specify CPU_FAM in Makefile.features
2020-07-16 15:39:02 +02:00
Leandro Lanzieri
44be83e4bb
cpu/sam3: Add Kconfig symbols
2020-07-16 15:35:23 +02:00
Martine Lenders
ea8e867611
Merge pull request #14534 from bergzand/pr/cortexm/irq_during_idle
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cortexm_common: disable IRQ during thread_sched_idle
2020-07-16 15:35:14 +02:00
Leandro Lanzieri
1c9a95e955
cpu/samd5x: Add Kconfig symbols
2020-07-16 15:33:29 +02:00
15110af51c
Merge pull request #14475 from leandrolanzieri/pr/kconfig/mips32r2_boards_symbols
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boards/mips32r2-based: Model features in Kconfig
2020-07-16 15:14:29 +02:00
Benjamin Valentin
f53ae74269
cpu/kinetis: set CPU_HAS_BITBAND
2020-07-16 14:44:28 +02:00
Benjamin Valentin
8f36c88b93
cpu/stm32: set CPU_HAS_BITBAND
2020-07-16 14:44:28 +02:00
Benjamin Valentin
b716419462
cpu/efm32: set CPU_HAS_BITBAND
2020-07-16 14:44:28 +02:00
Benjamin Valentin
95ec5890b0
cortexm_common: fix bit-banding check
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Not all MCUs ≥ Cortex-M3 provide the Bit-Banding feature.
It is up to the manufacturer to implement it.
Instead, rely on the CPU_HAS_BITBAND being set in `periph_cpu.h`.
2020-07-16 14:44:28 +02:00
