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cpu/saml1x: define CPU_COMMON_SAML1X symbol and use it
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@ -78,7 +78,7 @@ extern "C" {
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#define CPU_IRQ_NUMOF PERIPH_COUNT_IRQn
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#define CPU_FLASH_BASE FLASH_ADDR
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#ifdef CPU_SAML1X
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#ifdef CPU_COMMON_SAML1X
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#define CPU_FLASH_RWWEE_BASE DATAFLASH_ADDR
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#else
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#define CPU_FLASH_RWWEE_BASE NVMCTRL_RWW_EEPROM_ADDR
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@ -49,7 +49,7 @@
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/**
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* @brief Number of external interrupt lines
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*/
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#ifdef CPU_SAML1X
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#ifdef CPU_COMMON_SAML1X
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#define NUMOF_IRQS (8U)
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#else
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#define NUMOF_IRQS (16U)
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@ -231,7 +231,7 @@ int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
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_EIC->CONFIG[exti >> 3].reg &= ~(0xf << ((exti & 0x7) * 4));
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_EIC->CONFIG[exti >> 3].reg |= (flank << ((exti & 0x7) * 4));
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/* enable the global EIC interrupt */
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#ifdef CPU_SAML1X
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#ifdef CPU_COMMON_SAML1X
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/* EXTI[4..7] are binded to EIC_OTHER_IRQn */
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NVIC_EnableIRQ((exti > 3 )? EIC_OTHER_IRQn : (EIC_0_IRQn + exti));
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#elif defined(CPU_SAMD5X)
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@ -339,7 +339,7 @@ void gpio_irq_disable(gpio_t pin)
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_EIC->INTENCLR.reg = (1 << exti);
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}
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#if defined(CPU_SAML1X)
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#if defined(CPU_COMMON_SAML1X)
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void isr_eic_other(void)
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#else
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void isr_eic(void)
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@ -360,7 +360,7 @@ void isr_eic(void)
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cortexm_isr_end();
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}
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#if defined(CPU_SAML1X) || defined(CPU_SAMD5X)
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#if defined(CPU_COMMON_SAML1X) || defined(CPU_SAMD5X)
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#define ISR_EICn(n) \
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void isr_eic ## n (void) \
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@ -390,7 +390,7 @@ ISR_EICn(14)
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ISR_EICn(15)
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#endif /* NUMOF_IRQS > 8 */
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#endif /* CPU_SAMD5X */
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#endif /* CPU_SAML1X || CPU_SAMD5X */
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#endif /* CPU_COMMON_SAML1X || CPU_SAMD5X */
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#else /* MODULE_PERIPH_GPIO_IRQ */
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@ -45,7 +45,7 @@
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#define BUSSTATE_OWNER SERCOM_I2CM_STATUS_BUSSTATE(2)
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#define BUSSTATE_BUSY SERCOM_I2CM_STATUS_BUSSTATE(3)
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#if defined(CPU_COMMON_SAML21) || defined(CPU_SAML1X) || defined(CPU_SAMD5X)
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#if defined(CPU_COMMON_SAML21) || defined(CPU_COMMON_SAML1X) || defined(CPU_SAMD5X)
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#define SERCOM_I2CM_CTRLA_MODE_I2C_MASTER SERCOM_I2CM_CTRLA_MODE(5)
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#endif
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@ -32,7 +32,7 @@
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#if defined (CPU_SAML1X) || defined (CPU_SAMD5X)
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#if defined (CPU_COMMON_SAML1X) || defined (CPU_SAMD5X)
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#define UART_HAS_TX_ISR
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#endif
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@ -5,5 +5,7 @@ ifneq (,$(filter saml11%,$(CPU_MODEL)))
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CFLAGS += -DCPU_SAML11
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endif
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CFLAGS += -DCPU_COMMON_SAML1X
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include $(RIOTCPU)/sam0_common/Makefile.include
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include $(RIOTMAKE)/arch/cortexm.inc.mk
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