diff --git a/cpu/sam0_common/include/cpu_conf.h b/cpu/sam0_common/include/cpu_conf.h
index d4500705bf..1a5d683534 100644
--- a/cpu/sam0_common/include/cpu_conf.h
+++ b/cpu/sam0_common/include/cpu_conf.h
@@ -78,7 +78,7 @@ extern "C" {
 #define CPU_IRQ_NUMOF                   PERIPH_COUNT_IRQn
 #define CPU_FLASH_BASE                  FLASH_ADDR
 
-#ifdef CPU_SAML1X
+#ifdef CPU_COMMON_SAML1X
 #define CPU_FLASH_RWWEE_BASE            DATAFLASH_ADDR
 #else
 #define CPU_FLASH_RWWEE_BASE            NVMCTRL_RWW_EEPROM_ADDR
diff --git a/cpu/sam0_common/periph/gpio.c b/cpu/sam0_common/periph/gpio.c
index 37f036d425..6b94e3d026 100644
--- a/cpu/sam0_common/periph/gpio.c
+++ b/cpu/sam0_common/periph/gpio.c
@@ -49,7 +49,7 @@
 /**
  * @brief   Number of external interrupt lines
  */
-#ifdef CPU_SAML1X
+#ifdef CPU_COMMON_SAML1X
 #define NUMOF_IRQS                  (8U)
 #else
 #define NUMOF_IRQS                  (16U)
@@ -231,7 +231,7 @@ int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
     _EIC->CONFIG[exti >> 3].reg &= ~(0xf << ((exti & 0x7) * 4));
     _EIC->CONFIG[exti >> 3].reg |=  (flank << ((exti & 0x7) * 4));
     /* enable the global EIC interrupt */
-#ifdef CPU_SAML1X
+#ifdef CPU_COMMON_SAML1X
     /* EXTI[4..7] are binded to EIC_OTHER_IRQn */
     NVIC_EnableIRQ((exti > 3 )? EIC_OTHER_IRQn : (EIC_0_IRQn + exti));
 #elif defined(CPU_SAMD5X)
@@ -339,7 +339,7 @@ void gpio_irq_disable(gpio_t pin)
     _EIC->INTENCLR.reg = (1 << exti);
 }
 
-#if defined(CPU_SAML1X)
+#if defined(CPU_COMMON_SAML1X)
 void isr_eic_other(void)
 #else
 void isr_eic(void)
@@ -360,7 +360,7 @@ void isr_eic(void)
     cortexm_isr_end();
 }
 
-#if defined(CPU_SAML1X) || defined(CPU_SAMD5X)
+#if defined(CPU_COMMON_SAML1X) || defined(CPU_SAMD5X)
 
 #define ISR_EICn(n)             \
 void isr_eic ## n (void)        \
@@ -390,7 +390,7 @@ ISR_EICn(14)
 ISR_EICn(15)
 #endif /* NUMOF_IRQS > 8 */
 #endif /* CPU_SAMD5X */
-#endif /* CPU_SAML1X || CPU_SAMD5X */
+#endif /* CPU_COMMON_SAML1X || CPU_SAMD5X */
 
 #else /* MODULE_PERIPH_GPIO_IRQ */
 
diff --git a/cpu/sam0_common/periph/i2c.c b/cpu/sam0_common/periph/i2c.c
index 2aef90e1d7..d35c3668d9 100644
--- a/cpu/sam0_common/periph/i2c.c
+++ b/cpu/sam0_common/periph/i2c.c
@@ -45,7 +45,7 @@
 #define BUSSTATE_OWNER SERCOM_I2CM_STATUS_BUSSTATE(2)
 #define BUSSTATE_BUSY SERCOM_I2CM_STATUS_BUSSTATE(3)
 
-#if defined(CPU_COMMON_SAML21) || defined(CPU_SAML1X) || defined(CPU_SAMD5X)
+#if defined(CPU_COMMON_SAML21) || defined(CPU_COMMON_SAML1X) || defined(CPU_SAMD5X)
 #define SERCOM_I2CM_CTRLA_MODE_I2C_MASTER SERCOM_I2CM_CTRLA_MODE(5)
 #endif
 
diff --git a/cpu/sam0_common/periph/uart.c b/cpu/sam0_common/periph/uart.c
index 9d4da5f222..5da4a2ecda 100644
--- a/cpu/sam0_common/periph/uart.c
+++ b/cpu/sam0_common/periph/uart.c
@@ -32,7 +32,7 @@
 #define ENABLE_DEBUG (0)
 #include "debug.h"
 
-#if defined (CPU_SAML1X) || defined (CPU_SAMD5X)
+#if defined (CPU_COMMON_SAML1X) || defined (CPU_SAMD5X)
 #define UART_HAS_TX_ISR
 #endif
 
diff --git a/cpu/saml1x/Makefile.include b/cpu/saml1x/Makefile.include
index f15fbd7576..3b9e7f2040 100644
--- a/cpu/saml1x/Makefile.include
+++ b/cpu/saml1x/Makefile.include
@@ -5,5 +5,7 @@ ifneq (,$(filter saml11%,$(CPU_MODEL)))
   CFLAGS += -DCPU_SAML11
 endif
 
+CFLAGS += -DCPU_COMMON_SAML1X
+
 include $(RIOTCPU)/sam0_common/Makefile.include
 include $(RIOTMAKE)/arch/cortexm.inc.mk