Leandro Lanzieri
52b31b5fce
cpu/lm4f120: Add Kconfig symbols
...
Also specify CPU_FAM in Makefile.features
2020-07-16 13:23:30 +02:00
Leandro Lanzieri
710c21805d
cpu/mips_pic32mz: Add Kconfig symbols
2020-07-16 13:20:05 +02:00
Leandro Lanzieri
6091c31bd6
cpu/mips_pic32mx: Add Kconfig symbols
2020-07-16 13:20:05 +02:00
Leandro Lanzieri
c1b25655fd
cpu/mips_pic32_common: Add Kconfig symbols
2020-07-16 13:20:04 +02:00
Leandro Lanzieri
ea3166e08e
cpu/mips32r2_common: Add Kconfig symbols
...
Also this moves the specification of CPU_ARCH to the common folder
2020-07-16 13:20:01 +02:00
8046a74e50
cpu/stm32: model features in Kconfig
2020-07-16 11:34:02 +02:00
055c43c878
cpu/stm32: enable flashpage feature for stm32f031k6
2020-07-16 11:15:30 +02:00
eec7aa2e42
cortexm_common: disable IRQ during thread_sched_idle
...
A race condition is present where an IRQ is serviced between the
priority increase of the PENDSV and the sleep. When the IRQ
is serviced before the WFI sleep, the core will sleep until the next
IRQ and the thread activated by the IRQ will not be scheduled until
a new IRQ triggers.
This commit wraps an IRQ disable and restore around the priority
modification and sleep to prevent interrupts from being serviced until
the WFI call returns.
2020-07-16 11:11:15 +02:00
Leandro Lanzieri
6a9c28aa72
cpu/nrf52: Add Kconfig symbols
2020-07-16 10:23:49 +02:00
Leandro Lanzieri
83252e8f0d
cpu/nrf51: Add Kconfig symbols
2020-07-16 10:23:49 +02:00
Leandro Lanzieri
31b288443a
cpu/nrfx_common: Add Kconfig symbols
2020-07-16 10:23:48 +02:00
7fd25f21c9
Merge pull request #14426 from maribu/stm32f4_uart_init
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cpu/stm32: Fix garbage on UART init
2020-07-15 21:14:42 +02:00
Marian Buschsieweke
0ed7ead587
cpu/native: Workaround for libstdcpp for FreeBSD
...
On FreeBSD, libstdc++ is known to not work with -m32. Thus, we don't provide
it feature libstdcpp there.
2020-07-15 20:29:02 +02:00
Francisco
1167867d02
Merge pull request #14362 from maribu/msp430-irq-inline
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cpu/msp430_common: Update to inline-able IRQ API
2020-07-15 15:34:04 +02:00
Marian Buschsieweke
1a8defd209
cpu/msp430_common: Refactor cpu.{c,h}
...
Drop `__enable_irq()` and `__disable_irq()` and replace single remaining
call of them with the standard IRQ API, as this is now equally fast.
2020-07-15 13:09:11 +02:00
Marian Buschsieweke
aec9eb7f6a
cpu/stm32: Fix uart_init()
...
- Make use of the fact that gpio_init_af() does not need prior call to
gpio_init() for all STM32 families anymore and drop call to gpio_init()
- Initialize the UART periph first, before initializing the pins
- While uninitialized, the UART periph will send signal LOW to TXD. This
results in a start bit being picked up by the other side.
- Instead, we do not connect the UART periph to the pins until it is
initialized, so that the TXD level will already be HIGH when the pins
are attached.
- This results in no more garbage being send during initialization
2020-07-15 12:12:46 +02:00
Marian Buschsieweke
73c9161517
cpu/stm32: Fix gpio_init() / gpio_int_af()
...
- Do not set an intermediate mode, prepare correct mode settings in a temporary
variable
- Consistently enabled the GPIO periph in gpio_init_af()
- Previously, STM32 F1 did not require a separate call to gpio_init() prior
to a call of gpio_init_af(), but other STM32 families did
- Now, gpio_init_af() can be used without gpio_init() consistently
- STM32 F1: Do not touch ODR for non input pins
- For input pins, this enables / disabled pull up resistors. For outputs,
this register should remain untouched (according to API doc)
2020-07-15 12:12:45 +02:00
Marian Buschsieweke
cf482c5d46
build system: Add libstdcpp feature and doc
...
- Add libstdcpp feature to indicate a platform is providing a libstdc++
implementation ready for use
- The existing cpp feature now only indicates a working C++ toolchain without
libstdc++. (E.g. still useful for the Arduino compatibility layer.)
- Added libstdcpp as required feature were needed
- Added some documentation on C++ on RIOT
2020-07-15 11:45:22 +02:00
Marian Buschsieweke
91a294aa45
cpu/cortexm_common: Drop LTO workaround for Cortex M thread_arch.c
...
The `ldr r1, =sched_active_thread` instruction couldn't be assembled with
LTO, as the no immediate offset could be found to construct the address of
`sched_active_thread`. This commit instructs the assembler to generate a
literate pool which can be used to construct the address. While this issue
was only triggered during LTO, it theoretically could also pop up without LTO
due to unrelated changes. Thus, it is a good idea to create the literate pool
even without LTO enabled.
2020-07-15 10:37:15 +02:00
Marian Buschsieweke
0feebcb094
cpu/cortexm_common: Drop #7776 's LTO workaround
...
The workaround from #7776 is no longer needed with recent toolchains, e.g. such
as the toolchain in the riot/riotbuild docker image.
2020-07-15 10:37:15 +02:00
Benjamin Valentin
48340f971f
cpu/sam0_common: flashpage: clean up helper function
2020-07-14 20:50:50 +02:00
hugues
0926a04b08
cpu/stm32/periph/pwm: useless static var and a semicolon removed
2020-07-14 01:41:16 +02:00
Thomas Stilwell
754d790b3f
boards: efm32 boards: add support for LETIMER
2020-07-10 20:44:03 -05:00
Thomas Stilwell
37a6cc66f5
cpu/efm32/timer: add pm blockers
2020-07-10 20:44:03 -05:00
Thomas Stilwell
651a3bf423
cpu/efm32/timer: add support for LETIMER
2020-07-10 20:44:03 -05:00
988638715f
cpu/nrf5x_common: remove inappropriate rtc dependency resolution
2020-07-10 21:58:03 +02:00
Gilles DOFFE
892370121d
cpu/stm32/qdec: test null callback pointer ( #14125 )
...
cpu/stm32/qdec: test if callback pointer is set
Callback pointer is not tested and could result in a hard fault
if the pointer is NULL.
Thus only activate interrupt if a callback provided.
Signed-off-by: Gilles DOFFE <g.doffe@gmail.com>
2020-07-10 15:05:53 +02:00
hugues
304d3f9e8d
cpu/stm32/periph/pwm: some bugfixes...
2020-07-10 13:47:45 +02:00
hugues
d069c6e787
cpu/stm32/periph/pwm: CCMR1 was defined a second time instead of CCMR2
2020-07-10 13:47:45 +02:00
hugues
a5da5953b2
cpu/stm32/periph/pwm: multiple devices PWM_RIGHT mode bugfix
2020-07-10 13:47:09 +02:00
Gunar Schorcht
fb47f094d3
cpu/esp32: support multiple heaps for newlib
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Several unsused DRAM sections are added to the heap.
2020-07-10 08:42:12 +02:00
hugues
16e454ccaf
cpu/stm32/periph/pwm: some bugfixes...
2020-07-09 23:49:00 +02:00
benpicco
30ebabb84e
Merge pull request #14007 from benpicco/cpu/sam0_common-pwm
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cpu/sam0_common: move PWM to common code, add support for saml21, samd5x
2020-07-09 10:01:08 +02:00
Bas Stottelaar
1d97783175
cpu/efm32: DCDC is available on Series 2 as well
2020-07-08 21:54:57 +02:00
Bas Stottelaar
1105f60a23
cpu/efm32: make series defines explicit
...
The EFM32 uses the provided _SILICON_LABS_32B_SERIES_0 and
_SILICON_LABS_32B_SERIES_1 definitions to enable or disable certain
code. With the introduction of new MCUs, there is also the
_SILICON_LABS_32B_SERIES_2 definition.
This PR ensures that the defines are explicit, and that #else
statements don't target the wrong series.
2020-07-08 21:54:57 +02:00
Benjamin Valentin
bce7d25f10
cpu/sam0_common: add PWM support for saml2x, samd5x
2020-07-08 21:51:12 +02:00
benpicco
63a0014456
Merge pull request #14467 from benpicco/fix_file_permission
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treewide: fix file permissions
2020-07-08 18:30:01 +02:00
Benjamin Valentin
9d836888c2
treewide: fix file permissions
...
C files should not be executable.
2020-07-08 17:32:36 +02:00
benpicco
99553e882c
Merge pull request #14461 from hugueslarrive/iss14361
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Fix bad assertion in cpu/stm32/periph/pwm.c
2020-07-08 16:42:08 +02:00
hugues
11e847c9af
cpu/stm32: fix off-by-one error in clock frequency assert
2020-07-08 14:17:14 +02:00
d02d54b76a
Merge pull request #14455 from benpicco/fe310-heap_markers
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cpu/fe310: use common names for heap markers
2020-07-08 14:14:38 +02:00
Benjamin Valentin
0ddca68de9
cpu/fe310: use common names for heap markers
...
Other archs use `_sheap` and `_eheap` to mark the start and end of
the heap.
fe310 uses `_heap_start` and `_heap_end`, so platform independent
code that wants to make use of this will needlessly fail.
For compatibility with common code, name them the same on fe310.
2020-07-07 17:25:00 +02:00
Leandro Lanzieri
7a2e4c819d
cpu/esp8266: Add Kconfig symbols
2020-07-07 16:27:43 +02:00
Leandro Lanzieri
0b0a03bef9
cpu/esp32: Add Kconfig symbols
2020-07-07 16:27:35 +02:00
Leandro Lanzieri
e6b698c69b
cpu/esp_common: Add Kconfig symbols
2020-07-07 16:27:34 +02:00
Jean Pierre Dudey
3003cf737a
boards/common/esp32: move ESP features to cpu/esp_common
...
>All of them are features of each ESP SoC and have not to be configured by the
board definition.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2020-07-07 16:02:23 +02:00
Martine Lenders
60469026cf
Merge pull request #14434 from maribu/irq_cleanup
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cpu/cortexm_common: Fix cpu_switch_context_exit()
2020-07-04 11:42:54 +02:00
Marian Buschsieweke
056100c1ca
cpu/cortexm_common: Fix cpu_switch_context_exit()
...
- Use `irq_enable()` over `bl irq_enable`, as `irq_enable()` is an inline
function and not a C function any more
- Drop `__attribute__((naked))` qualifier
- It must be used with the declaration of the function, but there it is
missing. (And it cannot be added there, as this function would need to
be implemented as "naked" by every platform; which is impossible for
platforms not supporting `__attribute__((naked))`.)
- Only functions consisting completely of basic asm may be marked as naked.
But both the assembly used to trigger the SVC interrupt as well as the
assembly used in `irq_enable()` are extended asm, not basic asm
- Use ` UNREACHABLE();` over a custom asm construct
2020-07-03 12:48:42 +02:00
Leandro Lanzieri
215e77f2ad
cpu/kinetis: Add Kconfig symbols
2020-07-02 14:41:41 +02:00
Leandro Lanzieri
6ea04d146b
cpu/kinetis: Provide features based on CPU series
...
Also, rename CPU_FAMILY to the standard CPU_FAM.
2020-07-02 14:41:39 +02:00
Francisco
772b638d2a
Merge pull request #14405 from aabadie/pr/cpu/mips_no_binfile
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cpu/mips: disable BINFILE generation
2020-07-01 10:21:41 +02:00
Francisco
41888674a4
Merge pull request #14385 from aabadie/pr/make/appdeps_export
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boards/mips: remove use of APPDEPS, un-export globally APPDEPS
2020-07-01 09:13:35 +02:00
b3e566bcd8
cpu/mips: disable BINFILE generation
2020-07-01 08:08:23 +02:00
Peter Kietzmann
2250c67240
Merge pull request #14388 from leandrolanzieri/pr/kconfig/ezr32wg_board_symbols
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boards/slwstk6220a: Model features provided in Kconfig
2020-06-30 18:24:44 +02:00
Francisco
325b7a8d8e
Merge pull request #13631 from benpicco/cpu/sam0_common/spi-deinit
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drivers/periph/spi: add periph_spi_reconfigure feature & implementation for sam0
2020-06-30 15:34:53 +02:00
Gunar Schorcht
028c0d4b3c
Merge pull request #14353 from fjmolinas/pr_reorder_makefiles_cleanup
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Makefile: use normal conditionals
2020-06-30 09:59:02 +02:00
Francisco Molina
e98341da93
Makefile: use normal conditionals
2020-06-29 22:40:29 +02:00
Leandro Lanzieri
339432583c
cpu/ezr32wg: Add Kconfig symbols
...
Also define CPU_FAM in Makefile.features
2020-06-29 14:01:01 +02:00
ffa28e415a
cpu/mips_pic32_common: add cpu_model specific assembly symbols dependency
2020-06-28 12:13:32 +02:00
Gunar Schorcht
e247ced04c
cpu/esp: add feature arch_esp for all ESP SoCs
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There are common features that can be used by ESP32 as well as ESP8266, for example the `esp_wifi` module. To be able to test for any ESP SoC, feature `arch_esp` is introduced.
2020-06-27 11:30:59 +02:00
Marian Buschsieweke
414e17b437
Merge pull request #14360 from aabadie/pr/cpu/fe310_inline_irq
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cpu/fe310: migrate to inlined irq API
2020-06-26 13:00:22 +02:00
279f2aebed
Merge pull request #14224 from kaspar030/cortexm_remove_idle_thread
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core: make idle thread optional
2020-06-26 11:04:19 +02:00
Francisco
a46adc3d44
Merge pull request #13742 from benemorius/pr/kinetis-pm_layered
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cpu/kinetis: implement power modes for pm_layered
2020-06-26 10:51:12 +02:00
3d9421571c
cpu/fe310: migrate to inlined irq API
...
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2020-06-26 10:48:56 +02:00
Marian Buschsieweke
c5c83cfe3c
cpu/msp430_common: Update to inline-able IRQ API
...
- Updated to inline-able IRQ API
- Improved robustness of functions
- Added memory barrier to prevent the compiler from moving code outside of
a critical section guarded by irq_disable() ... irq_restore()
- Reduced overhead of `irq_disable()`
- After clearing the global interrupt enable (GIE) bit, IRQs remain enabled
for up to one CPU cycle
- The previous implementation just added a nop to fill that cycle
- This implementation uses the cycle for masking the return value
- Reduced overhead of `irq_restore()`
- Now only one CPU cycle is needed
- `irq_disable()`, `irq_restore()`, and `irq_enable()` work now in constant time
2020-06-25 21:32:17 +02:00
0ff9e554eb
cpu/cortexm: implement sched_arch_idle() and disable idle thread
2020-06-25 16:02:28 +02:00
Francisco
903ad1e888
Merge pull request #14354 from miri64/drivers/cleanup/rm-NETOPT_IPV6_IID
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netdev: remove NETOPT_IPV6_IID support for network devices
2020-06-25 15:53:33 +02:00
Francisco
c0d171a0a2
Merge pull request #14343 from leandrolanzieri/pr/kconfig/cc2538_based_symbols
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boards/cc2538-based: Model features in Kconfig
2020-06-25 13:20:58 +02:00
Martine S. Lenders
78fc1e7654
nrfmin: remove NETOPT_IPV6_IID support
...
This option is handled in the `gnrc_netif`-layer without any access to
the driver's option since 7ae90564d9
2020-06-25 10:51:05 +02:00
Leandro Lanzieri
75f487d9ec
Merge pull request #14344 from fjmolinas/pr_mips_uhi_dep
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cpu/mips32r2_common: include newlib_syscalls_mips_uhi in Makefile.dep
2020-06-24 16:30:04 +02:00
Bas Stottelaar
21f9afdb5b
Merge pull request #14318 from benpicco/cpu/stm32-TIMER_CHANNELS
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cpu/stm32: use TIMER_CHANNEL_NUMOF for consistency
2020-06-24 15:32:22 +02:00
Francisco Molina
bdfda031c5
cpu/mips32r2_common: include newlib_syscalls_mips_uhi in Makefile.dep
2020-06-24 15:29:42 +02:00
Leandro Lanzieri
7d543fe091
cpu/cc2538: Add Kconfig symbols
...
Also specify CPU_FAM in Makefile.features
2020-06-24 15:15:43 +02:00
Francisco
b49bd9ffe5
Merge pull request #14276 from jue89/fix/samr30-xpro_ztimer_rtt_underflow
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cpu/saml21: adjust RTT_MIN_OFFSET
2020-06-24 13:41:06 +02:00
Leandro Lanzieri
cd3b1515a0
Merge pull request #14338 from aabadie/pr/cpu/fe310_kconfig
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cpu/fe310: boards/hifive1*: model features in Kconfig
2020-06-24 13:34:40 +02:00
Benjamin Valentin
06cdd30fcb
cpu/stm32: use TIMER_CHANNEL_NUMOF for consistency
2020-06-24 12:58:38 +02:00
Kevin "Tristate Tom" Weiss
2d5901dd69
Merge pull request #14340 from leandrolanzieri/pr/kconfig/msp430_boards_symbols
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boards/msp430-based: Model features in Kconfig
2020-06-24 12:53:42 +02:00
b36b2ee748
cpu/fe310: add Kconfig configuration
2020-06-24 11:13:45 +02:00
Francisco
816d7c4d28
Merge pull request #14206 from leandrolanzieri/pr/kconfig/atmega256rfr2_based_boards
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boards/atmega256rfr2-based: Model features in Kconfig
2020-06-24 11:06:04 +02:00
benpicco
cdacdd79e6
Merge pull request #14319 from benpicco/cpu/ezr32wg/TIMER_CHANNELS
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cpu/ezr32wg: define TIMER_CHANNEL_NUMOF
2020-06-24 09:52:29 +02:00
Leandro Lanzieri
4abc4e7de7
cpu/msp430fxyz: Add Kconfig symbols
...
Also specify CPU_FAM in Makefile.features
2020-06-24 09:28:19 +02:00
Leandro Lanzieri
a73c03ed0c
cpu/cc430: Add Kconfig symbols
...
Also specify CPU_FAM in Makefile.features
2020-06-24 09:27:02 +02:00
Leandro Lanzieri
c86bf5074d
cpu/msp430_common: Add Kconfig symbols
...
Also specify CPU_ARCH and CPU_CORE in Makefile.features.
2020-06-24 09:26:05 +02:00
Francisco
48bdd7018a
Merge pull request #14302 from fjmolinas/pr_sam0_rtt_opt
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cpu/sam0_common/rt%: use READREQUEST when accessing CLOCK/COUNT regs
2020-06-24 08:42:03 +02:00
Bas Stottelaar
6774f7e412
Merge pull request #14337 from benpicco/TIMER_CHANNEL_NUMOF
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use TIMER_CHANNEL_NUMOF instead of TIMER_CHANNELS
2020-06-24 01:19:17 +02:00
Benjamin Valentin
97343af69d
cpu/ezr32wg: define TIMER_CHANNEL_NUMOF
2020-06-24 00:48:21 +02:00
Benjamin Valentin
96273b4df0
cpu/atmega_common: use TIMER_CHANNEL_NUMOF
2020-06-24 00:45:35 +02:00
Benjamin Valentin
51135a50fc
cpu/sam3: use TIMER_CHANNEL_NUMOF
2020-06-24 00:45:35 +02:00
Benjamin Valentin
c8ff026640
cpu/sam0_common: use TIMER_CHANNEL_NUMOF
2020-06-24 00:45:35 +02:00
Benjamin Valentin
3af4d38735
cpu/lpc2387: use TIMER_CHANNEL_NUMOF
2020-06-24 00:45:35 +02:00
Benjamin Valentin
5da1a9e577
cpu/esp*: use TIMER_CHANNEL_NUMOF
2020-06-24 00:45:35 +02:00
Francisco
a73b61e30b
Merge pull request #14320 from benpicco/cpu/sam0_common-gpio_gclk
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cpu/sam0_common: GPIO always default to MAIN clock for EXTI, make configurable
2020-06-23 22:48:45 +02:00
Leandro Lanzieri
cc6a4929f4
cpu/atmega256rfr2: Add Kconfig symbols
2020-06-23 14:37:26 +02:00
Francisco
f63066974c
Merge pull request #14195 from leandrolanzieri/pr/kconfig/atmega32u4_boards_symbols
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boards/arduino-leonardo: Model features in Kconfig
2020-06-23 14:08:27 +02:00
Juergen Fitschen
cc22324bd4
cpu/saml21: adjust RTT_MIN_OFFSET
2020-06-23 11:59:56 +02:00
d7c1510b0f
cortexm_common: Remove read in ICSR register operations
...
All bits in the ICSR register in the cortexm system control block are
either read-only or don't have an effect when writing a zero. A
read-modify-write cycle is thus not required when writing bit flags in
the register. This commit removes the reads in the read-modify-store
patterns for this register.
2020-06-23 11:53:53 +02:00
25c609f2d3
Merge pull request #12101 from OTAkeys/pr/fix_i2c_release
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cpu/stm32_common: disable i2c in release
2020-06-23 10:21:15 +02:00
Leandro Lanzieri
1ea5fc6f06
cpu/atmega32u4: Add CPU-specific Kconfig symbols
2020-06-23 09:57:22 +02:00
Leandro Lanzieri
ed0743ddb3
cpu/atmega1281: Add Kconfig symbols
2020-06-22 17:09:03 +02:00
Leandro Lanzieri
a5dedf3c91
cpu/atmega1284p: Add Kconfig symbols
2020-06-22 17:08:59 +02:00
Leandro Lanzieri
6c184376d0
cpu/atmega128rfa1: Add Kconfig symbols
2020-06-22 16:10:40 +02:00
Leandro Lanzieri
873badcd76
cpu/atmega_common: Add ATmega128 family Kconfig symbol
2020-06-22 15:19:35 +02:00
Peter Kietzmann
332ae60e04
Merge pull request #14211 from leandrolanzieri/pr/kconfig/atmega2560_boards_symbols
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boards/arduino-mega2560: Model features in Kconfig
2020-06-22 15:04:43 +02:00
Thomas Stilwell
ae7ec96731
cpu/kinetis: implement power modes for pm_layered
2020-06-21 21:51:16 -05:00
Bas Stottelaar
1bd0e32cb9
cpu/kinetis: remove reference of RTC_NUMOF.
...
These defines were globally removed in #12673 .
2020-06-21 21:29:23 +02:00
Benjamin Valentin
3e91914831
cpu/sam0_common: spi: implement the periph_spi_reconfigure feature
2020-06-21 21:19:17 +02:00
benpicco
27da7c2797
Merge pull request #14323 from bergzand/pr/kinetis/spi_scalar_array_size
...
kinetis/spi_scalar: Add local ARRAY_SIZE define
2020-06-21 18:00:08 +02:00
c2a7d23277
kinetis/spi_scalar: Add local ARRAY_SIZE define
...
The spi scalar calculation tool for the kinetis family is stand-alone
and doesn't use the RIOT headers. It doesn't include the ARRAY_SIZE
macro from the RIOT headers. This commit adds a local definition of the
ARRAY_SIZE macro
2020-06-21 17:09:32 +02:00
Benjamin Valentin
93b43e5753
cpu/samd5x: make SAM0_GCLK_TIMER configurable
2020-06-20 00:25:54 +02:00
Benjamin Valentin
fba3aab2f3
cpu/samd5x: rename GCLK defines
...
Now that the GCLK defines are not always at a fixed frequency, rename
them to better reflect this.
2020-06-20 00:25:54 +02:00
Benjamin Valentin
17304d390c
cpu/samd5x: use MHZ() macro
2020-06-20 00:25:53 +02:00
Benjamin Valentin
b5f407f9a4
cpu/samd5x: enable buck voltage regulator when possible
...
When an external oscillator is used and the internal fast oscillators
are off, we can enable the buck converter if the board supports it.
2020-06-20 00:25:53 +02:00
Benjamin Valentin
849c76578a
cpu/samd5x: allow to use XOSC as clock source
...
Allow to run the main clock and all peripheral clocks off XOSC.
This is necessary if we want to use the buck voltage regulator.
2020-06-20 00:10:08 +02:00
benpicco
a30d229b12
Merge pull request #14166 from aabadie/pr/cpu/stm32g4
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cpu/stm32g4: add support + add nucleo-g474re board
2020-06-19 17:05:15 +02:00
Cenk Gündoğan
209248f3b2
Merge pull request #14310 from leandrolanzieri/pr/kconfig/efm32_boards_symbols
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boards/efm32-based: Model features in Kconfig
2020-06-19 15:02:51 +02:00
f546c6238b
cpu/stm32: add support for stm32g4
2020-06-19 14:18:17 +02:00
Francisco Molina
bdda25c534
cpu/sam0_common/rt%: issue READREQUEST to access CLOCK/COUNT regs
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read-synchronized register will stall immediatly when read, instead
issue READREQUEST and wait for sync to be unset.
2020-06-19 14:10:31 +02:00
Benjamin Valentin
c0203ad35c
cpu/sam0_common: GPIO default to MAIN clock for EXTI, make configurable
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Currently only samd21 used the 32 kHz clock for EXTI which makes it miss fast events.
All newer members of the family use the MAIN clock.
While touching this, also make the clock source configurable to this can be overwritten,
e.g. in the board config if desired.
2020-06-19 13:27:48 +02:00
Francisco
a970163812
Merge pull request #14312 from benpicco/cpu/sam0_common/periph/uart-rxonly
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cpu/sam0_common: UART: allow RX only configuration
2020-06-19 11:44:10 +02:00
benpicco
c3314e1a0c
Merge pull request #14303 from fjmolinas/pr_sam0_unified_rtt
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cpu/sam0: unified rtt configuration
2020-06-19 11:30:06 +02:00
Francisco Molina
ff24aa61f3
cpu/sam0_common/periph/rtt: uncrustify
2020-06-19 09:16:24 +02:00
Francisco Molina
15bbd95b6a
cpu/sam0_common/rtt: add configurable RTT_FREQUENCY
2020-06-19 09:16:24 +02:00
Francisco Molina
36baec4512
cpu/samd5x: add unified rtt configuration
2020-06-19 09:16:23 +02:00
Francisco Molina
f41b43e263
cpu/saml21: add unified rtt configuration
2020-06-19 09:16:23 +02:00
Francisco Molina
bcfe4bac0b
cpu/saml1x: add unified rtt configuration
2020-06-19 09:16:22 +02:00
Francisco Molina
eefb3fa555
cpu/samd21: add unified rtt configuration
2020-06-19 09:16:22 +02:00
Benjamin Valentin
5c3ae77df9
cpu/sam0_common: UART: allow RX only configuration
2020-06-19 00:33:50 +02:00
Leandro Lanzieri
8cc1fa4ce1
cpu/efm32: Add Kconfig symbols
2020-06-18 16:39:54 +02:00
Leandro Lanzieri
bb021f9e8e
cpu/efm32/efr32mg1p: Add Kconfig symbols
2020-06-18 16:39:53 +02:00
Leandro Lanzieri
d578adf845
cpu/efm32/efr32mg12p: Add Kconfig symbols
2020-06-18 16:39:53 +02:00
Leandro Lanzieri
89342b3aa8
cpu/efm32/efm32pg1b: Add Kconfig symbols
2020-06-18 16:39:53 +02:00
Leandro Lanzieri
777571a9e9
cpu/efm32/efm32pg12b: Add Kconfig symbols
2020-06-18 16:39:52 +02:00
Leandro Lanzieri
45c6d27cb5
cpu/efm32/efm32lg: Add Kconfig symbols
2020-06-18 16:39:52 +02:00
Leandro Lanzieri
4f3ec84c42
cpu/efm32/efm32gg: Add Kconfig symbols
2020-06-18 16:39:49 +02:00
Dylan Laduranty
00b14cce27
Merge pull request #14106 from benpicco/cpu/saml1x/pm_deep_flag
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cpu/saml1x: pm: set deep flag
2020-06-17 22:02:34 +02:00
Dylan Laduranty
6bf0a41399
Merge pull request #13600 from benpicco/sam0-gpio
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cpu/sam0_common: GPIO IRQ optimizations
2020-06-17 21:23:19 +02:00
Leandro Lanzieri
67ab640caf
cpu/atmega2560: Add Kconfig symbols
2020-06-17 12:44:30 +02:00
Francisco
112ff81f3e
Merge pull request #14176 from leandrolanzieri/pr/kconfig/atmega_boards_symbols
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boards/atmega328p-based: Model features in Kconfig
2020-06-17 12:22:31 +02:00
07c78efc83
Merge pull request #14285 from fjmolinas/pr_uart_nb_race
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sam0/stm32: fix possible uart_nonblocking deadlock
2020-06-17 12:14:25 +02:00
Francisco
4c05c0207f
Merge pull request #14300 from benpicco/cpu/sam0_common/uart_txinv
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cpu/sam0_common: UART: implement inverted RX & TX
2020-06-17 11:44:46 +02:00
Leandro Lanzieri
981aecf9cc
cpu/atmega328p: Add Kconfig symbols
2020-06-17 10:52:24 +02:00
Leandro Lanzieri
19bdb11548
cpu/atmega_common: Add Kconfig symbols
2020-06-17 10:52:23 +02:00
Francisco
5bb8c4b303
Merge pull request #14296 from leandrolanzieri/pr/cpu/adapt_kconfig_classification
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cpu/kconfig: Rename CPU classification symbols
2020-06-17 10:26:20 +02:00
Bas Stottelaar
219f631d20
Merge pull request #14233 from benemorius/pr/efm32-lfrco-jitter
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cpu/efm32: disable default LFRCO options that break LEUART > 1800 baud
2020-06-17 10:23:49 +02:00
Francisco Molina
80d682becd
cpu/sam0: avoid deadlock on nonblocking write
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If a write to a full tsrb is attempted with disabled interrupts
or in a interrupt then a deadlock will occure. To avoid this make
space in the ringbuffer by synchronously writing to uart.
2020-06-17 10:01:21 +02:00
Francisco Molina
09f0fd4526
cpu/stm32: avoid deadlock on nonblocking write
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If a write to a full tsrb is attempted with disabled interrupts
or in a interrupt then a deadlock will occure. To avoid this make
space in the ringbuffer by synchrnously writing to uart.
2020-06-17 10:01:21 +02:00
Francisco Molina
0b8adb2d27
cpu/sam0-stm32/uart: rename tx buf size to UART_TXBUF_SIZE
2020-06-17 10:01:20 +02:00
Francisco Molina
dd331c91d3
cpu/stm32/uart: enable irq for non blocking uart
2020-06-17 10:01:19 +02:00
Thomas Stilwell
e987abe9fc
cpu/efm32: disable default LFRCO options that break LEUART > 1800 baud
2020-06-17 01:47:29 -05:00
Benjamin Valentin
585dc15f99
cpu/sam0_common: UART: implement inverted RX & TX
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The UART TX and TX lines on SAMD5x and SAML1x can be inverted.
However, the flags don't do exactly what one would expect.
See errata 2.18.5: SERCOM-UART: TXINV and RXINV Bits Reference:
> The TXINV and RXINV bits in the CTRLA register have inverted functionality.
>
> Workaround:
> In software interpret the TXINV bit as a functionality of RXINV, and conversely,
> interpret the RXINV bit as a functionality of TXINV.
2020-06-16 22:55:37 +02:00
Dylan Laduranty
5e625adcf5
Merge pull request #12132 from ant9000/pr/saml21_usbdev_48mhz_clock
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cpu/saml21: enable 48mhz clock for usbdev
2020-06-16 21:02:41 +02:00
Leandro Lanzieri
d87f0cc66b
cpu/kconfig: Rename CPU classification symbols
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This removes the `CPU_FAMILY` and `CPU_SERIES` common CPU symbols and
adds `CPU_FAM` instead.
2020-06-16 14:27:27 +02:00
Leandro Lanzieri
2c4c04d11b
cpu/cortexm_common: Unify Kconfig and Makefile arch identifiers
2020-06-16 12:05:41 +02:00
Leandro Lanzieri
5dc29886b3
cpu/kinetis: Include CPU information in Makefile.features
2020-06-16 12:05:41 +02:00
Leandro Lanzieri
649017f0b2
cpu/cortexm_common: Rename arch_cortexm feature to cpu_core_cortexm
2020-06-16 12:05:41 +02:00
Leandro Lanzieri
4d65bc8e0a
cpu: Rename CPU_ARCH to CPU_CORE
2020-06-16 12:05:40 +02:00
Francisco
b041221905
Merge pull request #13825 from kaspar030/cortexm_free_svc
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cpu/cortexm: "free" SVC
2020-06-16 10:31:09 +02:00
Antonio Galea
3076ee837d
cpu/saml21: add clock configuration for usbdev
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Co-authored-by: dylad <dylan.laduranty@mesotic.com>
2020-06-15 11:52:13 +02:00
benpicco
1992f57765
Merge pull request #14261 from bergzand/pr/sam0_common/spi_dma
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sam0_common: Make SPI peripheral DMA compatible
2020-06-14 18:25:37 +02:00
60f4502e6c
cpu/sam0_common: Make SPI peripheral DMA compatible
2020-06-14 14:56:20 +02:00
22c8788b58
sam0_common/dma: Rename len to num
2020-06-14 11:51:36 +02:00
02b2b58358
sam0_common: Add additional documentation on DMA usage
2020-06-14 11:48:43 +02:00
7a8566c391
sam0_common/dma: Mark src parameter as const
2020-06-13 21:02:04 +02:00
benpicco
74299a2b03
Merge pull request #14260 from bergzand/pr/sam0_common/dma_periph
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sam0_common: Add DMA peripheral driver
2020-06-12 21:18:31 +02:00
ec1d575e7c
cpu/saml1x: Add DMA peripheral to init
2020-06-12 20:04:05 +02:00
4ef0b85495
cpu/saml21: Add DMA peripheral to init
2020-06-12 20:04:05 +02:00
73c8911e62
cpu/samd5x: Add DMA peripheral to init
2020-06-12 20:04:05 +02:00
5dc1d87f74
cpu/samd21: add DMA peripheral to init
2020-06-12 20:04:05 +02:00
6be1b27bbb
sam0_common: Add DMA peripheral driver
2020-06-12 20:04:05 +02:00
benpicco
8ed8775c8e
Merge pull request #14269 from benpicco/cpu/sam0_common/timer_drop_prescaler
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cpu/sam0_common: drop prescaler from timer config
2020-06-12 14:16:59 +02:00
ac8e27aab6
Merge pull request #14247 from fjmolinas/pr_stm32f1_nb
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cpu/stm32: add non blocking uart
2020-06-11 21:40:27 +02:00
Benjamin Valentin
54b57bd97f
cpu/sam0_common: drop prescaler from timer config
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since c05984b341
2020-06-11 19:29:43 +02:00
Akshai M
6450d9989e
gnrc/pktbuf : Set Kconfig defaults and conditions
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Set Kconfig defaults for CPU and conditions to avoid
conflict with CFLAGS
Co-authored-by: Leandro Lanzieri <leandro.lanzieri@haw-hamburg.de>
2020-06-11 14:47:27 +05:30
Akshai M
5523d119b6
gnrc/pktbuf : Move 'GNRC_PKTBUF_SIZE' to 'CONFIG_'
2020-06-11 14:46:36 +05:30
Francisco Molina
3107993434
cpu/stm32: add non blocking uart
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Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2020-06-11 09:51:41 +02:00
Benjamin Valentin
b46ddebc81
cpu/cc26x2_cc13x2: rename aux.c to restore Windows compatibility
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AUX.* is a reserved file name on Windows.
https://docs.microsoft.com/de-de/windows/win32/fileio/naming-a-file
fixes #14253
2020-06-10 23:24:09 +02:00
benpicco
f75c971297
Merge pull request #14119 from benpicco/cpu/stm32_usb_bootloader
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cpu/stm32: implement reset to bootloader
2020-06-10 23:13:50 +02:00
8466946ea1
cpu/cortexm_common/Kconfig: add cortexm_svc feature
2020-06-10 23:13:43 +02:00
dbe7331d10
cpu/cortexm: "free" SVC
2020-06-10 23:12:58 +02:00
Leandro Lanzieri
58cd126517
Merge pull request #14210 from btcven/2020_06_04-cc26xx_cc13xx_kconfig
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boards/cc26xx_cc13xx-based: model features in Kconfig
2020-06-10 11:27:31 +02:00
Francisco
6c65fa72d7
Merge pull request #14204 from kaspar030/rename_native_trace
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cpu/native: rename trace -> backtrace
2020-06-09 16:37:26 +02:00
Jean Pierre Dudey
132d936df7
cpu/cc26x0: model features in Kconfig
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-06-09 07:55:41 -05:00
89b5778381
Merge pull request #14097 from bergzand/pr/stm32_common/spi/optimize_hot_path
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STM32_common/SPI: Reduce the overhead in the DMA hot path
2020-06-09 11:10:04 +02:00
29739be13a
stm32/spi: Use new DMA setup/prepare functions
2020-06-09 10:20:50 +02:00
b7d0cbcd57
stm32/spi: Remove superfluous DMA stop call
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The DMA stream will automatically disable itself as soon as the transfer
is finished. No need to do this an additional time after the transfer is
finished
2020-06-09 10:20:49 +02:00
fddf0897e8
stm32/spi: Acquire/release the DMA during the SPI acquire/release
2020-06-09 10:20:49 +02:00
3a8dd32265
stm32/spi: Reduce register writes in hot path
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This combines a number of register writes in the SPI
acquire and transfer code. The DMA enable for SPI is moved to the
acquire function, switching between DMA and regular transfer between
acquires is not possible.
2020-06-09 10:20:49 +02:00
Jean Pierre Dudey
e9a2dcd1e0
cpu/cc26x2_cc13x2: model features in Kconfig
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-06-08 08:23:45 -05:00
Jean Pierre Dudey
d9580514a3
cpu/cc26xx_cc13xx: model features in Kconfig
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-06-08 08:23:45 -05:00
Toon Stegen
ac9afbe4f5
cpu/stm32_common: disable i2c in release
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the hardware peripheral should be disabled before stopping the
peripheral clock.
2020-06-08 12:27:03 +02:00
Benjamin Valentin
824f7aa82b
cpu/sam0_common: move PWM to common code
2020-06-07 16:50:17 +02:00
Benjamin Valentin
0819f0eb39
cpu/stm32: implement reset to bootloader
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The STM32 line of microcontrollers comes with a bootloader in the ROM.
It provides the option to flash the device firmware in DFU mode (USB)
or via UART or SPI.
To enter the bootloader we have to jump to a specific address in memory,
but before reset the CPU to make sure the system is in a known state.
This enables us to use the usb_board_reset module on all STM32 platforms.
2020-06-05 18:41:06 +02:00
Jean Pierre Dudey
fea44e8b35
cpu/cortexm_common: add HAS_CORTEX_MPU feature
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-06-04 22:16:43 -05:00
49375e1e10
cpu/native: rename trace -> backtrace
2020-06-04 14:37:01 +02:00
Leandro Lanzieri
67a43e0ada
drivers/wdt/kconfig: Rename HAS_WDT_WARNING_PERIOD
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The symbol now is HAS_PERIPH_WDT_WARNING_PERIOD.
2020-06-02 17:43:19 +02:00
Leandro Lanzieri
004162060e
cpu/samd21: Add CPU series specific Kconfig symbols
2020-06-02 17:42:16 +02:00
Leandro Lanzieri
079a7ee1e5
cpu/sam0_common: Add family specific Kconfig symbols
2020-06-02 17:42:10 +02:00
José Alamos
892032907f
Merge pull request #14187 from leandrolanzieri/pr/periph/wdt_add_warning_period_feature
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drivers/wdt: Add feature to indicate a configurable warning period
2020-06-02 17:18:40 +02:00
460c396101
stm32/spi: Add define for default CR2 settings
2020-06-02 16:04:02 +02:00
c28477a4f0
Merge pull request #14096 from bergzand/pr/stm32_common/dma/optimize_hot_path
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STM32_common/dma: Optimize the latency in the hot path
2020-06-02 16:01:27 +02:00
2f6cc5fe56
Merge pull request #14165 from bergzand/pr/nrf52/i2c_mutex_irq
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nrf52/i2c: Use mutex and IRQ for blocking
2020-06-02 15:36:04 +02:00
a3f8a381ab
Merge pull request #14183 from benpicco/cpu/stm32/Makefile.features-HWRNG
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cpu/stm32/Makefile.features: capture whole family
2020-06-02 14:26:23 +02:00
Leandro Lanzieri
48759eccdc
drivers/wdt: Add feature to indicate a configurable warning period
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This adds the feature `periph_wdt_warning_period` that indicates that a
platform WDT driver implementation supports a configurable
CONFIG_WDT_WARNING_PERIOD.
2020-06-02 12:54:25 +02:00
f583f388be
stm32/dma: Cache DMA stream base address
2020-06-02 11:52:11 +02:00
9ab7e7ef33
stm32/dma: add setup and prepare functions
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This commit adds two new functions to the DMA peripheral code for the
stm32. The setup function allows for a one-time setup of peripheral
config. The prepare function does the per-transfer setup. This allows
for a single setup call during the peripheral lock step and a
per-transfer call to the prepare function.
2020-06-02 11:52:11 +02:00
bdeec688f5
Merge pull request #14174 from benpicco/cpu/stm32_usb_includes
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cpu/stm32: don't include usbdev_stm32.h in periph_cpu_common.h
2020-06-02 11:42:19 +02:00
83a6ad182d
nrf52/i2c: Use mutex and IRQ for blocking
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This commit enhances the I2C code of the nRF52 family to block on a
mutex while the I2C transfer is busy. The mutex is unlocked in the ISR
when it is trigger by either a stop condition or an error condition.
2020-06-02 10:24:40 +02:00
Benjamin Valentin
2c346387f6
cpu/stm32/Makefile.features: capture whole family
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All members of the stm32f401* family (etc) don't have the HWRNG
peripheral.
Apply a broader wildcard so we don't have to touch this file when
adding new boards with slightly different MCUs.
2020-06-01 16:25:37 +02:00
benpicco
7286c32b5d
Merge pull request #14144 from aabadie/pr/cpu/stm32_cleanup_tim_ccr
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cpu/stm32: cleanup timer structure in vendor headers
2020-06-01 16:18:57 +02:00
benpicco
1ac9e70f57
Merge pull request #14177 from GabrielDai/blxxxpill-qdec
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cpu/stm32: add qdec support for CPU_FAM_STM32F1
2020-06-01 16:17:45 +02:00
a858c980c4
cpu/stm32: fix remaining occurence of stm32f1 cpu family
2020-05-30 18:59:36 +02:00
2448b26a8b
cpu/stm32: fix issue with cpu feature name
2020-05-30 18:59:01 +02:00
Gabriel Moyano
52ddeeedb0
cpu/stm32: add qdec support for CPU_FAM_STM32F1
2020-05-29 21:11:54 +02:00
e35914612e
cpu/stm32: restore timer structure in vendor headers
2020-05-29 18:22:00 +02:00
2dc0ec00a1
cpu/stm32: adapt timer driver to common CMSIS timer structure
2020-05-29 18:22:00 +02:00
Benjamin Valentin
7c8f44a368
cpu/stm32: filter availability of RNG by CPU not by board.
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The old limitation is not valid anymore, we can evaluate $(CPU_MODEL)
here directly.
The output of
make -C tests/periph_hwrng info-boards-supported | wc -w
remains the same.
2020-05-29 18:01:12 +02:00
Benjamin Valentin
e957f339d3
cpu/stm32: don't include usbdev_stm32.h in periph_cpu_common.h
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`usbdev_stm32.h` will pull in `usb.h` which causes an error if
`USB_H_USER_IS_RIOT_INTERNAL` is not set.
Turns out this include is not needed, so just drop it.
2020-05-29 17:42:19 +02:00
benpicco
d0a5e0527b
Merge pull request #14168 from leandrolanzieri/pr/dist/buildsystem_check_features_provided
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sam0_common: Move feature to Makefile.features and add buildsystem check
2020-05-29 17:27:07 +02:00
Leandro Lanzieri
106ab65d7b
cpu/saml21: Check CPU_MODEL to provide periph_hwrng
2020-05-29 16:19:00 +02:00
Leandro Lanzieri
12470f0ed2
cpu/sam0_common: Move periph_timer_periodic feature to Makefile.features
2020-05-29 11:13:59 +02:00
benpicco
49aef1b678
Merge pull request #13902 from benpicco/periph_timer_periodic
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periph/timer: add timer_set_periodic()
2020-05-28 18:03:32 +02:00
Benjamin Valentin
c000a77658
cpu/atmega_common: implement timer_set_periodic()
2020-05-28 17:37:42 +02:00
Benjamin Valentin
8486e8c6d1
cpu/sam0_common: implement timer_set_periodic()
2020-05-28 17:37:42 +02:00
Benjamin Valentin
41a961be22
cpu/lpc2387: timer: implement timer_set_periodic()
2020-05-28 17:37:41 +02:00
benpicco
2183fb9273
Merge pull request #14155 from maribu/atmega_timer_cleanup
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cpu/atmega*: Clean up timer configs
2020-05-28 17:33:31 +02:00
Marian Buschsieweke
fb722b1be7
cpu/atmega_common/periph_timer: Fix style
2020-05-28 16:27:08 +02:00
Marian Buschsieweke
dfa6863275
cpu/atmega{1281,2560}: Relocate default timer config
2020-05-28 16:27:08 +02:00
Marian Buschsieweke
044a3f9a4c
cpu/atmega1284p: Relocate default timer config
2020-05-28 16:27:07 +02:00
Marian Buschsieweke
200afc46fa
cpu/atmega328p: Relocate default timer config
2020-05-28 16:27:07 +02:00
Marian Buschsieweke
a950d6bbb6
cpu/atmega{128rfa1,256rfr2}: Relocate default timer config
2020-05-28 16:27:07 +02:00
Marian Buschsieweke
9138e48746
cpu/atmega32u4: Relocate default timer config
2020-05-28 16:27:06 +02:00
José Alamos
917cc66e48
Merge pull request #14162 from jia200x/pr/kconfig/cortex
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Kconfig/armv7_m/cortexm: declare CPU_ARCH and CPU_CORE symbols
2020-05-28 14:59:37 +02:00
Leandro Lanzieri
be8289bd8d
cpu/cortexm_common: Add Kconfig symbols
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This declares the architecture and core specific Kconfig symbols and the
features provided by it are selected.
2020-05-28 14:11:21 +02:00
Benjamin Valentin
7c11ae9dcc
cpu/lpc2387: use TIMER_CHANNELS for consistency
2020-05-28 13:24:06 +02:00
Benjamin Valentin
ec7ae668e2
cpu/sam0_common: define TIMER_CHANNELS
2020-05-28 13:24:06 +02:00
benpicco
8a2b089cd5
Merge pull request #14098 from maribu/atmega-timer
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cpu/atmega_common: Fix periph_timer
2020-05-28 13:23:22 +02:00
Marian Buschsieweke
99bd1c318c
cpu/atmega_common/periph_timer: Add timer_set
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Added a low level implementation of timer_set() that allows setting relative
timeouts as short as 0. This results in tests/periph_timer_short_relative_set
no passing.
2020-05-28 11:46:02 +02:00
Leandro Lanzieri
9d4582547f
cpu/Kconfig: Add a common symbol for the CPU Core
2020-05-28 10:08:34 +02:00
3244b26ab4
Merge pull request #14141 from aabadie/pr/cpu/stm32_fam_short
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cpu/stm32: use shorten name in CPU_FAM variable
2020-05-27 08:40:01 +02:00
8593176e29
Merge pull request #14140 from aabadie/pr/cpu/stm32_uid_base
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cpu/stm32: get the cpuid address from the UID_BASE constant defined in CMSIS
2020-05-27 08:39:35 +02:00
af8c4a32f6
Merge pull request #14147 from aabadie/pr/cpu/stm32f1_gpio_cleanup
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cpu/stm32f1: restore default gpio struct in CMSIS + adapt driver
2020-05-27 08:39:17 +02:00
31c6a225b2
Merge pull request #14145 from aabadie/pr/cpu/stm32_cleanup_exti
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cpu/stm32: restore default attribute names in exti structure for l4 and wb
2020-05-26 18:34:36 +02:00
cc9219c96e
cpu/stm32f1: adapt gpio driver and usage to CMSIS struct
2020-05-26 18:10:04 +02:00
Peter Kietzmann
4831300a6a
Merge pull request #14111 from leandrolanzieri/pr/cpu/kinetis/cleanup_dependencies
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cpu/kinetis: Move dependencies to Makefile.dep
2020-05-26 17:31:09 +02:00
c40f0a79bf
cpu/stm32: adapt rtc driver to default CMSIS exti structure
2020-05-26 17:29:37 +02:00
09c1afe9c5
cpu/stm32l4/wb: restore exti structure in vendor headers
2020-05-26 17:24:59 +02:00
97942ddbe6
cpu/stm32: adapt gpio driver to default CMSIS exti structure
2020-05-26 17:24:58 +02:00
Francisco
3ef40f3321
Merge pull request #14085 from maribu/atmega_irq
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cpu/atmega_common: Update to inlineable IRQ API
2020-05-26 16:33:07 +02:00
1a8f4d4f25
cpu/stm32f1: restore gpio struct to default in CMSIS header
2020-05-26 16:26:20 +02:00
61d3afcb63
cpu/stm32: remove hardcoded cpuid addr for f1
2020-05-26 15:44:50 +02:00
d78c955e50
cpu/stm32: remove hardcoded cpuid addr for f0
2020-05-26 15:44:50 +02:00
98a30ddadf
cpu/stm32: remove not needed periph_cpu.h for f3
2020-05-26 15:44:50 +02:00
4e33cebb3d
cpu/stm32: remove not needed periph_cpu.h for f7
2020-05-26 15:44:50 +02:00
bf01940ec7
cpu/stm32: use UID_BASE when possible
2020-05-26 15:44:50 +02:00
2313b85a8d
cpu/stm32: use UID_BASE from CMSIS when not defined
2020-05-26 15:44:50 +02:00
Marian Buschsieweke
9e566370bf
cpu/atmega_common: Fixed irq_arch implementation
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The inline assembly implementation was badly in need of improvement.
- irq_disable() took 2 CPU cycles more than needed
- The current interrupt state was stored in a temporary register and
afterwards copied to the target register, rather than storing it in the
target register right away
- The lower bits of the state were cleared (as they have no meaning for the
interrupt status), but the API purposely never required such things from
implementations.
- irq_restore() took 5 CPU cycles. This was reduced to 3 CPU cycles (or 2 CPU
cycles in the best case)
2020-05-26 15:19:14 +02:00
7bfdd7718f
cpu/stm32: introduce CPU_FAM_SHORT variable
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This variable contains the short cpu family name: f1, f2, etc.
2020-05-26 12:27:12 +02:00
8959274165
cpu/stm32: update vendor headers for f1
2020-05-26 11:43:45 +02:00
1e4da87aad
cpu/stm32: update vendor headers for f0
2020-05-26 11:43:44 +02:00
4f96cdbfcd
cpu/stm32: update stm32f334 vendor header
2020-05-26 11:43:44 +02:00
8a5ea2638b
cpu/stm32: update stm32f2 vendor headers
2020-05-26 11:43:44 +02:00
4f30f27e9d
cpu/stm32: update stm32f72x vendor headers
2020-05-26 11:43:37 +02:00
benpicco
3a30db4029
Merge pull request #13895 from gschorcht/cpu/esp32/fix_i2c_gpio_32_33
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cpu/esp32: fix GPIO32 and GPIO 33 as I2C pins
2020-05-25 22:37:35 +02:00
benpicco
a5836a6b27
Merge pull request #14128 from btcven/2020_05_24-cc13x2-i2c
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cc26xx_cc13xx: add periph_i2c implementation
2020-05-25 22:35:55 +02:00
benpicco
4f295a439b
Merge pull request #14131 from aabadie/pr/cpu/stmclk_cleanup
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cpu/stm32: move stmclk in its own module, remove useless ifdefs
2020-05-25 20:42:11 +02:00
46c4803eba
cpu/stm32: remove useless ifdef around DMA definitions
2020-05-25 13:23:20 +02:00
Jean Pierre Dudey
0f3393d61a
cpu/cc26x0: move i2c code to cc26xx_cc13xx
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-05-24 12:44:09 -05:00
Juergen Fitschen
df90176b1f
cpu/sam0_common/spi: move clk pin muxing into spi_acquire / spi_release
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When the SPI peripheral is disabled, the output lines will become HIGH-Z.
If the clk pin is not pulled HIGH or LOW, connected SPI slaves will start drawing current expectedly.
2020-05-23 13:54:39 +02:00
63a79ae6e4
cpu/stm32: move stmclk in its own module, remove useless ifdefs
2020-05-22 21:21:08 +02:00
Benjamin Valentin
7803cc053c
cpu/stm32: rtc_f1.c: remove executable bit
2020-05-21 11:43:25 +02:00
138c0c2a54
stm32/dma: Remove superfluous asserts from DMA hot path
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This commit removes a number of assert statements that should already
have been hit before. This is the reason that the assert in the
acquire function is left.
2020-05-21 11:34:54 +02:00
6793e7473b
stm32/dma: Move clear flags to acquire
2020-05-21 11:34:53 +02:00
977d227213
stm32/dma: Move FCR configuration to acquire function
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The FCR register content might change during mem-to-mem DMA transfers,
Forcing it back in the acquire should be sufficient to ensure proper
operations.
2020-05-21 11:34:52 +02:00
d7b1b7fc7c
stm32/dma: Move one-time config to init function
2020-05-21 11:34:46 +02:00
767329ef25
Merge pull request #14021 from aabadie/pr/cpu/stm32_unique
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cpu/stm32: refactor to use a single directory
2020-05-21 11:05:38 +02:00
Leandro Lanzieri
2ad14e4242
cpu/kinetis: Move dependencies to Makefile.dep
2020-05-20 19:46:13 +02:00
Leandro Lanzieri
9f41acaac6
cpu/native: Move dependencies to Makefile.dep
2020-05-20 18:24:39 +02:00
Benjamin Valentin
e1ca9102d5
cpu/saml1x: pm: set deep flag
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STANDBY mode is considered Deep Sleep on all other sam0 platforms.
Set it here too to be consistent.
2020-05-20 17:17:11 +02:00
b6d2231d6d
cpu/stm32: adapt Doxygen documentation
2020-05-20 13:39:11 +02:00
c50afaaf1b
cpu/stm32: remove redundant variables computations
2020-05-20 13:39:10 +02:00
36f6de3ce6
cpu/stm32: unify riotboot specific configuration
2020-05-20 13:39:10 +02:00
81e3e46fc5
cpu/stm32: remove old stm32xx_line.mk
2020-05-20 13:39:10 +02:00
5870e5d647
cpu/stm32: unify stm32_line.mk files
2020-05-20 13:39:10 +02:00
7d4b29530a
cpu/stm32*: remove old and unused stm32 dirs
2020-05-20 13:39:10 +02:00
5c810d8535
cpu/stm32: introduce unique directory for stm32 cpus
2020-05-20 13:39:10 +02:00
Vincent Dupont
8d9cc3f7e6
Merge pull request #14100 from OTAkeys/fix/exti_pr_clear_issue_upstream
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cpu/stm32_common: fix issue while clearing EXTI->PR reg
2020-05-19 15:08:52 +02:00
b15c4ef418
Merge pull request #14069 from benpicco/cpu/nrf52-cleanup
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cpu/nrf52: update & fix vendor files, derive flash settings
2020-05-19 10:55:50 +02:00
Marian Buschsieweke
067a9c38ae
cpu/atmega_common: Fix race in periph_timer
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As AVR is an 8 bit platform, special care needs to be taken when accessing 16
bit registers in an atomic fashion. This commit as just this care.
2020-05-18 21:22:31 +02:00
benpicco
9f707bf121
Merge pull request #14057 from bergzand/pr/nrf52/dma_spi
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nrf52: Implement EasyDMA-based SPI peripheral implemenation
2020-05-18 19:42:33 +02:00
16ff94b4fe
nrf5x: remove common nrf5x spi peripheral driver
2020-05-18 19:18:28 +02:00
99a59c5dbd
nrf5x: Extend gpio with exti channel retrieval
2020-05-18 19:17:29 +02:00
720ccad7dd
nrf52: Add EasyDMA-based SPI periph driver
2020-05-18 19:16:17 +02:00
1139c0737f
nrf52: add common SPI/I2C IRQ code
2020-05-18 19:14:56 +02:00
Abdulkerim Altuntas
578bd31908
cpu/stm32_common: fix issue while clearing EXTI->PR reg
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Since the "EXTI->PR" is an "rc_w1" type of register, we need to be
careful when clearing our interrupt flag in the register. When there
are multiple interrupt flags set in the register, the "|=" operation
will mistakenly clear all pending interrupts instead of just ours.
2020-05-18 18:36:27 +02:00
Marian Buschsieweke
ba5844098d
cpu/atmega_common: Make irq_arch inline-able
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- Moved irq_arch.c to irq_arch.h and marked all functions as
`__attribute__((always_inline)) static inline`
2020-05-17 18:41:11 +02:00
benpicco
cc44992abe
Merge pull request #12827 from maribu/atmega_pwm
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cpu/atmega_common/periph/pwm: Minor fix & cleanup
2020-05-16 22:26:58 +02:00
Marian Buschsieweke
506288791d
cpu/atmega_common/periph/pwm: Minor fix & cleanup
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- On pwm_poweron, the PWM resolution was not restored. (A custom resolution was
only usable if, PWM channel 0 is not used. That configuration is not common,
so this bug was likely never triggered)
- Disabled a work around to prevent flickering:
- Previously, PWM was disconnected on level 0% and 100%
- This increases the run time of `pwm_set()`
- It prevents using the PWM for wave form generation via DDS, as the wave
noticeably jumps when reaching 0% or 100%
- Slightly reduces memory requirements: 2 Bytes of RAM, 112 Bytes of ROM
- Tested with avr-gcc 9.2.0 and LTO enabled
2020-05-16 20:43:31 +02:00
Benjamin Valentin
bdf40d5ffa
cpu/nrf52: fix NRF52811 vendor file
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That `system_nrf52811.h` include must be removed.
2020-05-16 19:22:14 +02:00
Benjamin Valentin
d8a5f87aee
cpu/nrf52: update vendor files
2020-05-16 19:21:56 +02:00
benpicco
22b2f3664f
Merge pull request #14089 from maribu/atmega_cpu_cleanup
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cpu/atmega{_common,32u4}: Cleanup
2020-05-16 19:17:29 +02:00
Benjamin Valentin
e26ed32cd6
cpu/arm7_common: simplify irq_restore()
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We do not manipulate the CPSR register outside of irq_%, so we can just
restore it's previous value and don't have to fiddle with the IRQ MASK bit.
See https://www.keil.com/pack/doc/CMSIS/Core_A/html/group__CMSIS__CPSR.html
2020-05-15 13:43:04 +02:00
Benjamin Valentin
8d0e902d38
cpu/arm7_common: add inlined header only def for irq_%
2020-05-15 13:43:04 +02:00
Marian Buschsieweke
2f3961690e
cpu/atmega_common: Add feature PUF_SRAM
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The feature is implemented in `cpu/atmega_common`, so we can just enable it for
all ATmega boards.
2020-05-15 11:31:23 +02:00
Marian Buschsieweke
355b01ce98
cpu/atmega_common: Moved atmega_state to cpu.c
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The global state flags should never have bin in irq_arch.c but in cpu.c. This
is not fixed.
2020-05-15 11:24:29 +02:00
Marian Buschsieweke
4d1a5b9256
cpu/atmega_common: Drop legacy include
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Drop `#include "irq.h"` in `cpu.h`, which was there for a legacy work around.
A bunch of missing includes of `irq.h` materialized due to this and were
fixed.
2020-05-15 11:24:28 +02:00
Marian Buschsieweke
70f24edd03
cpu/atmega32u4: Clean up
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- Drop duplicated `cpu.c` and `cpu_conf.h`: Those are already provided by
`cpu/atmega_common`.
- The higher values for default stack size of `cpu_conf.h` in
`cpu/atmega_common` results in three tests no longer fitting the available RAM
==> Updated the Makefile.ci to skip linking of those tests for the Arduino
Leonardo
2020-05-15 11:23:05 +02:00
3b0510f9bc
Merge pull request #14077 from maribu/esp32-external-board
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cpu/esp*: Allow compilation with external boards
2020-05-14 21:16:54 +02:00
Francisco
1f9d299492
Merge pull request #13196 from HendrikVE/shell-readline-refactor
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sys/shell: refactor readline function
2020-05-14 15:32:45 +02:00
Marian Buschsieweke
fc28ba5c08
cpu/esp8266: Allow compilation with external boards
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Replace `$(RIOTBOARD)/$(BOARD)` with `$(BOARDDIR)`, which also works for
external boards.
2020-05-14 13:35:51 +02:00
Marian Buschsieweke
1dbcdd3d4b
cpu/esp32: Allow compilation with external boards
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Replace `$(RIOTBOARD)/$(BOARD)` with `$(BOARDDIR)`, which also works for
external boards.
2020-05-14 13:32:19 +02:00
Kees Bakker
5ef4b1843a
Merge pull request #14032 from benpicco/cpu/sam0_common-rtc_cleanup
2020-05-13 22:54:31 +02:00
da2230df48
Merge pull request #13999 from fjmolinas/pr_cortexm_inline_irq
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cpu/cortexm_common: add inlined header only def for irq_%
2020-05-12 21:15:57 +02:00
8761c47e43
nrf51: move common SPI implementation
2020-05-12 19:15:25 +02:00
Benjamin Valentin
d34551e8da
cpu/nrf52: use vendor defines for flash size
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We don't need to define FLASHPAGE_SIZE and FLASHPAGE_NUMOF ourself if
the BPROT peripheral is present.
Now why nrf52840 doesn't have it, I don't know, but for nrf52832 and
nrf23811 the values in BPROT_REGIONS_SIZE and BPROT_REGIONS_NUM match
the values manually provided here before.
2020-05-12 18:10:15 +02:00
Gunar Schorcht
fef3c101b7
Revert "cpu/esp_common: fix dependency of flash target on ELF file"
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This reverts commit d0cc955394
2020-05-12 18:07:48 +02:00
Francisco Molina
b5e4224a6f
cpu/cortexm_common: remove special cortexm_sleep handle for stm32l152re
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__set_PRIMASK(state) had been directly inlined to avoid a hardfault that
occured when branching after waking up from sleep with DBG_STANDBY,
DBG_STOP or DBG_SLEEP set in DBG_CR.
The hardfault occured when returning from the branch to irq_restore,
since the function is now inlined the branch does not happen either.
Refer to #14015 for more details.
2020-05-12 16:37:34 +02:00
Francisco Molina
4ad3164599
cpu/cortexm_common/irq_arch: fix irq_enable return type
2020-05-12 16:37:34 +02:00
Francisco Molina
cb5cbe7431
cpu/cortexm_common: add inlined header only def for irq_%
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irq_% are not inlined by the compiler which leads to it branching
to a function that actually implement a single machine instruction.
Inlining these functions makes the call more efficient as well as
saving some bytes in ROM.
2020-05-12 16:37:34 +02:00
Benjamin Valentin
20a044c956
cpu/nrf52: fix nrf52811 interrupt vector table
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SPI1 and TWI0 share the same IRQ, not SPI1 and TWI1
2020-05-12 15:10:06 +02:00
Benjamin Valentin
d53bc7bf73
cpu/nrf52: add peripherals.h vendor files
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Those make our lives much easier.
2020-05-12 14:52:06 +02:00
Benjamin Valentin
fb2f2c456f
cpu/nrf52: add nrf52811 vendor files
2020-05-12 14:49:26 +02:00
Philipp Blum
35dcf637f2
cpu/nrf52: add support for nrf52811
2020-05-10 17:10:33 +02:00
benpicco
0bbc86a379
Merge pull request #14041 from gschorcht/cpu/esp/fix_make_flash_dependency
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cpu/esp_common: fix the dependency of the flash image on the ELF file
2020-05-08 11:55:14 +02:00
Gunar Schorcht
d0cc955394
cpu/esp_common: fix dependency of flash target on ELF file
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Flashing an ESP board first requires the creation of a flash image from the ELF file. This is realized in the `preflash` target. However, the `preflash` target only depends on the variable `BUILD_BEFORE_FLASH` but on the ELF file. Therefore, the variable `BUILD_BEFORE_FLASH` must be set to the ELF file to ensure that when using multiple make processes, the compilation of the ELF file is completed before the flash image is created.
2020-05-08 11:03:39 +02:00
Marian Buschsieweke
0fe24e1c8b
Merge pull request #13903 from benpicco/cpu/lpc2387/timer_pclk_scale
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cpu/lpc2387: timer: use lpc2387_pclk_scale()
2020-05-07 22:04:14 +02:00
fabian18
a3a1c160ee
mtd: Change API to return 0 on success
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Returning the number of bytes written/read could return a negative integer
because a uint32_t is expected for the length in read()/write() operations.
2020-05-06 20:24:27 +02:00
Francisco Molina
bd3eff3537
cpu/esp32: switch from O2 to Os
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In #12955 optimization was switched to O2 because with the '-Os'
option, the ESP32 hangs sporadically in 'tests/bench*' if
interrupts where disabled too early by benchmark tests.
Since it hasn't been reproduced since and in #13196 O2 was causing
un-explained hardfaults, since the aforementioned issue could not
be reproduced we switch back to Os by removing O2, as Os will be
used by default.
2020-05-06 18:46:43 +02:00
Benjamin Valentin
5481d8c73a
cpu/sam0_common: clean up formatting
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Make the code nicer to read.
2020-05-06 14:11:47 +02:00
Benjamin Valentin
e93c9a82f1
cpu/sam0_common: RTC INTFLAG are clear on write
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Writing a 1 bit clears the interrupt flag, writing with |= is thus
uneccecary (and actually an error as this would clear *all* flags).
This cleanup was already done for rtt.c, but rtc.c missed out.
2020-05-06 14:05:12 +02:00
Francisco
cea0d1c532
Merge pull request #13421 from benpicco/cpu/sam0_common/i2c-deinit
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drivers/periph/i2c: add periph_i2c_reconfigure feature & implementation for sam0
2020-05-05 19:09:47 +02:00
5773db93f8
Merge pull request #14025 from fjmolinas/pr_nrf5x_rtt_conf
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boards/common/nrf5x: add configurable RTT_FREQUENCY
2020-05-05 17:46:05 +02:00
Benjamin Valentin
8c502322f4
cpu/sam0_common: i2c: implement the periph_i2c_reconfigure feature
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This adds sam0 implementations for
- i2c_init_pins()
- i2c_deinit_pins()
- i2c_pin_sda()
- i2c_pin_scl()
2020-05-05 16:12:19 +02:00
Francisco Molina
409185c5ce
boards/common/nrf5x: add configurable RTT_FREQUENCY
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Adds: RTT_MAX_FREQUENCY, RTT_MIN_FREQUENCY & RTT_CLOCK_FREQUENCY
2020-05-05 14:52:55 +02:00
cab264a056
cpu/lm4f120: fix invalid doxygen group name
2020-05-05 14:08:32 +02:00
Semjon Kerner
cb228a44f2
Merge pull request #14002 from PeterKietzmann/pr_nrf5x_hwrng_biascorr
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cpu/nrf5x_common: enable bias correction in hwrng
2020-05-05 13:40:15 +02:00
benpicco
3c03394e1e
Merge pull request #13820 from francois-berder/pic32-gpio-irq
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cpu: mips_pic32_common: Implement GPIO IRQ
2020-05-04 18:36:48 +02:00
Marian Buschsieweke
ac246cfd10
cpu/msp430_common: Fix missing include
2020-05-04 10:58:36 +02:00
benpicco
fbae0a1117
Merge pull request #13901 from benpicco/cpu/sam0_common/timer_flex_freq
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cpu/sam0_common: timer: don't ignore frequency in timer_init()
2020-05-04 02:56:01 +02:00
benpicco
fab87d903c
Merge pull request #13991 from btcven/2020_04_30-osc
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cc26x2_cc13x2: add oscillator switching functions
2020-05-02 22:46:03 +02:00
Dylan Laduranty
57c1a49a82
Merge pull request #13957 from benpicco/cpu/samd21-pwm_flex
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cpu/samd21: PWM don't hard-code number of channels to 3
2020-05-02 20:52:56 +02:00
Martine Lenders
ad89680c40
Merge pull request #14004 from gschorcht/cpu/esp32/fix_newlib_nano_printf_float
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cpu/esp32: fix printf for float with newlib-nano
2020-05-02 20:43:00 +02:00
Dylan Laduranty
76870721fe
Merge pull request #13965 from benpicco/cpu/sam0_common/periph/dac
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cpu/sam0_common: implement periph/dac
2020-05-02 20:34:40 +02:00
Jean Pierre Dudey
4bf6a4db04
cc26x2_cc13x2: separate arrays with newline
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-05-02 13:25:41 -05:00
Jean Pierre Dudey
a66c693ad5
cc26x2_cc13x2: add oscillator switching functions
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-05-02 13:25:41 -05:00
Jean Pierre Dudey
0aeed80eb0
cc26xx_cc13xx: add ROM Hard-API
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This is needed to switch the SCLK_HF source clock safely.
Note: these functions work on cc26x2_cc13x2 and cc26x0, but special care
needs to be taken when calling on cc26x0 some of these functions, as
ADDI_SEM needs to be taken.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-05-02 13:25:41 -05:00
Francois Berder
8db01ab9a0
cpu: mips_pic32_common: Implement GPIO IRQ
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Signed-off-by: Francois Berder <18538310+francois-berder@users.noreply.github.com>
2020-05-02 17:59:17 +01:00
Benjamin Valentin
bfb3d52a63
cpu/sam0_common: implement periph/dac
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The sam0 MCUs all have a DAC peripheral.
The DAC has a resulution of 10 or 12 bits and can have one or two
output channels.
The output pins are always hard-wired to PA2 for DAC0 and PA5 for DAC1
if it exists.
On the same54-xpro I would only get a max value of ~1V when using the
internal reference, so I configured it to use an external voltage reference.
The external reference pin is hard-wired to PA3, so you'll have to connect
that to 3.3V to get results.
2020-05-02 18:31:55 +02:00
Gunar Schorcht
5fbf74b203
cpu/esp32: fix printf for float with newlib-nano
2020-05-02 16:56:29 +02:00
PeterKietzmann
dd2d6b174e
cpu/nrf5x_common: enable bias correction in hwrng
2020-05-01 17:04:36 +02:00
Benjamin Valentin
c05984b341
cpu/sam0_common: timer: don't ignore frequency in timer_init()
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Now that we can query the GCLK frequency at run-time, there is no need
to implicitely hard-code the timer frequency in the config struct anymore.
2020-05-01 16:44:06 +02:00
benpicco
99e8b04921
Merge pull request #13812 from gschorcht/cpu/esp32/fix_newlib_nano
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cpu/esp32: use module newlib_nano
2020-05-01 14:40:02 +02:00
benpicco
4150afea00
Merge pull request #13749 from gschorcht/cpu/esp32/periph_rtt
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cpu/esp32: replace RTC implementation by RTT implementation
2020-05-01 14:14:01 +02:00
benpicco
c95e4c3b9e
Merge pull request #13816 from btcven/2020_04_02-setup-trim-device
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cc26x2_cc13x2: trim device registers on `cpu_init`.
2020-05-01 14:09:08 +02:00
Benjamin Valentin
89a145ab0c
cpu/lpc2387: clocks: minor style fix
2020-04-30 20:43:41 +02:00
Benjamin Valentin
c262c91561
cpu/lpc2387: PM: enable SLEEP & POWERDOWN mode
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We have to re-init PLL (and Flash) after wake from those modes.
2020-04-30 20:43:41 +02:00
Benjamin Valentin
3b257f9a5a
cpu/lpc2387: export functions to init PLL & MAM
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Those functions are needed after wake from lower sleep modes.
2020-04-30 20:43:41 +02:00
Jean Pierre Dudey
951a99dba3
cc26x2_cc13x2: add setup_trim_device function
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This function trims the necessary registers for the device to operate
normally.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:32:58 -05:00
Jean Pierre Dudey
dc1d2ace42
cc26xx_cc13xx: add ADI3 and masked access
...
- Added ADI instruction offsets
- Added register banks and address bases for masked access (writes).
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:32:58 -05:00
Jean Pierre Dudey
92589c2129
cc26x2_cc13x2: update AON_PMCTL register bank
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- Updated documentation.
- Fixed offset of JTAGUSERCODE.
- Added necessary register values to perform startup trims.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
e2489ced97
cc26xx_cc13xx: add register values
...
Add some register values needed to trim registers.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
e514266186
cc26x2_cc13x2: add FCFG->DAC_BIAS_CNF values
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These are necessary to trim some registers at startup.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
6829dfdf1b
cc26xx_cc13xx: fix FLASH->CFG offset, update VIMS
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- Changed "meh" to "Reserved".
- Renamed CTL to CFG to match SDK/TRM name.
- Added constants for VIMS and FLASH necessary to trim registers.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
1733e62217
cc26xx_cc13xx: update AON_IOC register bank
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- Updated documentation
- Fixed register bank name
- Added missing field
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
cdf2e88804
cc26x2_cc13x2: add 16-bit masked access to DDI_0_OSC
...
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
1586c89f1a
cc26x2_cc13x2: update DDI_0_OSC register bank
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- Fixes padding.
- Updates documentation.
- Removes documentation longer than 80-chars for the registers values.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 10:17:20 -05:00
Jean Pierre Dudey
2921944c66
cc26x2_cc13x2: add function to change AUX opmode
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This function is needed to setup the AUX operational mode at startup,
also used for managing low-power states.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 09:38:36 -05:00
5a9f01d91a
native: pass eeprom file path via command line
2020-04-29 08:56:33 +02:00
cbdda3c990
cpu/native: read/persist EEPROM data at startup/reboot/exit
2020-04-29 08:55:10 +02:00
4e1d7abddc
cpu/native: implement eeprom peripheral driver
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The driver simply manages an internal buffer in memory that can be filled/dumped from/to a file
2020-04-29 08:55:08 +02:00
benpicco
4bb8fab1dc
Merge pull request #13971 from bergzand/pr/sam0_common/cpuid_clarify
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sam0_common: clarify memcpy in cpuid_get
2020-04-28 18:31:27 +02:00
benpicco
96c638f2d1
Merge pull request #13949 from benpicco/MAKEFILEDIR-doc
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Makefile.include: update the documentation of $(MAKEFILEDIR)
2020-04-28 18:30:44 +02:00
Benjamin Valentin
d5dce87e1b
Makefile.include: rename MAKEFILEDIR to LAST_MAKEFILEDIR
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Rename the variable to make it clearer that it refers to the last Makefile
included.
Usually this is the current file, but when another Makefile is included this
changes.
2020-04-28 15:45:27 +02:00
fe299138aa
sam0_common: clarify memcpy in cpuid_get
2020-04-28 14:56:19 +02:00
Francisco Molina
b78e4efb56
cpu/stm32f1: dont provide periph_rtc at cpu level
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stm32f1 periph_rtc implementation gets a 1s resolution by dividing
CLOCK_LSx by 32768. This only make sense if CLOCK_LSE is set,
otherwise CLOCK_LSI=~40000, which will lead to an imprecise rtc.
2020-04-27 08:59:21 +02:00
benpicco
4ceff67ca0
Merge pull request #13127 from francois-berder/remove-objcopy-warning
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cpu: mips_pic32*: Fix unused .gcc_except_table section warning
2020-04-26 23:27:30 +02:00
Benjamin Valentin
da89f6ac5f
cpu/samd21: don't hard-code number of channels
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Each TCC can have 8 PWM channels, so don't hard-code
3 channels/TCC.
2020-04-26 22:26:01 +02:00
Marian Buschsieweke
70a558059e
Merge pull request #13955 from benpicco/cpu/lpc2387-pm_num_modes
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cpu/lpc2387: PM_NUM_MODES must only count non-idle modes
2020-04-26 21:46:40 +02:00
benpicco
bbe1e723df
Merge pull request #13936 from btcven/2020_04_23-aux
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cc26x2_cc13x2: fix AUX_* register domain documentation
2020-04-26 20:41:40 +02:00
Benjamin Valentin
c21b5d6f55
cpu/lpc2387: PM_NUM_MODES must only count non-idle modes
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lpc23xx has 3 sleep modes and one idle mode.
`PM_NUM_MODES` must only count the idle modes.
In practise, this makes no difference since `mode 3` (IDLE) is
the `default` case in `pm_set()` anyway.
2020-04-26 19:45:43 +02:00
benpicco
5ca030b311
Merge pull request #13937 from btcven/2020_04_23-flash-aux
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cc26xx_cc13xx: update VIMS/FLASH documentation
2020-04-26 17:23:51 +02:00
Jean Pierre Dudey
81d0d7c1f8
cc26x2_cc13x2: update AUX domain documentation
...
The following registers were updated:
- AIO_AIODIOx documentation
- AUX_TDC documentation
- AUX_EVCTL documentation
- AUX_SYSIF documentation
- Fixed a copy/paste error in AUX_SYSIF definition.
- Registers now match original names.
- AUX_TIMER01 documentation
- AUX_TIMER2 documentation
- AUX_SMPH documentation
- AUX_ANAIF documentation
- update ADI_4_AUX documentation
- Added missing LPMBIAS register
- ADDI_SEM documentation
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-26 09:35:26 -05:00
Francisco Molina
4d398ab09e
cpu/stm32f1: add unified rtt configuration
2020-04-24 08:57:04 +02:00
Jean Pierre Dudey
0aba7556d0
cc26xx_cc13xx: update VIMS/FLASH documentation
...
Also i've fixed the register bank offsets, 0x4 was being added without
need.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-23 17:10:18 -05:00
Marian Buschsieweke
fdf955cfb2
Merge pull request #13899 from Hoernchen20/stm32f1_adc
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boards/blxxxpill: improve adc
2020-04-22 23:07:26 +02:00
Hoernchen20
11618d32c0
cpu/stm32f1/periph_adc: Reduce power consumption
2020-04-22 21:08:20 +02:00
Hoernchen20
4e87682ba1
boards/common/blxxxpill: Add internal ADC lines
2020-04-22 21:08:20 +02:00
Leandro Lanzieri
db316c14a7
Merge pull request #13919 from benpicco/cpu/lpc2387-fix_rtc
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cpu/lpc2387: fix RTC leap year calculation
2020-04-22 11:10:37 +02:00
Benjamin Valentin
4ee8d3f4d2
cpu/lpc2387: enable full rtc_normalize() for RTC
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The RTC actually makes use of the day of year / day of week fields,
so enable the calculation of those fields in rtc_normalize().
2020-04-22 10:39:33 +02:00
3e922f878a
Merge pull request #13875 from fjmolinas/pr_core_macros
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core/includes: add common macros file
2020-04-21 15:32:51 +02:00
Francisco Molina
da90407572
cpu/esp_common/include: include common xtstr header
2020-04-21 15:10:55 +02:00
Francisco
3d8f71768c
Merge pull request #13846 from benpicco/Makefile-THISDIR
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Makefile.include: add $(MAKEFILEDIR) helper and use it
2020-04-21 11:00:52 +02:00
Matthew Bradbury
ba51e90228
cpu/cc2538: Flush the RX FIFO (if overflowed) after a receive
2020-04-20 18:19:23 +01:00
Matthew Bradbury
bcfb437746
cpu/cc2538: Do not check XREG_RSSISTATbits for RSSI_VALID
2020-04-20 18:18:56 +01:00
Matthew Bradbury
ecfe4a4e8f
cpu/cc2538: Check CRC of received message after reading message contents
2020-04-20 18:18:56 +01:00
Matthew Bradbury
fc0581056a
cpu/cc2538: Check for a minimum length to read from a received frame
2020-04-20 18:18:56 +01:00
Matthew Bradbury
f0e48f0741
cpu/cc2538: Prevent underflow of the RX FIFO
2020-04-20 18:18:53 +01:00
Benjamin Valentin
370fff90a8
cpu/lpc2387: timer: use lpc2387_pclk_scale()
2020-04-19 15:32:42 +02:00
Martine Lenders
55a7010a0a
Merge pull request #13157 from nmeum/pr/fuzzing_tcp_only
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Add AFL-based fuzzing setup for network modules
2020-04-18 10:54:14 +02:00
Gunar Schorcht
bb51fbb7ec
cpu/esp32: fix GPIO32 and GPIO 33 as I2C pins
...
GPIO32 and GPIO33 are used during boot to start an 32.768 kHz XTAL if it is connected to these GPIOs. If the 32.768 kHz XTAL is not connected, these pins can be used digital IO. However, the 32.678 kHz XTAL has to be disabled explicitly in this case. Furthermore, the handling of GPIOs greater than GPIO31 had to be fixed in I2C software implementation.
2020-04-17 18:46:15 +02:00
benpicco
91200aa6ea
Merge pull request #13867 from btcven/2020_04_14-ccfg-fcfg1
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cc26xx_cc13xx: fix CCFG/FCFG1 register offsets
2020-04-15 17:33:12 +02:00
benpicco
7aa62006e7
Merge pull request #13840 from btcven/2020_04_06-uart1
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cc26xx_cc13xx: fix UART1 initialization
2020-04-15 17:15:24 +02:00
Benjamin Valentin
c1d05f07a5
cpu/kinetis: use $(MAKEFILEDIR)
2020-04-15 11:51:11 +02:00
Jean Pierre Dudey
e944638d3d
cc26x2_cc13x2: fix FCFG1 register offsets
...
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-14 17:22:02 -05:00
Jean Pierre Dudey
cbcd7d58e7
cc26xx_cc13xx: fix CCFG offset on x2 variants
...
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-14 17:15:56 -05:00
benpicco
b9fda5630e
Merge pull request #13851 from iosabi/vectors_cortexm
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Allow to define reserved fields in CortexM vector table.
2020-04-14 23:18:29 +02:00
Akshai M
642fe16807
cpu/nrf52/include/nrf802154.h : Add Group
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Add CT Params to netdev group in Config for Doxygen
2020-04-14 20:52:16 +05:30
Benjamin Valentin
cfe606b601
cpu/lpc2387: gpio: Don't discriminate between rising & falling pins
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The `test_irq()` function does not discriminate between rising and
falling pins, so there is no need to handle them separately.
2020-04-12 21:31:42 +02:00
Benjamin Valentin
6233175f16
cpu/lpc2387: gpio: Fix interrupts on PORT2
...
The calculation of `_state_index` is broken for `port = 2`
_gpio_isr_map[n + (port<<1)];
Will not yield the right result. As a consequence, IRQs on Port 2
are not working.
The right thing here would be
_gpio_isr_map[n + (port ? 32 : 0)];
But we might just re-using the `_isr_map_entry()` function.
Also only iterate as many times as there are set interrupt bits.
2020-04-12 21:31:42 +02:00
iosabi
7e7b6e1cfe
Allow to define reserved fields in CortexM vector table.
...
The ARM CortexM vector table has some reserved fields which are used by
some manufacturers to store their custom image information. In
particular, NXP QN908X stores the checksum, Code Read Protection, image
type and boot block pointer in this region.
This patch allows the cpu and board modules to define the value of these
fields at build time by defining a macro.
2020-04-10 10:37:41 +00:00
Leandro Lanzieri
a06d9bbb66
Merge pull request #13315 from jia200x/pr/kconfig/ieee802154
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ieee802154: Expose configurations to Kconfig
2020-04-08 19:34:55 +02:00
Jean Pierre Dudey
d4084d6df9
cc26xx_cc13xx: fix UART1 initialization
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-08 12:24:02 -05:00
Jose Alamos
77325b4cde
ieee802154: add CONFIG_ prefix to config macros
2020-04-08 19:08:25 +02:00
Leandro Lanzieri
c36f2ee077
cpu/Kconfig: Declare common CPU symbols
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The symbols used to define a CPU are:
- CPU
- CPU_MODEL
- CPU_FAMILY
- CPU_ARCH
2020-04-08 17:37:06 +02:00
Dylan Laduranty
f9a4c509b1
Merge pull request #13797 from benpicco/cpu/samd21-pwm
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cpu/samd21: pwm: allow to use channels > 3
2020-04-08 15:45:22 +02:00
Benjamin Valentin
4d90a9c6b5
cpu/samd21: pwm: fix GCLK_ID & APBCMASK calculation
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GCLK_ID and APBCMASK entries are not always uniform.
The previous hack would already break for TCC3.
Just explosively write down the cases, there are only 5 at most.
2020-04-08 15:24:05 +02:00
ee3fc27e96
cpu/fe310: implement driver for watchdog
2020-04-07 14:37:55 +02:00
Sören Tempel
d7104e4992
makefiles/toolchain: add support for afl
2020-04-07 14:24:10 +02:00
Leandro Lanzieri
d60295db3c
Merge pull request #13720 from aabadie/pr/native_no_export
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native: only export NATIVEINCLUDES in vars.inc.mk
2020-04-07 12:55:45 +02:00
Gunar Schorcht
ce431b2343
cpu/esp32: use RTT based RTC implementation
2020-04-07 09:12:44 +02:00
Gunar Schorcht
0e7eb48d6a
cpu/esp32: use RTT instead of RTC in pm_layered
2020-04-07 09:12:44 +02:00
Gunar Schorcht
f67cb48f6d
cpu/esp32: add RTT counter implementation
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fixup! cpu/esp32: add RTT counter implementation
2020-04-07 09:12:44 +02:00
Benjamin Valentin
4451765952
cpu/lpc2387: fix check for max number of timers
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The CPU has 4 hardware timers.
Configuration for all 4 timers exists, but the compile-time range
check has an off-by-one error, causing the last timer to remain
inaccessible.
2020-04-05 01:56:55 +02:00
Gunar Schorcht
f2e776bd3f
cpu/esp32: use module newlib_nano
2020-04-04 13:37:22 +02:00
benpicco
b87be4bd6e
Merge pull request #13786 from benpicco/cpu/saml21/buck_converter
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cpu/saml21: enable buck voltage regulator when possible
2020-04-03 18:12:05 +02:00
Gunar Schorcht
6cd9896ac0
cpu/esp: move BACKUP* attributes to esp_common
2020-04-03 18:07:12 +02:00
Gunar Schorcht
a0b77de3dc
cpu/esp8266: move RTC_BSS_ATTR to cpu/esp_common
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Since the attribute is required by EPS8266 as well as ESP32, it is moved to cpu/esp_common.
2020-04-03 18:07:12 +02:00
Pekka Nikander
4534e9b773
cpu/cortexm_common: add irq sub-priorities
...
This commit enables Cortex-M CPU interrupt sub-priorities
and allows the PendSV interrupt to have a priority different
from the default one. Together these two preprocessor
defines can be used to have PendSV always run as the last interrupt
before returning from the interrupt stack back to the user space.
Running PendSV as the last interrupt before returning to the
user space is recommended by ARM, as it increases efficiency.
Furthermore, that change enhances stability a lot with the
new nRF52 SoftDevice support, currently being worked in
PR #9473 .
This commit merely enables sub-priorities and a separate
PendSV priority to be used without changing the default
RIOT behaviour.
2020-04-03 17:49:31 +02:00
Benjamin Valentin
01c573c612
cpu/samd21: pwm: allow to use channels > 3
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Channels 4…7 are on the CCB register.
2020-04-03 01:02:38 +02:00
Benjamin Valentin
49fda3e900
cpu/samd5x: don't run DFLL on-demand
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The DFLL on samd5x has a hardware bug that requires a special
re-enabling sequence when it is disabled and then re-enabled again.
When running the clock on-demand, the hardware handles the disabling
and re-enabling so that sequence does not get executed.
To reproduce, run `tests/periph_uart` on `same54-xpro`.
Without this patch the test will get seemingly stuck on `sleep_test()`.
(In fact it keeps running, but the DFLL has the wrong frequency so the
UART baudrate is wrong).
In this test, on `same54-xpro` only UART0 is sourced from DFLL.
So if the UART is disabled the DFLL will be turned off as well.
2020-04-02 20:11:41 +02:00
Benjamin Valentin
f037e06b13
cpu/saml21: enable buck voltage regulator when possible
...
Switch from the on-chip LDO to the on-chip buck voltage regulator
when not fast internal oscillators are used.
On `saml21-xpro` with `examples/default` this gives
**before:** 750 µA
** after:** 385 µA
2020-04-02 17:25:16 +02:00
Benjamin Valentin
3f95d3d2e3
cpu/saml21: pm: set deep flag
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Set the deep flag for consistency with other family members.
2020-04-02 17:25:13 +02:00
Benjamin Valentin
7e156dd2e5
cpu/saml1x, saml2x: PM_NUM_MODES is a valid mode
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The mode PM_NUM_MODES is the IDLE mode, so do not skip it.
2020-04-01 18:10:23 +02:00
Benjamin Valentin
5d123cbb22
cpu/sam0_common: distribute PM_NUM_MODES among siblings
...
Also adapt the defines to the documentation
- CPUs define up to 4 power modes (from zero, the lowest power mode,
to PM_NUM_MODES-1, the highest)
- >> there is an implicit extra idle mode (which has the number PM_NUM_MODES) <<
Previously on saml21 this would always generate pm_set(3) which is an illegal state.
Now pm_layered will correctly generate pm_set(2) for IDLE modes.
Idle power consumption dropped from 750µA to 368µA and wake-up from standby is also
possible. (Before it would just enter STANDBY again as the mode register was never
written with the illegal value.)
2020-04-01 18:10:23 +02:00
Benjamin Valentin
f6139ae346
cpu/samd5x: work around errata when (re-)initializing DFLL
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When a previously disabled DFLL gets enabled again, the frequency will
be incorrect. Follow the procedure outlined in the errata sheet, section 2.8.3
to work around the issue.
This fixes wake from standby.
2020-04-01 15:41:20 +02:00
Dylan Laduranty
6bba4188fc
Merge pull request #13764 from benpicco/cpu/saml11/use_buck_converter
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cpu/saml1x: select buck voltage regulator when possible
2020-04-01 14:47:47 +02:00
Leandro Lanzieri
ea2f963302
cpu/cortexm: Add 'cortexm_fpu' as a DEFAULT_MODULE if possible
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This adds cortexm_fpu to the DEFAULT_MODULE list when the feature
cortexm_fpu is provided by the architecture. It also moves the
dependency resolution of this module to the architecture-specific
Makefile.dep file.
2020-04-01 09:46:29 +02:00
Leandro Lanzieri
64552a3b9a
cpu/cortexm_common: Move common modules to Makefile.dep
...
This moves the following modules to a architecture-specific Makefile.dep
file:
- cortexm_common
- cortexm_common_periph
- newlib
- newlib_nano
- periph
2020-04-01 09:46:21 +02:00
benpicco
e5562a89a3
Merge pull request #13765 from gschorcht/cpu/esp/fix_netopt_link_type
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cpu/esp: fix type for NETOPT_LINK for esp_wifi/esp_eth
2020-03-31 21:51:08 +02:00
Gunar Schorcht
579de1a1e7
cpu/esp: deprecated NETOPT_LINK_CONNECTED renamed
2020-03-31 18:11:47 +02:00
Gunar Schorcht
aa3de05601
cpu/esp: fix netopt_enabled_t handling in esp_wifi/esp_eth
2020-03-31 18:11:36 +02:00
Dylan Laduranty
6a788b3c02
Merge pull request #13761 from RIOT-OS/cpu/samd5x/rtc_workaround
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cpu/samd5x: disable RTC on init to prevent undefined RTC state
2020-03-31 17:25:25 +02:00
Benjamin Valentin
895eb943d8
cpu/sam0_common: add cpu_pm_cb_enter()/leave()
...
This allows to implement needed work-arounds surrounding sleep on
a per-MCU basis.
2020-03-31 17:18:58 +02:00
Benjamin Valentin
005de7024b
cpu/saml1x: enable buck voltage regulator
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Switch from the on-chip LDO to the on-chip buck voltage regulator.
2020-03-31 17:18:58 +02:00
Benjamin Valentin
9b90fd478a
cpu/sam0_common: provide function to switch voltage regulator
...
Add a fucntion to switch between LDO and Buck concerter to provide the
internal CPU voltage.
The Buck Converter is not compatible with internal fast oscillators (DFLL, DPLL)
and requires an inductivity to be present on the board.
2020-03-31 17:18:20 +02:00
Francisco
1a8b35f54b
Merge pull request #13377 from leandrolanzieri/pr/kconfig_migrate/drivers/periph_wdt
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drivers/periph/wdt: Expose configurations to Kconfig
2020-03-31 16:36:36 +02:00
Dylan Laduranty
783ffdc28a
Merge pull request #13607 from benpicco/cpu/sam0_common/generic_RAM_ROM
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cpu/sam0_common: derive ROM_LEN & RAM_LEN from part number
2020-03-31 15:55:04 +02:00
Benjamin Valentin
d12abe6a2b
cpu/samd5x: disable RTC on init to prevent undefined RTC state
...
When changing the clock configuration while the RTC is running, the
RTC may end up in an undefined state that leaves it unresponsive.
The RTC is not reset to stay persistent across reboots/hibernate, so
it will not be reset on init.
Instead, disable the RTC while configuring the clocks, rtc_init() will
take care of re-enabling it.
@dylad introduced this workaround for saml21, samd5x needs it too.
To reproduce, set the CLOCK_CORECLOCK of a samd5x board (e.g. same54-xpro)
to 48 MHz.
Run any RTC application. The CPU will be stuck in _wait_syncbusy() after
a reboot.
This patch will fix this. (You will need to power-cycle the board if the
RTC has entered the stuck state as it will never be reset.)
2020-03-31 15:34:55 +02:00
benpicco
97acdd94c5
Merge pull request #13677 from gschorcht/cpu/esp/esp_wifi/modem_sleep
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cpu/esp_common: allow WiFi modem sleep mode
2020-03-31 14:15:06 +02:00
Leandro Lanzieri
f69427fcf7
cpu/saml1x: Add Kconfig file
2020-03-31 13:39:41 +02:00
Leandro Lanzieri
218f7bfe0c
cpu/saml21: Add Kconfig file
2020-03-31 13:39:41 +02:00
