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Merge pull request #13851 from iosabi/vectors_cortexm

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Allow to define reserved fields in CortexM vector table.
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benpicco 2020-04-14 23:18:29 +02:00 committed by GitHub
commit b9fda5630e
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1 changed files with 17 additions and 1 deletions
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18
cpu/cortexm_common/vectors_cortexm.c
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@ -455,7 +455,9 @@ __attribute__((weak,alias("dummy_handler_default"))) void isr_svc(void);
__attribute__((weak,alias("dummy_handler_default"))) void isr_pendsv(void);
__attribute__((weak,alias("dummy_handler_default"))) void isr_systick(void);
/* define Cortex-M base interrupt vectors */
/* define Cortex-M base interrupt vectors
* IRQ entries -9 to -6 inclusive (offsets 0x1c to 0x2c of cortexm_base_t)
* are reserved entries. */
ISR_VECTOR(0) const cortexm_base_t cortex_vector_base = {
&_estack,
{
@ -472,6 +474,20 @@ ISR_VECTOR(0) const cortexm_base_t cortex_vector_base = {
/* [-1] SysTick interrupt, not used in RIOT */
[14] = isr_systick,
/* -9 to -6 reserved entries can be defined by the cpu module */
#ifdef CORTEXM_VECTOR_RESERVED_0X1C
[6] = (isr_t)(CORTEXM_VECTOR_RESERVED_0X1C),
#endif /* CORTEXM_VECTOR_RESERVED_0X1C */
#ifdef CORTEXM_VECTOR_RESERVED_0X20
[7] = (isr_t)(CORTEXM_VECTOR_RESERVED_0X20),
#endif /* CORTEXM_VECTOR_RESERVED_0X20 */
#ifdef CORTEXM_VECTOR_RESERVED_0X24
[8] = (isr_t)(CORTEXM_VECTOR_RESERVED_0X24),
#endif /* CORTEXM_VECTOR_RESERVED_0X24 */
#ifdef CORTEXM_VECTOR_RESERVED_0X28
[9] = (isr_t)(CORTEXM_VECTOR_RESERVED_0X28),
#endif /* CORTEXM_VECTOR_RESERVED_0X28 */
/* additional vectors used by M3, M4(F), and M7 */
#if defined(CPU_ARCH_CORTEX_M3) || defined(CPU_ARCH_CORTEX_M4) || \
defined(CPU_ARCH_CORTEX_M4F) || defined(CPU_ARCH_CORTEX_M7)