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cpu/cortexm_common: add inlined header only def for irq_%

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irq_% are not inlined by the compiler which leads to it branching
to a function that actually implement a single machine instruction.

Inlining these functions makes the call more efficient as well as
saving some bytes in ROM.
This commit is contained in:
Francisco Molina 2020-04-30 09:34:56 +02:00
parent dbab3a6075
commit cb5cbe7431
No known key found for this signature in database
GPG Key ID: 3E94EAC3DBDEEDA8
3 changed files with 43 additions and 10 deletions
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19
core/include/irq.h
View File

@ -22,11 +22,18 @@
#define IRQ_H
#include <stdbool.h>
#include "cpu_conf.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifdef IRQ_API_INLINED
#define MAYBE_INLINE static inline __attribute__((always_inline))
#else
#define MAYBE_INLINE
#endif /* IRQ_API_INLINED */
/**
* @brief This function sets the IRQ disable bit in the status register
*
@ -36,7 +43,7 @@ extern "C" {
*
* @see irq_restore
*/
unsigned irq_disable(void);
MAYBE_INLINE unsigned irq_disable(void);
/**
* @brief This function clears the IRQ disable bit in the status register
@ -47,7 +54,7 @@ unsigned irq_disable(void);
*
* @see irq_restore
*/
unsigned irq_enable(void);
MAYBE_INLINE unsigned irq_enable(void);
/**
* @brief This function restores the IRQ disable bit in the status register
@ -58,13 +65,17 @@ unsigned irq_enable(void);
* @see irq_enable
* @see irq_disable
*/
void irq_restore(unsigned state);
MAYBE_INLINE void irq_restore(unsigned state);
/**
* @brief Check whether called from interrupt service routine
* @return true, if in interrupt service routine, false if not
*/
int irq_is_in(void);
MAYBE_INLINE int irq_is_in(void);
#ifdef IRQ_API_INLINED
#include "irq_arch.h"
#endif /* IRQ_API_INLINED */
#ifdef __cplusplus
}

6
cpu/cortexm_common/include/cpu_conf_common.h
View File

@ -164,6 +164,12 @@ extern "C" {
#define BACKUP_RAM_DATA __attribute__((section(".backup.data")))
#endif /* CPU_HAS_BACKUP_RAM */
/**
* @brief This arch uses the inlined irq API.
*/
#define IRQ_API_INLINED (1)
#ifdef __cplusplus
}
#endif

28
cpu/cortexm_common/irq_arch.c → cpu/cortexm_common/include/irq_arch.h
View File

@ -18,14 +18,21 @@
* @}
*/
#ifndef _IRQ_ARCH_H
#define _IRQ_ARCH_H
#include <stdint.h>
#include "irq.h"
#include "cpu.h"
#include "cpu_conf.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Disable all maskable interrupts
*/
unsigned int irq_disable(void)
static inline __attribute__((always_inline)) unsigned int irq_disable(void)
{
uint32_t mask = __get_PRIMASK();
__disable_irq();
@ -35,7 +42,8 @@ unsigned int irq_disable(void)
/**
* @brief Enable all maskable interrupts
*/
__attribute__((used)) unsigned int irq_enable(void)
static inline __attribute__((always_inline)) __attribute__((used)) unsigned int
irq_enable(void)
{
__enable_irq();
return __get_PRIMASK();
@ -44,7 +52,8 @@ __attribute__((used)) unsigned int irq_enable(void)
/**
* @brief Restore the state of the IRQ flags
*/
void irq_restore(unsigned int state)
static inline __attribute__((always_inline)) void irq_restore(
unsigned int state)
{
__set_PRIMASK(state);
}
@ -52,7 +61,14 @@ void irq_restore(unsigned int state)
/**
* @brief See if the current context is inside an ISR
*/
int irq_is_in(void)
static inline __attribute__((always_inline)) int irq_is_in(void)
{
return (__get_IPSR() & 0xFF);
}
#ifdef __cplusplus
}
#endif
#endif /* _IRQ_ARCH_H */
/** @} */