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Merge pull request #14303 from fjmolinas/pr_sam0_unified_rtt

cpu/sam0: unified rtt configuration
This commit is contained in:
benpicco 2020-06-19 11:30:06 +02:00 committed by GitHub
commit c3314e1a0c
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18 changed files with 97 additions and 104 deletions

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@ -189,24 +189,13 @@ static const i2c_conf_t i2c_config[] = {
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
/** @} */
/**
* @name RTC configuration
* @{
*/
#define RTC_DEV RTC->MODE2
/** @} */
/**
* @name RTT configuration
* @{
*/
#define RTT_DEV RTC->MODE0
#define RTT_IRQ RTC_IRQn
#define RTT_IRQ_PRIO 10
#define RTT_ISR isr_rtc
#define RTT_MAX_VALUE (0xffffffff)
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
#endif
/** @} */
/**

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@ -267,24 +267,13 @@ static const i2c_conf_t i2c_config[] = {
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
/** @} */
/**
* @name RTC configuration
* @{
*/
#define RTC_DEV RTC->MODE2
/** @} */
/**
* @name RTT configuration
* @{
*/
#define RTT_DEV RTC->MODE0
#define RTT_IRQ RTC_IRQn
#define RTT_IRQ_PRIO 10
#define RTT_ISR isr_rtc
#define RTT_MAX_VALUE (0xffffffff)
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
#endif
/** @} */
/**

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@ -145,8 +145,9 @@ static const i2c_conf_t i2c_config[] = {
* @name RTT configuration
* @{
*/
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY (32768U)
#define RTT_MAX_VALUE (0xffffffffU)
#endif
/** @} */
/**

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@ -32,13 +32,9 @@ extern "C" {
* @name RTT configuration
* @{
*/
#define RTT_DEV RTC->MODE0
#define RTT_IRQ RTC_IRQn
#define RTT_IRQ_PRIO 10
#define RTT_ISR isr_rtc
#define RTT_MAX_VALUE (0xffffffff)
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
#endif
/** @} */
#ifdef __cplusplus

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@ -248,23 +248,12 @@ static const i2c_conf_t i2c_config[] = {
/** @} */
/**
* @name RTC configuration
* @name RTT configuration
* @{
*/
#define RTC_DEV RTC->MODE2
/** @} */
/**
* @name RTT configuration
* @{
*/
#define RTT_DEV RTC->MODE0
#define RTT_IRQ RTC_IRQn
#define RTT_IRQ_PRIO 10
#define RTT_ISR isr_rtc
#define RTT_MAX_VALUE (0xffffffff)
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
#endif
/** @} */
/**

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@ -88,23 +88,12 @@ extern "C" {
/** @} */
/**
* @name RTC configuration
* @name RTT configuration
* @{
*/
#define RTC_DEV RTC->MODE2
/** @} */
/**
* @name RTT configuration
* @{
*/
#define RTT_DEV RTC->MODE0
#define RTT_IRQ RTC_IRQn
#define RTT_IRQ_PRIO 10
#define RTT_ISR isr_rtc
#define RTT_MAX_VALUE (0xffffffff)
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
#endif
/** @} */
/**

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@ -316,24 +316,13 @@ static const i2c_conf_t i2c_config[] = {
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
/** @} */
/**
* @name RTC configuration
* @{
*/
#define RTC_DEV RTC->MODE2
/** @} */
/**
* @name RTT configuration
* @{
*/
#define RTT_DEV RTC->MODE0
#define RTT_IRQ RTC_IRQn
#define RTT_IRQ_PRIO 10
#define RTT_ISR isr_rtc
#define RTT_MAX_VALUE (0xffffffff)
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
#endif
/** @} */
/**

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@ -231,8 +231,9 @@ static const i2c_conf_t i2c_config[] = {
* @name RTT configuration
* @{
*/
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY (32768U)
#define RTT_MAX_VALUE (0xffffffffU)
#endif
/** @} */
/**

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@ -162,8 +162,9 @@ static const i2c_conf_t i2c_config[] = {
* @name RTT configuration
* @{
*/
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY (32768U)
#define RTT_MAX_VALUE (0xffffffffU)
#endif
/** @} */
/**

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@ -283,24 +283,13 @@ static const i2c_conf_t i2c_config[] = {
/** @} */
/**
* @name RTC configuration
* @name RTT configuration
* @{
*/
#define RTC_DEV RTC->MODE2
/** @} */
/**
* @name RTT configuration
* @{
*/
#define RTT_DEV RTC->MODE0
#define RTT_IRQ RTC_IRQn
#define RTT_IRQ_PRIO 10
#define RTT_ISR isr_rtc
#define RTT_MAX_VALUE (0xffffffff)
#define RTT_MIN_OFFSET (10U)
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
#endif
#define RTT_MIN_OFFSET (10U)
/** @} */
/**

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@ -153,10 +153,12 @@ static const i2c_conf_t i2c_config[] = {
* @name RTT configuration
* @{
*/
#define RTT_FREQUENCY (32768U)
#define RTT_MAX_VALUE (0xffffffffU)
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY (32768U)
#endif
/** @} */
/**
* @name ADC Configuration
* @{

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@ -144,8 +144,9 @@ static const i2c_conf_t i2c_config[] = {
* @name RTT configuration
* @{
*/
#define RTT_FREQUENCY (32768U)
#define RTT_MAX_VALUE (0xffffffffU)
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY (32768U)
#endif
/** @} */
/**

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@ -212,8 +212,9 @@ static const i2c_conf_t i2c_config[] = {
* @name RTT configuration
* @{
*/
#define RTT_MAX_VALUE (0xffffffff)
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
#endif
/** @} */
/**

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@ -36,18 +36,28 @@
#define RTC_MODE0_CTRLA_COUNTSYNC (0x1ul << RTC_MODE0_CTRLA_COUNTSYNC_Pos)
#endif
#ifdef REG_RTC_MODE0_CTRLA
#define RTC_MODE0_PRESCALER \
(__builtin_ctz(2 * RTT_CLOCK_FREQUENCY / RTT_FREQUENCY) << \
RTC_MODE0_CTRLA_PRESCALER_Pos)
#else
#define RTC_MODE0_PRESCALER \
(__builtin_ctz(RTT_CLOCK_FREQUENCY / RTT_FREQUENCY) << \
RTC_MODE0_CTRL_PRESCALER_Pos)
#endif
static rtt_cb_t _overflow_cb;
static void* _overflow_arg;
static void *_overflow_arg;
static rtt_cb_t _cmp0_cb;
static void* _cmp0_arg;
static void *_cmp0_arg;
static void _wait_syncbusy(void)
{
#ifdef REG_RTC_MODE0_SYNCBUSY
while (RTC->MODE0.SYNCBUSY.reg) {}
#else
while(RTC->MODE0.STATUS.bit.SYNCBUSY) {}
while (RTC->MODE0.STATUS.bit.SYNCBUSY) {}
#endif
}
@ -66,7 +76,8 @@ static inline void _rtt_reset(void)
static void _rtt_clock_setup(void)
{
/* Setup clock GCLK2 with OSC32K */
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN(SAM0_GCLK_32KHZ) | GCLK_CLKCTRL_ID_RTC;
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN(SAM0_GCLK_32KHZ) |
GCLK_CLKCTRL_ID_RTC;
while (GCLK->STATUS.bit.SYNCBUSY) {}
}
#else
@ -88,6 +99,7 @@ static void _rtt_clock_setup(void)
#else
#error "No clock source for RTT selected. "
#endif
}
#endif /* !CPU_SAMD21 - Clock Setup */
@ -100,15 +112,17 @@ void rtt_init(void)
/* set 32bit counting mode & enable the RTC */
#ifdef REG_RTC_MODE0_CTRLA
RTC->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_MODE(0) | RTC_MODE0_CTRLA_ENABLE | RTC_MODE0_CTRLA_COUNTSYNC;
RTC->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_MODE(0) | RTC_MODE0_CTRLA_ENABLE |
RTC_MODE0_CTRLA_COUNTSYNC | RTC_MODE0_PRESCALER;
#else
RTC->MODE0.CTRL.reg = RTC_MODE0_CTRL_MODE(0) | RTC_MODE0_CTRL_ENABLE;
RTC->MODE0.CTRL.reg = RTC_MODE0_CTRL_MODE(0) | RTC_MODE0_CTRL_ENABLE |
RTC_MODE0_PRESCALER;
#endif
_wait_syncbusy();
/* initially clear flag */
RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_CMP0
| RTC_MODE0_INTFLAG_OVF;
| RTC_MODE0_INTFLAG_OVF;
NVIC_EnableIRQ(RTC_IRQn);
@ -167,7 +181,7 @@ void rtt_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg)
_wait_syncbusy();
/* enable compare interrupt and clear flag */
RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_CMP0;
RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_CMP0;
RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_CMP0;
}

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@ -127,6 +127,18 @@ typedef enum {
*/
#define DAC_NUMOF (1)
/**
* @name Real time counter configuration
* @{
*/
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
#define RTT_MAX_VALUE (0xffffffff)
#define RTT_CLOCK_FREQUENCY (32768U) /* in Hz */
#define RTT_MIN_FREQUENCY (RTT_CLOCK_FREQUENCY / 1024U) /* in Hz */
#define RTT_MAX_FREQUENCY (RTT_CLOCK_FREQUENCY) /* in Hz */
/** @} */
#ifdef __cplusplus
}
#endif

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@ -79,6 +79,16 @@ enum {
*/
#define DAC_NUMOF (2)
/**
* @name Real time counter configuration
* @{
*/
#define RTT_MAX_VALUE (0xffffffff)
#define RTT_CLOCK_FREQUENCY (32768U) /* in Hz */
#define RTT_MIN_FREQUENCY (RTT_CLOCK_FREQUENCY / 1024U) /* in Hz */
#define RTT_MAX_FREQUENCY (RTT_CLOCK_FREQUENCY) /* in Hz */
/** @} */
#ifdef __cplusplus
}
#endif

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@ -72,6 +72,16 @@ typedef enum {
*/
#define DAC_NUMOF (1)
/**
* @name Real time counter configuration
* @{
*/
#define RTT_MAX_VALUE (0xffffffff)
#define RTT_CLOCK_FREQUENCY (32768U) /* in Hz */
#define RTT_MIN_FREQUENCY (RTT_CLOCK_FREQUENCY / 1024U) /* in Hz */
#define RTT_MAX_FREQUENCY (RTT_CLOCK_FREQUENCY) /* in Hz */
/** @} */
#ifdef __cplusplus
}
#endif

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@ -73,6 +73,16 @@ typedef enum {
*/
#define DAC_NUMOF (2)
/**
* @name Real time counter configuration
* @{
*/
#define RTT_MAX_VALUE (0xffffffff)
#define RTT_CLOCK_FREQUENCY (32768U) /* in Hz */
#define RTT_MIN_FREQUENCY (RTT_CLOCK_FREQUENCY / 512U) /* in Hz */
#define RTT_MAX_FREQUENCY (RTT_CLOCK_FREQUENCY) /* in Hz */
/** @} */
#ifdef __cplusplus
}
#endif