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https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
cpu/sam0_common: drop prescaler from timer config
since c05984b341
the prescaler in the timer
config struct is no longer used.
Let's remove it.
This commit is contained in:
parent
499ffd6339
commit
54b57bd97f
@ -91,10 +91,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT16,
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},
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@ -105,10 +103,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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@ -92,10 +92,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT16,
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},
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@ -106,10 +104,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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@ -49,7 +49,6 @@ static const tc32_conf_t timer_config[] = {
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.mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
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.gclk_id = TC0_GCLK_ID,
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER(4),
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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};
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@ -40,10 +40,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT16,
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},
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@ -54,10 +52,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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@ -86,10 +86,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT16,
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},
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@ -100,10 +98,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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@ -119,10 +119,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT16,
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},
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@ -133,10 +131,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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@ -105,10 +105,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT16,
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},
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@ -119,10 +117,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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@ -43,7 +43,6 @@ static const tc32_conf_t timer_config[] = {
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.mclk_mask = MCLK_APBAMASK_TC0 | MCLK_APBAMASK_TC1,
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.gclk_id = TC0_GCLK_ID,
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.gclk_src = SAM0_GCLK_8MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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.flags = TC_CTRLA_MODE_COUNT32,
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},
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{ /* Timer 1 */
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@ -53,7 +52,6 @@ static const tc32_conf_t timer_config[] = {
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.mclk_mask = MCLK_APBBMASK_TC2 | MCLK_APBBMASK_TC3,
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.gclk_id = TC2_GCLK_ID,
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.gclk_src = SAM0_GCLK_8MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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};
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@ -52,7 +52,6 @@ static const tc32_conf_t timer_config[] = {
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.mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
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.gclk_id = TC0_GCLK_ID,
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.gclk_src = SAM0_GCLK_8MHZ,
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.prescaler = TC_CTRLA_PRESCALER(3),
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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};
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@ -105,10 +105,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT16,
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},
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@ -119,10 +117,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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@ -42,7 +42,6 @@ static const tc32_conf_t timer_config[] = {
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.mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
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.gclk_id = TC0_GCLK_ID,
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.gclk_src = SAM0_GCLK_8MHZ,
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.prescaler = TC_CTRLA_PRESCALER(3),
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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};
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@ -49,7 +49,6 @@ static const tc32_conf_t timer_config[] = {
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.mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
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.gclk_id = TC0_GCLK_ID,
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.gclk_src = SAM0_GCLK_8MHZ,
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.prescaler = TC_CTRLA_PRESCALER(3),
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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};
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@ -87,10 +87,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT16,
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},
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@ -101,10 +99,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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@ -86,10 +86,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT16,
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},
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@ -100,10 +98,8 @@ static const tc32_conf_t timer_config[] = {
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.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = SAM0_GCLK_1MHZ,
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = SAM0_GCLK_MAIN,
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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@ -339,7 +339,6 @@ typedef struct {
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uint16_t gclk_ctrl; /**< GCLK_CLKCTRL_ID for the Timer */
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#endif
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uint8_t gclk_src; /**< GCLK source which supplys Timer */
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uint16_t prescaler; /**< prescaler used by the Timer */
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uint16_t flags; /**< flags for CTRA, e.g. TC_CTRLA_MODE_COUNT32 */
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} tc32_conf_t;
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