cpu/cortexm_common: Drop LTO workaround for Cortex M thread_arch.c

The `ldr    r1, =sched_active_thread` instruction couldn't be assembled with
LTO, as the no immediate offset could be found to construct the address of
`sched_active_thread`. This commit instructs the assembler to generate a
literate pool which can be used to construct the address. While this issue
was only triggered during LTO, it theoretically could also pop up without LTO
due to unrelated changes. Thus, it is a good idea to create the literate pool
even without LTO enabled.

cpu/cortexm_common/Makefile

@@ -1,6 +1,3 @@
-# see https://github.com/RIOT-OS/RIOT/issues/5775.
-SRC_NOLTO += vectors_cortexm.c
-
 DIRS = periph
 
 include $(RIOTBASE)/Makefile.base

cpu/cortexm_common/thread_arch.c

@@ -372,6 +372,8 @@ void __attribute__((naked)) __attribute__((used)) isr_pendsv(void) {
                                            * causes end of exception*/
 #endif
     /* {r0-r3,r12,LR,PC,xPSR,s0-s15,FPSCR} are restored automatically on exception return */
+     ".ltorg                           \n" /* literal pool needed to access
+                                            * sched_active_thread */
     );
 }