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Merge pull request #12132 from ant9000/pr/saml21_usbdev_48mhz_clock

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cpu/saml21: enable 48mhz clock for usbdev
This commit is contained in:
Dylan Laduranty 2020-06-16 21:02:41 +02:00 committed by GitHub
commit 5e625adcf5
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8 changed files with 58 additions and 2 deletions
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1
boards/saml21-xpro/Makefile.features
View File

@ -10,6 +10,7 @@ FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
FEATURES_PROVIDED += periph_usbdev
# Put other features for this board (in alphabetical order)
FEATURES_PROVIDED += riotboot

15
boards/saml21-xpro/include/periph_conf.h
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@ -197,6 +197,21 @@ static const adc_conf_chan_t adc_channels[] = {
#define DAC_VREF DAC_CTRLB_REFSEL_VDDANA
/** @} */
/**
* @name USB peripheral configuration
* @{
*/
static const sam0_common_usb_config_t sam_usbdev_config[] = {
{
.dm = GPIO_PIN(PA, 24),
.dp = GPIO_PIN(PA, 25),
.d_mux = GPIO_MUX_G,
.device = &USB->DEVICE,
.gclk_src = SAM0_GCLK_48MHZ,
}
};
/** @} */
#ifdef __cplusplus
}
#endif

1
boards/samr30-xpro/Makefile.features
View File

@ -9,6 +9,7 @@ FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
FEATURES_PROVIDED += periph_usbdev
# Put other features for this board (in alphabetical order)
FEATURES_PROVIDED += riotboot

14
boards/samr30-xpro/include/periph_conf.h
View File

@ -180,6 +180,20 @@ static const adc_conf_chan_t adc_channels[] = {
#define ADC_NUMOF ARRAY_SIZE(adc_channels)
/** @} */
/**
* @name USB peripheral configuration
* @{
*/
static const sam0_common_usb_config_t sam_usbdev_config[] = {
{
.dm = GPIO_PIN(PA, 24),
.dp = GPIO_PIN(PA, 25),
.d_mux = GPIO_MUX_G,
.device = &USB->DEVICE,
.gclk_src = SAM0_GCLK_48MHZ,
}
};
#ifdef __cplusplus
}
#endif

1
boards/samr34-xpro/Makefile.features
View File

@ -10,6 +10,7 @@ FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
FEATURES_PROVIDED += periph_usbdev
# Put other features for this board (in alphabetical order)
FEATURES_PROVIDED += riotboot

15
boards/samr34-xpro/include/periph_conf.h
View File

@ -169,6 +169,21 @@ static const adc_conf_chan_t adc_channels[] = {
#define ADC_NUMOF ARRAY_SIZE(adc_channels)
/** @} */
/**
* @name USB peripheral configuration
* @{
*/
static const sam0_common_usb_config_t sam_usbdev_config[] = {
{
.dm = GPIO_PIN(PA, 24),
.dp = GPIO_PIN(PA, 25),
.d_mux = GPIO_MUX_G,
.device = &USB->DEVICE,
.gclk_src = SAM0_GCLK_48MHZ,
}
};
/** @} */
#ifdef __cplusplus
}
#endif

12
cpu/saml21/cpu.c
View File

@ -82,8 +82,14 @@ static void _xosc32k_setup(void)
void sam0_gclk_enable(uint8_t id)
{
(void) id;
/* clocks are always running */
switch(id) {
case SAM0_GCLK_48MHZ:
_gclk_setup(SAM0_GCLK_48MHZ, GCLK_GENCTRL_GENEN |
GCLK_GENCTRL_SRC_DFLL48M);
break;
default:
break;
}
}
uint32_t sam0_gclk_freq(uint8_t id)
@ -95,6 +101,8 @@ uint32_t sam0_gclk_freq(uint8_t id)
return 8000000;
case SAM0_GCLK_32KHZ:
return 32768;
case SAM0_GCLK_48MHZ:
return 48000000;
default:
return 0;
}

1
cpu/saml21/include/periph_cpu.h
View File

@ -46,6 +46,7 @@ enum {
SAM0_GCLK_MAIN = 0, /**< Main clock */
SAM0_GCLK_8MHZ = 1, /**< 8MHz clock */
SAM0_GCLK_32KHZ = 2, /**< 32 kHz clock */
SAM0_GCLK_48MHZ = 3, /**< 48MHz clock */
};
/** @} */