MrKevinWeiss
641d539092
cpu/stm: Fix clock settings F303*
2022-11-03 11:37:31 +01:00
MrKevinWeiss
17cce015d4
treewide/stm32: Make CLOCK_HS* configurable
2022-11-03 11:37:28 +01:00
benpicco
ed1d8e0a3d
Merge pull request #18785 from maribu/boards/blxxxpill/periph_conf
...
boards/common/blxxxpill: Fix pin conflicts in periph_conf
2022-10-27 21:22:10 +02:00
benpicco
578d328ff4
Merge pull request #18711 from Enoch247/cpu-stm32-dma-fixes
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cpu/stm32: fix periph_dma
2022-10-27 14:36:10 +02:00
Marian Buschsieweke
5ddc332b52
cpu/stm32/periph_pwm: support pin remap for F1
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Add support to route timer peripheral to alternative pins for the
STM32F1.
2022-10-27 14:28:06 +02:00
Marian Buschsieweke
b6845cef79
cpu/stm32/periph_qdec: support pin remap for F1
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Add support to route peripheral to alternative pins for the STM32F1
family.
2022-10-27 14:28:06 +02:00
Joshua DeWeese
c888c103c2
cpu/stm32/periph/dma: fix dma_resume
...
As implmented, dma_resume assumed that transfers widths were 1 byte and
that the memory address incrmenting was always on and periphial address
incrementing always off. This resulted in memory corruption anytime
these assumptions were not true and a dma was resumed. The DMA module
allows intitiating transfers that did not meet these assumption.
This patch adds proper handling inside dma_resume to safely resume any
transfer. Clearifications and errors are added/fixed in the module's
header file. Also, a few constants are removed from the gobal namespace.
2022-10-26 09:36:45 -04:00
Joshua DeWeese
264a7c8ef9
cpu/stm32/periph/dma: fix DMA2 on STMF3 families
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As it was, the calculation of DMA2's IRQ number was inccrorect for some
STM families. The implmentation alocates streams numbers 0 to 7 for the
first DMA controller and 8 and up for the second DMA controller. This
offset of +8 was not accounted for when IRQ's of the second DMA
controller was calculated. This patch corrects this.
2022-10-26 09:36:44 -04:00
Gunar Schorcht
9c8ec851ce
cpu/stm32: define CFG_TUSB_RHPORT{0,1}_MODE dependent on used USB ports
2022-10-21 11:43:55 +02:00
Gunar Schorcht
1dfe79fe7c
drivers/usbdev_synopsys_dwc2: use DWC2_USB_OTG_FS_TOTAL_FIFO_SIZE
...
Use `DWC2_USB_OTG_FS_TOTAL_FIFO_SIZE` instead of `USB_OTG_FS_TOTAL_FIFO_SIZE` since the latter is only defined in the vendor headers for STM32 MCUs. The STM32-specific problem that `USB_OTG_FS_TOTAL_FIFO_SIZE` is not defined in the vendor headers for all STM32 families has therefore been moved from the driver to the STM32-specific USB device header.
2022-10-17 20:03:57 +02:00
Benjamin Valentin
aa6e8cafcf
cpu/stm32: enable usbdev_fs for STM32F1
2022-10-13 12:00:22 +02:00
Gunar Schorcht
1fde5a4401
cpu/stm32/periph/usbdev_fs: support GPIO for USB connect/disconnect
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Since some STM32 MCU don't have internal D+ pullup, there are boards that use a GPIO for USB bus connect/disconnect.
2022-10-05 09:15:29 +02:00
benpicco
429ee839cc
Merge pull request #18676 from krzysztof-cabaj/nucleo-l4r5zi-ADC
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boards/nucleo-l4r5zi: support for ADC
2022-10-04 13:26:16 +02:00
Gunar Schorcht
75071319de
cpu/stm32: define HSE_VALUE for tinyUSB Synopsys DWC2 driver
2022-10-04 11:10:43 +02:00
Gunar Schorcht
9cf0119233
pkg/tinyusb: add tinyusb_hw_defaults.h for platform specific defaults
2022-10-04 07:40:18 +02:00
krzysztof-cabaj
3a23f2632e
boards/nucleo-l4r5zi: add ADC support
2022-10-03 17:13:20 -04:00
Gunar Schorcht
76848492b0
cpu/stm32: add tinyUSB package support
2022-09-30 19:05:51 +02:00
Gunar Schorcht
78fc60c700
cpu/stm32: use usbdev_synopsys_dwc2 driver as periph_usbdev
2022-09-27 01:00:57 +02:00
Marian Buschsieweke
8bab36f1c5
cpu/stm32: Implement periph/gpio_ll{,_irq} except for STM32F1
...
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
2022-04-22 14:34:57 +02:00
Fabian Hüßler
e261db28c9
cpu/stm32/include/periph/f7: add missing ADC_DEVS
2022-04-12 22:39:17 +02:00
Benjamin Valentin
0340ac6129
cpu: include IDLE in PM_NUM_MODES
2022-04-06 12:29:25 +02:00
cb5fef4486
cpu/stm32: use HSI with I2C
2022-03-23 10:10:08 +01:00
Jean-Pierre De Jesus DIAZ
d64bbdffe5
cpu/stm32: Fix CLOCK_CORECLOCK on stm32l0/l1
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With the previous order of the operation there was a loss of precision
when using certain values as the divider
2022-03-01 17:11:16 +01:00
Fabian Hüßler
33c2944076
cpu/stm32: add VBAT for stm32
2022-02-21 10:49:43 +01:00
MrKevinWeiss
58097a20aa
cpu/stm32: clk tree account for 16 MHz
2022-02-10 13:27:50 +01:00
Fabian Hüßler
70d3d647d1
cpu/{cortexm_common, stm32}: add support for backup RAM
2022-01-21 15:53:18 +01:00
deccc720e3
cpu/stm32: add support for LTDC periph
2022-01-07 14:32:24 +01:00
796e127df9
boards/stm32: replace GPIO_UNDEF with SPI_CS_UNDEF
2022-01-06 12:34:09 +01:00
4d75c6ddde
cpu/stm32: group periph definitions by periph type
2022-01-02 20:07:51 +01:00
Benjamin Valentin
8607a9cdfa
cpu/stm32: extend RAM with SRAM4
2022-01-02 15:43:37 +01:00
2f0efa8c9e
cpu/stm32: add initial support for stm32u5 family
2021-12-23 11:04:41 +01:00
Marian Buschsieweke
e071098d26
cpu/stm32/periph: use uintptr_t instead uintptr_t *
2021-12-03 14:21:54 +01:00
Marian Buschsieweke
7cd9d615fa
cpu/stm32/periph: Use uintptr_t for periph addr
...
The peripheral register addresses are fixed, properly aligned addresses. Storing
them as uintptr_t makes live easier when casting them to helper structs, as no
intermediate cast to uintptr_t is needed to silence -Wcast-align.
2021-12-03 10:12:32 +01:00
dylad
083e53406d
cpu/stm32: add support for a new USBDEV periph
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Also rename the other usbdev driver to avoid conflicts
2021-12-02 14:26:03 +01:00
06530c4297
cpu/stm32: clone cmsis header in build/stm32
2021-11-19 13:24:57 +01:00
c81df904ea
stm32/usbdev: Adapt to xmit API
2021-11-16 20:17:04 +01:00
76215adef1
Merge pull request #17154 from maribu/cpu/stm32/periph_usb
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cpu/stm32/periph/usbdev: fix alignment issues
2021-11-16 11:20:34 +01:00
Francisco
72abac66f1
Merge pull request #17183 from fjmolinas/pr_stm32wl_adc
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cpu/stm32/wl: initial periph_adc implementation
2021-11-15 19:06:24 +01:00
benpicco
70ae34a448
Merge pull request #16979 from ospoco/master
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cpu/stm32: Add hardening changes to stm32
2021-11-15 15:09:01 +01:00
Francisco Molina
63c51d4add
cpu/stm32/wl: initial periph_adc implementation
2021-11-15 09:52:45 +01:00
VanL
ee832148b3
cpu/stm32: Add hardening changes to stm32
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Initialize STM32 RDP in a glitch-resistant fashion to prevent
debugger use when restrictions are set by the designer.
2021-11-11 15:58:52 -06:00
Francisco Molina
ec0e3d242e
cpu/stm32/include/cpu_conf_stm32_common.h: fix typo in macro
2021-11-11 19:58:34 +01:00
Marian Buschsieweke
825a598ca7
cpu/stm32/periph/usbdev: fix alignment issues
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Make sure in `_usbdev_new_ep()` that `usbdev_ep_t::buf` is always aligned to 4
bytes. With this in mind, add intermediate casts to `uintptr_t` before casting
`usbdev_ep_t::buf` to `uint32_t *` to silence `-Wcast-align`, as we now manually
enforced correct alignment.
2021-11-06 20:19:39 +01:00
benpicco
ffd1254eac
Merge pull request #16959 from bissell-homecare-inc/stm32g031-disco
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boards/stm32g031-disco,examples,tests: Added STM32G031-DISCO board
2021-10-13 23:17:06 +02:00
Dave VanKampen
55ea8cfb97
boards/stm32g031-disco,examples,tests: Added STM32G031-DISCO board
2021-10-13 12:14:45 -04:00
luisan00
af4c01bbc6
cpu/stm32: add stm32f469i to ADCs defs
2021-10-11 23:35:48 +02:00
luisan00
6459d4c344
cpu/stm32: fix duplicated defs
2021-10-10 00:04:51 +02:00
Jean-Pierre De Jesus DIAZ
9d1cff3b55
cpu/stm32: fix doxygen grouping warnings
...
Signed-off-by: Jean-Pierre De Jesus DIAZ <me@jeandudey.tech>
2021-09-05 20:39:15 +02:00
benpicco
0b69747389
Merge pull request #16023 from maribu/max_pdu_size
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sys/net/netopt: Drop deprecated NETOPT_MAX_PACKET_SIZE
2021-08-26 14:40:18 +02:00
Benjamin Valentin
39b81c332e
cpu/stm32: remove ErrorStatus enum from vendor files
2021-08-25 18:42:40 +02:00
Jan Romann
4384795cb9
treewide: Remove excessive newlines
2021-08-13 19:50:38 +02:00
Francisco Molina
8a8e023d04
cpu/stm32/wl: common subghz debug pin initialization
2021-07-21 11:28:15 +02:00
Akshai M
f58a021f6d
cpu/stm32wl : Add HW Debug pins
2021-07-09 11:16:41 +02:00
Akshai M
f68dab9ccb
cpu/stm32: add GPIO_AF_UNDEF
2021-07-09 11:16:41 +02:00
Benjamin Valentin
49585fc517
cpu/stm32: flashpage: use common helper functions
2021-04-27 16:52:37 +02:00
Akshai M
2cf081b509
cpu/stm32wl: Flashpage configuration
2021-04-20 21:04:36 +02:00
Akshai M
fd8ddd6161
boards: add nucleo-wl55jc
...
Co-authored-by: Kevin "Tristate Tom" Weiss <weiss.kevin604@gmail.com>
2021-04-20 21:04:29 +02:00
Akshai M
c485c774cf
cpu/stm32: add stm32wl
2021-04-20 20:57:48 +02:00
Benjamin Valentin
dde3ca5f46
cpu/stm32: candev: derive number of CAN interfaces from vendor header
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We can deduce the number of available CAN interfaces from the vendor headers
so no need to hard-code this number for individual part numbers.
2021-03-09 11:30:21 +01:00
madokapeng
a38cd1477e
boards/nucleo-f722ze: Add periph_can support
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cpu/stm32: Add CAN support for f722ze board
f722ze board has ONLY 1 CAN interface, fix compiling error which
treats f722xx has more than 1 CAN.
2021-03-05 23:22:44 -05:00
Francisco
c91499997e
Merge pull request #16030 from benpicco/drivers/mtd_flashpage-fix_native
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drivers/mtd_flashpage: fixes for native (and stm32l0, stm32l4)
2021-02-23 15:12:06 +01:00
benpicco
d014f5e6d0
Merge pull request #14911 from OTAkeys/pr/can_stm32_deepsleep_opt
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stm32/can: add option to enable deep-sleep per device
2021-02-22 22:52:46 +01:00
Benjamin Valentin
2bdc5cf6d7
cpu/stm32: fix FLASHPAGE_ERASE_STATE for stm32l4
2021-02-18 14:22:11 +01:00
Francisco Molina
85caf7cbc7
drivers/flashpage: add FLASHPAGE_ERASE_STATE definition
2021-02-09 11:11:46 +01:00
Francisco
3b2a55a923
Merge pull request #15865 from benpicco/pm_layered-default
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cpu: make pm_layered a DEFAULT_MODULE
2021-02-03 08:17:29 +01:00
Vincent Dupont
2edf37ed5b
cpu/stm32/can: use en_deep_sleep_wake_up by default
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Add en_deep_sleep_wake_up = true in default candev_conf in can_params.h
2021-02-02 15:39:27 +01:00
Vincent Dupont
eb0f6582c7
stm32/can: add option to enable deep-sleep per device
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Deep-sleep was based on using rx pin as external interrupt to be able to
wake up from stop mode. If rx pin cannot be used as interrupt or user
does not need to wake up from stop from the CAN, an option is now
present. If en_deep_sleep_wake_up is set to false, setting the device to
sleep simply unblock stop mode. Otherwise the behavior is unchanged.
2021-02-02 15:32:25 +01:00
b6e80bf487
stm32f4: Initial flashpage support
2021-02-01 18:23:05 +01:00
Benjamin Valentin
f12a82e4f9
cpu/stm32: use common pm_off() function
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The code is identical to the one found in sys/pm_layered/pm.c
2021-01-27 14:07:22 +01:00
87cd41a6d1
Merge pull request #15657 from aabadie/pr/cpu/stm32_merge_clock_headers
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cpu/stm32: merge clock source selection headers
2021-01-25 13:57:05 +01:00
5fef40ab5a
cpu/stm32/clk: cleanup common clock configuration
2021-01-25 11:46:35 +01:00
dfed1b0567
cpu/stm32: merge g0 and g4 clock configuration headers
2021-01-25 11:46:34 +01:00
0aadf367cc
cpu/stm32: rework common clock source selection header
2021-01-25 11:46:34 +01:00
AravindKarri
63252d17c0
cpu/stm32/adc_f4: add support for stm32f7
2021-01-24 22:30:49 +01:00
048e8446ef
cpu/stm32f0: remove old clock configuration header
2020-12-17 08:38:40 +01:00
45c2b19f25
cpu/stm32: merge f0f1f3 clock configuration headers
2020-12-17 08:38:40 +01:00
c68f63b318
cpu/stm32f1f3: handle custom pll prediv/mul at cpu level
2020-12-08 17:36:52 +01:00
benpicco
a80631a297
Merge pull request #15074 from maribu/ptp-clock
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drivers/periph/ptp_clock
2020-12-03 09:59:07 +01:00
Marian Buschsieweke
ea3752db77
cpu/stm32: Added PTP clock implementation
2020-12-02 17:53:00 +01:00
b0b19203a7
Merge pull request #15190 from benpicco/boards/wefun-f401cc
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boards/common/weact-f4x1cx: create common WeAct boards
2020-12-01 12:03:38 +01:00
Benjamin Valentin
0ed34cdb4d
cpu/stm32: periph_eth: drop addr from eth_conf_t
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MAC address is now supplied by EUI provider, no need to hard-code
it for the board.
2020-11-29 23:11:14 +01:00
3f0ea86963
cpu/stm32/include/periph_cpu.h: add missing limits.h include
2020-11-23 16:56:34 +01:00
aebf6f06d8
stm32/flashpage: Add common stm32_flashpage_block_t type
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This commits adds a common type for the block writes to the flash of the
stm32. Depending on the family, the type has a different size. This
allows the removal of a number of ifdefs to track the differences
between families, simplifying the flashpage code
2020-11-18 12:04:57 +01:00
Leandro Lanzieri
5a04f94b63
Merge pull request #14967 from aabadie/pr/boards/stm32f0_clock_kconfig_only
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boards/stm32f0: add Kconfig for clock configuration
2020-11-17 12:14:10 +01:00
Gilles DOFFE
e4fa203db4
cpu/stm32: STM32MP1 family has no flash
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Then CPU_FLASH_BASE cannot be defined as FLASH_BASE does not exist.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
2ac0467807
cpu/stm32: configure timer2 for stm32mp1 boards
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This timer will be used by RIOT-OS as the scheduling timer for
stm32mp157c-dk2 board.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
504fba61b8
cpu/stm32: add uart support for stm32mp1
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stm32mp1 family uart driver is the same than for other stm32 families.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
be2c0ae179
cpu/stm32: define CPU_IRQ_NUMOF for stm32mp157cac
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This MCU has 150 interrupt vectors.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
d6400c77de
cpu/stm32: include stm32mp1 vendor headers
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Include stm32mp1 vendors header. CORE_CM4 must be defined to include
Cortex-M4 core headers.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
169097ac21
cpu/stm32: add stm32mp157x vendor headers
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Add vendor CMSIS headers from STMicroelectronics:
https://wiki.st.com/stm32mpu/wiki/STM32CubeMP1_architecture#CMSIS
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
4f0fd9cf95
cpu/stm32: add GPIO_PIN macro for stm32mp1 family
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As stm32mp1 family accesses gpio pins with a different
offset than other stm32, create a specific macro.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
7a2550da9b
cpu/stm32: add stm32mp1 peripheral busses
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Add stm32mp1 peripheral busses AHB1, AHB2, AHB3 and AHB4 with
enable/disable functions.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
67f37950a0
cpu/stm32: default i2c configuration
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* Setup i2c speed to I2C_SPEED_LOW by default
* enable i2c_write_regs() function.
* i2c frequency needs to be specified into board periph_conf.h
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
f39aa979af
cpu/stm32: setup CLOCK_LSI for stm32mp1
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Set stm32mp1 family LSI clock frequency to 32KHz as specified in datasheet.
STM32MP157C example:
https://www.st.com/resource/en/datasheet/stm32mp157c.pdf
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
1c063a74ea
stm32: Adapt to flashpage/flashpage_pagewise API
2020-11-11 23:16:42 +01:00
9d13c07e92
cpu/stm32f0: handle custom pll prediv/mul at cpu level
2020-11-10 15:55:38 +01:00
2f2622c76f
cpu/stm32: move stm32l5 default PLL N to cpu
2020-11-10 09:34:07 +01:00
36d33d38f7
cpu/stm32: move stm32l4+ default PLL N to cpu
2020-11-10 09:34:07 +01:00
934028c114
cpu/stm32: fix l4l5wb clock configuration
...
Default values were wrong for WB when using HSE 32MHz as PLL input source
Default PLL input source was wrong when not using HSE and the board
provides an HSE
2020-11-10 09:34:07 +01:00
Benjamin Valentin
a90016740c
cpu/stm32/clk/f2f4f7: add config for 25 MHz HSE
2020-11-05 15:46:11 +01:00