Jan Romann
4384795cb9
treewide: Remove excessive newlines
2021-08-13 19:50:38 +02:00
Francisco Molina
8a8e023d04
cpu/stm32/wl: common subghz debug pin initialization
2021-07-21 11:28:15 +02:00
Akshai M
f58a021f6d
cpu/stm32wl : Add HW Debug pins
2021-07-09 11:16:41 +02:00
Akshai M
f68dab9ccb
cpu/stm32: add GPIO_AF_UNDEF
2021-07-09 11:16:41 +02:00
Benjamin Valentin
49585fc517
cpu/stm32: flashpage: use common helper functions
2021-04-27 16:52:37 +02:00
Akshai M
2cf081b509
cpu/stm32wl: Flashpage configuration
2021-04-20 21:04:36 +02:00
Akshai M
fd8ddd6161
boards: add nucleo-wl55jc
...
Co-authored-by: Kevin "Tristate Tom" Weiss <weiss.kevin604@gmail.com>
2021-04-20 21:04:29 +02:00
Akshai M
c485c774cf
cpu/stm32: add stm32wl
2021-04-20 20:57:48 +02:00
Benjamin Valentin
dde3ca5f46
cpu/stm32: candev: derive number of CAN interfaces from vendor header
...
We can deduce the number of available CAN interfaces from the vendor headers
so no need to hard-code this number for individual part numbers.
2021-03-09 11:30:21 +01:00
madokapeng
a38cd1477e
boards/nucleo-f722ze: Add periph_can support
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cpu/stm32: Add CAN support for f722ze board
f722ze board has ONLY 1 CAN interface, fix compiling error which
treats f722xx has more than 1 CAN.
2021-03-05 23:22:44 -05:00
Francisco
c91499997e
Merge pull request #16030 from benpicco/drivers/mtd_flashpage-fix_native
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drivers/mtd_flashpage: fixes for native (and stm32l0, stm32l4)
2021-02-23 15:12:06 +01:00
benpicco
d014f5e6d0
Merge pull request #14911 from OTAkeys/pr/can_stm32_deepsleep_opt
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stm32/can: add option to enable deep-sleep per device
2021-02-22 22:52:46 +01:00
Benjamin Valentin
2bdc5cf6d7
cpu/stm32: fix FLASHPAGE_ERASE_STATE for stm32l4
2021-02-18 14:22:11 +01:00
Francisco Molina
85caf7cbc7
drivers/flashpage: add FLASHPAGE_ERASE_STATE definition
2021-02-09 11:11:46 +01:00
Francisco
3b2a55a923
Merge pull request #15865 from benpicco/pm_layered-default
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cpu: make pm_layered a DEFAULT_MODULE
2021-02-03 08:17:29 +01:00
Vincent Dupont
2edf37ed5b
cpu/stm32/can: use en_deep_sleep_wake_up by default
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Add en_deep_sleep_wake_up = true in default candev_conf in can_params.h
2021-02-02 15:39:27 +01:00
Vincent Dupont
eb0f6582c7
stm32/can: add option to enable deep-sleep per device
...
Deep-sleep was based on using rx pin as external interrupt to be able to
wake up from stop mode. If rx pin cannot be used as interrupt or user
does not need to wake up from stop from the CAN, an option is now
present. If en_deep_sleep_wake_up is set to false, setting the device to
sleep simply unblock stop mode. Otherwise the behavior is unchanged.
2021-02-02 15:32:25 +01:00
b6e80bf487
stm32f4: Initial flashpage support
2021-02-01 18:23:05 +01:00
Benjamin Valentin
f12a82e4f9
cpu/stm32: use common pm_off() function
...
The code is identical to the one found in sys/pm_layered/pm.c
2021-01-27 14:07:22 +01:00
87cd41a6d1
Merge pull request #15657 from aabadie/pr/cpu/stm32_merge_clock_headers
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cpu/stm32: merge clock source selection headers
2021-01-25 13:57:05 +01:00
5fef40ab5a
cpu/stm32/clk: cleanup common clock configuration
2021-01-25 11:46:35 +01:00
dfed1b0567
cpu/stm32: merge g0 and g4 clock configuration headers
2021-01-25 11:46:34 +01:00
0aadf367cc
cpu/stm32: rework common clock source selection header
2021-01-25 11:46:34 +01:00
AravindKarri
63252d17c0
cpu/stm32/adc_f4: add support for stm32f7
2021-01-24 22:30:49 +01:00
048e8446ef
cpu/stm32f0: remove old clock configuration header
2020-12-17 08:38:40 +01:00
45c2b19f25
cpu/stm32: merge f0f1f3 clock configuration headers
2020-12-17 08:38:40 +01:00
c68f63b318
cpu/stm32f1f3: handle custom pll prediv/mul at cpu level
2020-12-08 17:36:52 +01:00
benpicco
a80631a297
Merge pull request #15074 from maribu/ptp-clock
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drivers/periph/ptp_clock
2020-12-03 09:59:07 +01:00
Marian Buschsieweke
ea3752db77
cpu/stm32: Added PTP clock implementation
2020-12-02 17:53:00 +01:00
b0b19203a7
Merge pull request #15190 from benpicco/boards/wefun-f401cc
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boards/common/weact-f4x1cx: create common WeAct boards
2020-12-01 12:03:38 +01:00
Benjamin Valentin
0ed34cdb4d
cpu/stm32: periph_eth: drop addr from eth_conf_t
...
MAC address is now supplied by EUI provider, no need to hard-code
it for the board.
2020-11-29 23:11:14 +01:00
3f0ea86963
cpu/stm32/include/periph_cpu.h: add missing limits.h include
2020-11-23 16:56:34 +01:00
aebf6f06d8
stm32/flashpage: Add common stm32_flashpage_block_t type
...
This commits adds a common type for the block writes to the flash of the
stm32. Depending on the family, the type has a different size. This
allows the removal of a number of ifdefs to track the differences
between families, simplifying the flashpage code
2020-11-18 12:04:57 +01:00
Leandro Lanzieri
5a04f94b63
Merge pull request #14967 from aabadie/pr/boards/stm32f0_clock_kconfig_only
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boards/stm32f0: add Kconfig for clock configuration
2020-11-17 12:14:10 +01:00
Gilles DOFFE
e4fa203db4
cpu/stm32: STM32MP1 family has no flash
...
Then CPU_FLASH_BASE cannot be defined as FLASH_BASE does not exist.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
2ac0467807
cpu/stm32: configure timer2 for stm32mp1 boards
...
This timer will be used by RIOT-OS as the scheduling timer for
stm32mp157c-dk2 board.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
504fba61b8
cpu/stm32: add uart support for stm32mp1
...
stm32mp1 family uart driver is the same than for other stm32 families.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
be2c0ae179
cpu/stm32: define CPU_IRQ_NUMOF for stm32mp157cac
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This MCU has 150 interrupt vectors.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
d6400c77de
cpu/stm32: include stm32mp1 vendor headers
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Include stm32mp1 vendors header. CORE_CM4 must be defined to include
Cortex-M4 core headers.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
169097ac21
cpu/stm32: add stm32mp157x vendor headers
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Add vendor CMSIS headers from STMicroelectronics:
https://wiki.st.com/stm32mpu/wiki/STM32CubeMP1_architecture#CMSIS
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
4f0fd9cf95
cpu/stm32: add GPIO_PIN macro for stm32mp1 family
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As stm32mp1 family accesses gpio pins with a different
offset than other stm32, create a specific macro.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
7a2550da9b
cpu/stm32: add stm32mp1 peripheral busses
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Add stm32mp1 peripheral busses AHB1, AHB2, AHB3 and AHB4 with
enable/disable functions.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
67f37950a0
cpu/stm32: default i2c configuration
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* Setup i2c speed to I2C_SPEED_LOW by default
* enable i2c_write_regs() function.
* i2c frequency needs to be specified into board periph_conf.h
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
f39aa979af
cpu/stm32: setup CLOCK_LSI for stm32mp1
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Set stm32mp1 family LSI clock frequency to 32KHz as specified in datasheet.
STM32MP157C example:
https://www.st.com/resource/en/datasheet/stm32mp157c.pdf
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
1c063a74ea
stm32: Adapt to flashpage/flashpage_pagewise API
2020-11-11 23:16:42 +01:00
9d13c07e92
cpu/stm32f0: handle custom pll prediv/mul at cpu level
2020-11-10 15:55:38 +01:00
2f2622c76f
cpu/stm32: move stm32l5 default PLL N to cpu
2020-11-10 09:34:07 +01:00
36d33d38f7
cpu/stm32: move stm32l4+ default PLL N to cpu
2020-11-10 09:34:07 +01:00
934028c114
cpu/stm32: fix l4l5wb clock configuration
...
Default values were wrong for WB when using HSE 32MHz as PLL input source
Default PLL input source was wrong when not using HSE and the board
provides an HSE
2020-11-10 09:34:07 +01:00
Benjamin Valentin
a90016740c
cpu/stm32/clk/f2f4f7: add config for 25 MHz HSE
2020-11-05 15:46:11 +01:00
ec5b47fc61
cpu/stm32l4+/wb: centralize max core clock define, adapt related boards
2020-10-27 08:44:55 +01:00
05f67a0a00
cpu/stm32: remove useless include in clock configuration
2020-10-26 11:21:07 +01:00
d6d85a3370
cpu/stm32: add common clock configuration header
2020-10-26 11:21:07 +01:00
f2e2c89424
cpu/stm32: move clock configuration headers to cpu
2020-10-26 11:16:23 +01:00
7f26d5c389
cpu/stm32l5: adapt flashpage periph
2020-10-23 18:21:50 +02:00
a416b2793f
cpu/stm32: add basic support for stm32l5
2020-10-23 18:21:50 +02:00
02c4b05a5a
cpu/stm32: configure stm32l5 cmsis repository version
2020-10-23 18:13:07 +02:00
2e2b87dda5
cpu/stm32: define EEPROM size for stm32l011k4
2020-10-15 16:24:33 +02:00
Marian Buschsieweke
6294382627
cpu/stm32: Use mii.h for periph_eth
...
Use shared MII definitions and utilities instead own definitions.
2020-10-12 08:46:20 +02:00
Marian Buschsieweke
7920d32e32
cpu/stm32: Clean up periph_eth
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Use `addr` instead of `mac` when referring to L2 address.
2020-10-05 16:03:47 +02:00
ec2e1a15f9
cpu/stm32: move cmsis package Makefile to stm32 cpu
2020-09-02 11:30:49 +02:00
91c9b8c1b0
cpu/stm32: remove hardcoded CPU_IRQ_NUMOF defines
2020-09-02 11:30:49 +02:00
39d95b1950
cpu/stm32: add tool to generate a header with IRQ numof defines
2020-09-02 11:30:49 +02:00
hugues
6959a905a2
cpu/stm32/include/periph/f3/periph_cpu.h: add ADC support
2020-08-27 15:43:43 +02:00
5fab8f7a9a
stm32: Add define for when DMA channel selection is not supported
...
This adds a placeholder define for when the DMA peripheral available on
the MCU doesn't support channel/trigger filtering. This is the case on
the stm32f1 and stm32f3 family.
2020-08-19 16:09:55 +02:00
b9d62e47d3
stm32: Add support for arbitrary SPI clock rates
2020-08-18 16:55:01 +02:00
benpicco
22d3bf7c51
Merge pull request #14594 from maribu/stm32-eth-cleanup
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cpu/stm32: Clean up / fix periph_eth
2020-08-17 21:16:27 +02:00
Marian Buschsieweke
4fcf37c162
cpu/stm32/periph_eth: Handle lost & spurious IRQs
...
Fixes https://github.com/RIOT-OS/RIOT/issues/13496
2020-08-17 20:30:16 +02:00
Marian Buschsieweke
8d8af31e39
driver/stm32_eth: Integrate into periph_eth
...
The stm32_eth driver was build on top of the internal API periph_eth, which
was unused anywhere. (Additionally, with two obscure exceptions, no functions
where declared in headers, making them pretty hard to use anyway.)
The separation of the driver into two layers incurs overhead, but does not
result in cleaner structure or reuse of code. Thus, this artificial separation
was dropped.
2020-08-17 20:29:33 +02:00
Marian Buschsieweke
932c311ee2
cpu/stm32/periph_eth: Fix RX logic
...
If any incoming frame is bigger than a single DMA buffer, the Ethernet DMA will
split the content and use multiple DMA buffers instead. But only the DMA
descriptor of the last Ethernet frame segment will contain the frame length.
Previously, the frame length calculation, reassembly of the frame, and the
freeing of DMA descriptors was completely broken and only worked in case the
received frame was small enough to fit into one DMA buffer. This is now fixed,
so that smaller DMA buffers can safely be used now.
Additionally the interface was simplified: Previously two receive flavors were
implemented, with only one ever being used. None of those function was
public due to missing declarations in headers. The unused interface was
dropped and the remaining was streamlined to better fit the use case.
2020-08-17 20:28:49 +02:00
Marian Buschsieweke
234a720571
Merge pull request #14516 from benpicco/bitband_hw
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cortexm_common: fix check for bitbanding feature
2020-08-08 14:26:49 +02:00
millotp
69858916c7
boards: enable CAN bus on nucleo-f446re & nucleo-f446ze
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Changed the pinout for the CAN bus:
CAN RX: PB8
CAN TX: PB9
And added periph_can to FEATURES_PROVIDED and to Kconfig files
2020-07-27 14:36:29 +02:00
Marian Buschsieweke
a5dbec33d9
cpu/stm32/periph_eth: Cleanup & fix DMA descriptor
...
- Add missing `volatile` to DMA descriptor, as memory is also accessed by the
DMA without knowledge of the compiler
- Dropped `__attribute__((packed))` from DMA descriptor
- The DMA descriptor fields need to be aligned on word boundries to
properly function
- The compiler can now more efficiently access the fields (safes ~300 B ROM)
- Moved the DMA descriptor struct and the flags to `periph_cpu.h`
- This allows Doxygen documentation being build for it
- Those types and fields are needed for a future PTP implementation
- Renamed DMA descriptor flags
- They now reflect to which field in the DMA descriptor they refer to, so
that confusion is avoided
- Added documentation to the DMA descriptor and the corresponding flags
2020-07-26 22:12:03 +02:00
Gunar Schorcht
044d08d599
cpu/stm32: GPIO ports definition fix
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The available GPIO ports may also differ within a family. Therefore, the vendor definitions GPIO* are used instad of CPU_FAM_STM definitions to determine which ports are available for a certain MCU.
2020-07-22 09:13:52 +02:00
dada52ecd2
cpu/stm32: add stm32g0 support
2020-07-21 12:45:25 +02:00
8e87dedbce
cpu/stm32: remove not needed CMSIS vendor headers
2020-07-16 17:35:49 +02:00
f21440b176
cpu/stm32: use CMSIS headers from the stm32cmsis package
2020-07-16 17:35:48 +02:00
Benjamin Valentin
8f36c88b93
cpu/stm32: set CPU_HAS_BITBAND
2020-07-16 14:44:28 +02:00
055c43c878
cpu/stm32: enable flashpage feature for stm32f031k6
2020-07-16 11:15:30 +02:00
Bas Stottelaar
21f9afdb5b
Merge pull request #14318 from benpicco/cpu/stm32-TIMER_CHANNELS
...
cpu/stm32: use TIMER_CHANNEL_NUMOF for consistency
2020-06-24 15:32:22 +02:00
Benjamin Valentin
06cdd30fcb
cpu/stm32: use TIMER_CHANNEL_NUMOF for consistency
2020-06-24 12:58:38 +02:00
f546c6238b
cpu/stm32: add support for stm32g4
2020-06-19 14:18:17 +02:00
Francisco Molina
0b8adb2d27
cpu/sam0-stm32/uart: rename tx buf size to UART_TXBUF_SIZE
2020-06-17 10:01:20 +02:00
Francisco Molina
3107993434
cpu/stm32: add non blocking uart
...
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2020-06-11 09:51:41 +02:00
Benjamin Valentin
0819f0eb39
cpu/stm32: implement reset to bootloader
...
The STM32 line of microcontrollers comes with a bootloader in the ROM.
It provides the option to flash the device firmware in DFU mode (USB)
or via UART or SPI.
To enter the bootloader we have to jump to a specific address in memory,
but before reset the CPU to make sure the system is in a known state.
This enables us to use the usb_board_reset module on all STM32 platforms.
2020-06-05 18:41:06 +02:00
c28477a4f0
Merge pull request #14096 from bergzand/pr/stm32_common/dma/optimize_hot_path
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STM32_common/dma: Optimize the latency in the hot path
2020-06-02 16:01:27 +02:00
9ab7e7ef33
stm32/dma: add setup and prepare functions
...
This commit adds two new functions to the DMA peripheral code for the
stm32. The setup function allows for a one-time setup of peripheral
config. The prepare function does the per-transfer setup. This allows
for a single setup call during the peripheral lock step and a
per-transfer call to the prepare function.
2020-06-02 11:52:11 +02:00
bdeec688f5
Merge pull request #14174 from benpicco/cpu/stm32_usb_includes
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cpu/stm32: don't include usbdev_stm32.h in periph_cpu_common.h
2020-06-02 11:42:19 +02:00
benpicco
7286c32b5d
Merge pull request #14144 from aabadie/pr/cpu/stm32_cleanup_tim_ccr
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cpu/stm32: cleanup timer structure in vendor headers
2020-06-01 16:18:57 +02:00
Gabriel Moyano
52ddeeedb0
cpu/stm32: add qdec support for CPU_FAM_STM32F1
2020-05-29 21:11:54 +02:00
e35914612e
cpu/stm32: restore timer structure in vendor headers
2020-05-29 18:22:00 +02:00
2dc0ec00a1
cpu/stm32: adapt timer driver to common CMSIS timer structure
2020-05-29 18:22:00 +02:00
Benjamin Valentin
e957f339d3
cpu/stm32: don't include usbdev_stm32.h in periph_cpu_common.h
...
`usbdev_stm32.h` will pull in `usb.h` which causes an error if
`USB_H_USER_IS_RIOT_INTERNAL` is not set.
Turns out this include is not needed, so just drop it.
2020-05-29 17:42:19 +02:00
8593176e29
Merge pull request #14140 from aabadie/pr/cpu/stm32_uid_base
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cpu/stm32: get the cpuid address from the UID_BASE constant defined in CMSIS
2020-05-27 08:39:35 +02:00
af8c4a32f6
Merge pull request #14147 from aabadie/pr/cpu/stm32f1_gpio_cleanup
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cpu/stm32f1: restore default gpio struct in CMSIS + adapt driver
2020-05-27 08:39:17 +02:00
09c1afe9c5
cpu/stm32l4/wb: restore exti structure in vendor headers
2020-05-26 17:24:59 +02:00
1a8f4d4f25
cpu/stm32f1: restore gpio struct to default in CMSIS header
2020-05-26 16:26:20 +02:00
61d3afcb63
cpu/stm32: remove hardcoded cpuid addr for f1
2020-05-26 15:44:50 +02:00
d78c955e50
cpu/stm32: remove hardcoded cpuid addr for f0
2020-05-26 15:44:50 +02:00
98a30ddadf
cpu/stm32: remove not needed periph_cpu.h for f3
2020-05-26 15:44:50 +02:00
4e33cebb3d
cpu/stm32: remove not needed periph_cpu.h for f7
2020-05-26 15:44:50 +02:00
bf01940ec7
cpu/stm32: use UID_BASE when possible
2020-05-26 15:44:50 +02:00
2313b85a8d
cpu/stm32: use UID_BASE from CMSIS when not defined
2020-05-26 15:44:50 +02:00
8959274165
cpu/stm32: update vendor headers for f1
2020-05-26 11:43:45 +02:00
1e4da87aad
cpu/stm32: update vendor headers for f0
2020-05-26 11:43:44 +02:00
4f96cdbfcd
cpu/stm32: update stm32f334 vendor header
2020-05-26 11:43:44 +02:00
8a5ea2638b
cpu/stm32: update stm32f2 vendor headers
2020-05-26 11:43:44 +02:00
4f30f27e9d
cpu/stm32: update stm32f72x vendor headers
2020-05-26 11:43:37 +02:00
46c4803eba
cpu/stm32: remove useless ifdef around DMA definitions
2020-05-25 13:23:20 +02:00
b6d2231d6d
cpu/stm32: adapt Doxygen documentation
2020-05-20 13:39:11 +02:00
5c810d8535
cpu/stm32: introduce unique directory for stm32 cpus
2020-05-20 13:39:10 +02:00
