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cpu/stm32/clk/f2f4f7: add config for 25 MHz HSE

This commit is contained in:
Benjamin Valentin 2020-10-29 17:30:22 +01:00 committed by Benjamin Valentin
parent d62111ce76
commit a90016740c

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@ -33,14 +33,20 @@ extern "C" {
* @name Clock PLL settings (84MHz)
* @{
*/
/* The following parameters configure a 84MHz system clock with HSE (8MHz or
16MHz) or HSI (16MHz) as PLL input clock */
/* The following parameters configure a 84MHz system clock with HSE (8MHz, 16MHz
or 25MHz) or HSI (16MHz) as PLL input clock */
#ifndef CONFIG_CLOCK_PLL_M
#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(25))
#define CONFIG_CLOCK_PLL_M (25)
#else
#define CONFIG_CLOCK_PLL_M (4)
#endif
#endif
#ifndef CONFIG_CLOCK_PLL_N
#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(8))
#define CONFIG_CLOCK_PLL_N (168)
#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(25))
#define CONFIG_CLOCK_PLL_N (336)
#else
#define CONFIG_CLOCK_PLL_N (84)
#endif