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boards/stm32: replace GPIO_UNDEF with SPI_CS_UNDEF

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This commit is contained in:
Alexandre Abadie 2022-01-04 12:31:20 +01:00
parent 0b43b8d1f1
commit 796e127df9
No known key found for this signature in database
GPG Key ID: 1C919A403CAE1405
42 changed files with 73 additions and 57 deletions
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4
boards/b-l072z-lrwan1/include/periph_conf.h
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@ -109,7 +109,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 15),
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
@ -128,7 +128,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,

2
boards/b-l475e-iot01a/include/periph_conf.h
View File

@ -146,7 +146,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/im880b/include/periph_conf.h
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@ -84,7 +84,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/iotlab-a8-m3/include/periph_conf.h
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@ -37,7 +37,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 15),
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
}

4
boards/iotlab-m3/include/periph_conf.h
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@ -37,7 +37,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
#ifdef MODULE_PERIPH_DMA
@ -53,7 +53,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 15),
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1,
#ifdef MODULE_PERIPH_DMA

4
boards/limifrog-v1/include/periph_conf.h
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@ -88,7 +88,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
@ -101,7 +101,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF6,
.miso_af = GPIO_AF6,
.sclk_af = GPIO_AF6,

4
boards/lora-e5-dev/include/periph_conf.h
View File

@ -100,7 +100,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_UNDEF,
.miso_pin = GPIO_UNDEF,
.sclk_pin = GPIO_UNDEF,
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF_UNDEF,
.miso_af = GPIO_AF_UNDEF,
.sclk_af = GPIO_AF_UNDEF,
@ -115,7 +115,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 10),
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/lsn50/include/periph_conf.h
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@ -108,7 +108,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,

4
boards/maple-mini/include/periph_conf.h
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@ -134,7 +134,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -143,7 +143,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 15),
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
}

2
boards/nucleo-f031k6/include/periph_conf.h
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@ -100,7 +100,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,

2
boards/nucleo-f042k6/include/periph_conf.h
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@ -110,7 +110,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,

4
boards/nucleo-f103rb/include/periph_conf.h
View File

@ -154,7 +154,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -163,7 +163,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 15),
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
}

2
boards/nucleo-f303k8/include/periph_conf.h
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@ -148,7 +148,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/nucleo-f303re/include/periph_conf.h
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@ -161,7 +161,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_C, 12),
.miso_pin = GPIO_PIN(PORT_C, 11),
.sclk_pin = GPIO_PIN(PORT_C, 10),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF6,
.miso_af = GPIO_AF6,
.sclk_af = GPIO_AF6,

2
boards/nucleo-f303ze/include/periph_conf.h
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@ -158,7 +158,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/nucleo-f446ze/include/periph_conf.h
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@ -150,7 +150,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

4
boards/nucleo-f746zg/include/periph_conf.h
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@ -175,7 +175,7 @@ static const spi_conf_t spi_config[] = {
#endif
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
@ -194,7 +194,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_E, 6),
.miso_pin = GPIO_PIN(PORT_E, 5),
.sclk_pin = GPIO_PIN(PORT_E, 2),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

4
boards/nucleo-f767zi/include/periph_conf.h
View File

@ -135,7 +135,7 @@ static const spi_conf_t spi_config[] = {
#endif
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
@ -148,7 +148,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_E, 6),
.miso_pin = GPIO_PIN(PORT_E, 5),
.sclk_pin = GPIO_PIN(PORT_E, 2),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/nucleo-l011k4/include/periph_conf.h
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@ -68,7 +68,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,

2
boards/nucleo-l031k6/include/periph_conf.h
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@ -90,7 +90,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,

2
boards/nucleo-l053r8/include/periph_conf.h
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@ -102,7 +102,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,

2
boards/nucleo-l073rz/include/periph_conf.h
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@ -120,7 +120,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,

2
boards/nucleo-l152re/include/periph_conf.h
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@ -143,7 +143,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/nucleo-l412kb/include/periph_conf.h
View File

@ -105,7 +105,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/nucleo-l432kc/include/periph_conf.h
View File

@ -103,7 +103,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/nucleo-l433rc/include/periph_conf.h
View File

@ -104,7 +104,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 15),
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/nucleo-l452re/include/periph_conf.h
View File

@ -107,7 +107,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/nucleo-l476rg/include/periph_conf.h
View File

@ -187,7 +187,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/nucleo-l496zg/include/periph_conf.h
View File

@ -143,7 +143,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/nucleo-l4r5zi/include/periph_conf.h
View File

@ -104,7 +104,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

4
boards/nucleo-wl55jc/include/periph_conf.h
View File

@ -89,7 +89,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_UNDEF,
.miso_pin = GPIO_UNDEF,
.sclk_pin = GPIO_UNDEF,
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF_UNDEF,
.miso_af = GPIO_AF_UNDEF,
.sclk_af = GPIO_AF_UNDEF,
@ -104,7 +104,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

6
boards/nz32-sc151/include/periph_conf.h
View File

@ -101,7 +101,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
@ -114,7 +114,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 15),
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
@ -127,7 +127,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_C, 12),
.miso_pin = GPIO_PIN(PORT_C, 11),
.sclk_pin = GPIO_PIN(PORT_C, 10),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF6,
.miso_af = GPIO_AF6,
.sclk_af = GPIO_AF6,

2
boards/p-l496g-cell02/include/periph_conf.h
View File

@ -135,7 +135,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/p-nucleo-wb55/include/periph_conf.h
View File

@ -91,7 +91,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/spark-core/include/periph_conf.h
View File

@ -83,7 +83,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 17),
.miso_pin = GPIO_PIN(PORT_B, 16),
.sclk_pin = GPIO_PIN(PORT_B, 15),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

4
boards/stm32f0discovery/include/periph_conf.h
View File

@ -112,7 +112,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
@ -125,7 +125,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 15),
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,

2
boards/stm32f3discovery/include/periph_conf.h
View File

@ -145,7 +145,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/stm32f723e-disco/include/periph_conf.h
View File

@ -173,7 +173,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/stm32f746g-disco/include/periph_conf.h
View File

@ -128,7 +128,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 15),
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_I, 1),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,

2
boards/stm32l0538-disco/include/periph_conf.h
View File

@ -79,7 +79,7 @@ static const spi_conf_t spi_config[] = {
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,

17
cpu/stm32/include/periph/cpu_spi.h
View File

@ -48,6 +48,21 @@ extern "C" {
*/
#define SPI_HWCS(x) (SPI_HWCS_MASK | x)
/**
* @brief Define value for unused CS line
*/
#define SPI_CS_UNDEF (GPIO_UNDEF)
#ifndef DOXYGEN
/**
* @brief Overwrite the default spi_cs_t type definition
* @{
*/
#define HAVE_SPI_CS_T
typedef uint32_t spi_cs_t;
/** @} */
#endif
/**
* @brief Use the shared SPI functions
* @{
@ -87,7 +102,7 @@ typedef struct {
gpio_t mosi_pin; /**< MOSI pin */
gpio_t miso_pin; /**< MISO pin */
gpio_t sclk_pin; /**< SCLK pin */
gpio_t cs_pin; /**< HWCS pin, set to GPIO_UNDEF if not mapped */
spi_cs_t cs_pin; /**< HWCS pin, set to SPI_CS_UNDEF if not mapped */
#ifndef CPU_FAM_STM32F1
gpio_af_t mosi_af; /**< MOSI pin alternate function */
gpio_af_t miso_af; /**< MISO pin alternate function */

9
cpu/stm32/periph/spi.c
View File

@ -31,6 +31,7 @@
#include "bitarithm.h"
#include "cpu.h"
#include "mutex.h"
#include "periph/gpio.h"
#include "periph/spi.h"
#include "pm_layered.h"
@ -166,13 +167,13 @@ int spi_init_cs(spi_t bus, spi_cs_t cs)
if (bus >= SPI_NUMOF) {
return SPI_NODEV;
}
if (cs == SPI_CS_UNDEF ||
if (!gpio_is_valid(cs) ||
(((cs & SPI_HWCS_MASK) == SPI_HWCS_MASK) && (cs & ~(SPI_HWCS_MASK)))) {
return SPI_NOCS;
}
if (cs == SPI_HWCS_MASK) {
if (spi_config[bus].cs_pin == GPIO_UNDEF) {
if (!gpio_is_valid(spi_config[bus].cs_pin)) {
return SPI_NOCS;
}
#ifdef CPU_FAM_STM32F1
@ -393,7 +394,7 @@ void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont,
/* active the given chip select line */
dev(bus)->CR1 |= (SPI_CR1_SPE); /* this pulls the HW CS line low */
if ((cs != SPI_HWCS_MASK) && (cs != SPI_CS_UNDEF)) {
if ((cs != SPI_HWCS_MASK) && gpio_is_valid(cs)) {
gpio_clear((gpio_t)cs);
}
@ -409,7 +410,7 @@ void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont,
#endif
/* release the chip select if not specified differently */
if ((!cont) && (cs != SPI_CS_UNDEF)) {
if ((!cont) && gpio_is_valid(cs)) {
dev(bus)->CR1 &= ~(SPI_CR1_SPE); /* pull HW CS line high */
if (cs != SPI_HWCS_MASK) {
gpio_set((gpio_t)cs);