In TX-only mode the UART was previously release before all bits of the
last byte were shifted out. This adds a busy loop waiting while the
peripheral is still busy, fixing the issue.
Co-authored-by: benpicco <benpicco@googlemail.com>
The driver assumes that timer A and timer B have the same register
layout regarding all the features exposed by the driver. This is
backed by the MCU family datasheets for the MSP430 x1xx and the
MSP430 G2xx / F2xx MCUs (and likely more families).
The assert() is pretty limited in coverage, but more to document why
a "timer A clear" mask is used but still claiming the driver also
works for timer B. It just looks too much like a bug otherwise.
This block of code inconsistently made use of else-if statments. The
patch makes the use consistent. The change also makes the code a bit
simpler to read.
APB12 is never defined as a macro. It is an element in the bus_t enum.
Therefore, the test to check if it is defined will always fail.
APB12 is not a real bus. It is the second register of the APB1 bus. I am
not aware of any STM32 family where the ABP2 bus is implmented (ie
RCC_APB2ENR_SYSCFGEN is defined) and devices attached to said bus are
enabled via the APB1 second register. For this reason, the fix is to
simply remove the check.
This cleans up the USCI based UART and SPI implementations and allows
multiple instances of either interface to be configured by the
boards. In addition, it allows sharing the USCI peripherals to provide
multiple serial interfaces with the same hardware (round-robin).
This commit introduces a more robust GPIO mocking mechanism by utilizing
a 2-dimensional array. Each element of the array holds a gpio_mock_t
structure describing a pin's attributes such as value, mode, flank,
interruption callback, and callback argument.
This enhancement allows for the arbitrary simulation of GPIOs across
various microcontroller architectures using the current API, while
maintaining consistency through the use of the GPIO_PIN macro.
Additionally, it should be noted that only the maximum number of ports
and maximum number of pins can be altered according to the context.
The implemented API in gpio_mock.c remains rudimentary, providing no
validation but fulfilling the required functions. However, it remains
customizable as all its functions are marked as weak.
Signed-off-by: Gilles DOFFE <g.doffe@gmail.com>
This patch removes a largely redundant block of conditional includes.
The removed includes are moved into the family specific headers so that
the more specific headers may override defaults defined in the shared
headers.
these interrupts were used to generate USBDEV_EVENT_TR_FAIL which is deprecated and will be removed
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
If the gpio is initialized as an input or interruptable pin, the
gpio_mock driver returns -1 leading to failed initialization.
However that is not because nothing can change the GPIO state that it
has to be an error.
Return 0 in all cases.
Signed-off-by: Gilles DOFFE <g.doffe@gmail.com>
The register access to SMPR1/SMPR2 was incorrect in three aspects:
1. For channels < 10, SMPR1 was cleared but SMPR2 should have been
cleared
2. The code was not thread-safe
3. An unneeded write was issued. (The compiler won't combine the
in-place bitwise operations into a single read-modify-write
sequence on `volatile` memory.)
Fixes https://github.com/RIOT-OS/RIOT/issues/20261
Adds a separate board for native64 instead of the `NATIVE_64BIT` workaround.
The files in `boards/native64` are more or less dummy files and just include
the `boards/native` logic (similar to `openlabs-kw41z-mini-256kib`).
The main logic for native is in `makefiles/arch/native.inc.mk`, `cpu/native`
and `boards/native`.
The remaining changes concern the build system, and change native board checks
to native CPU checks to cover both boards.
Use analog mode for GPIO_DISCONNECT, as this is said to have the lowest
current leakage due to disabling the Schmitt trigger and correctly
detect this in `gpio_ll_query_conf()`.
Also drop the `schmitt_trigger_disabled` member in `gpio_conf_t`, as
the Schmitt trigger is only ever disabled in Analog mode anyway and
cannot be freely configured.
The separate Schmitt trigger bit in the configuration is dropped, as
the Schmitt trigger is only every disabled when in `GPIO_DISCONNECT`
mode. So no need to encode the same information twice.
The `gpio_state_t` is improved to be a bitmask that holds the
MODER register value and a flag indicating whether open-drain mode
should be enabled.
Finally, `GPIO_DISCONNECT` is implemented. This is done by placing the
GPIO in analog mode, which by disabling the Schmitt trigger reduces
power consumption.
The script to fix the vendor header files has been renamed to
`fix_headers.sh` and now does two things:
1. Strip bogus type qualifiers in front of padding (as before)
2. Strip bogus `LITTLE_ENDIAN` defines.
If `register_interrupt` somehow fails, we leak the already created
POSIX timer by returning immediately.
Fix this by calling `timer_delete` before returning.
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
When using `err`, no stacktrace is generated and the standard panic
functionallity of RIOT is sidestepped.
Use `core_panic` instead.
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
In `timer_init`, `freq` is being check so its not unused.
In `timer_set_periodic`, `flags` is being used too.
Remove the uses of `(void)` in both cases.
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
Initial version to test 64 bit compatibility.
Instead of a separate board, the inital version for Linux/x86_64 is enabled
by setting the environment variable `NATIVE_64BIT=y` and compiling as usual.
Not currently implemented:
* Architectures other than x86_64 or operating systems other than Linux
* No FreeBSD support
* No Aarch support
* Rust support for x86_64
Add support for querying the frequency supported by
`periph_timer`. This allows applications which require
this feature to run on the `native` board.
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
The tramp assembly was missing a `.note.GNU-stack` section,
meaning the compiler was forced to assume that we require
an executable stack.
Fix this by adding the necessary section.
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
The underlying peripheral can only read from RAM. This uses the
existing infrastructure (already needed to work around the lack of a
hardware support for I2C_NOSTART) to unconditionally copy any to-be-sent
data into RAM.
This adds the features
- periph_gpio_ll_input_pull_down:
To indicate support for input mode with internal pull down
- periph_gpio_ll_input_pull_keep:
To indicate support for input mode with internal resistor
pulling towards current level
- periph_gpio_ll_input_pull_up:
To indicate support for input mode with internal pull up
- periph_gpio_ll_disconnect:
To indicate a GPIO can be disconnected
- periph_gpio_ll_open_drain:
To indicate support for open drain mode
- periph_gpio_ll_open_drain_pull_up:
To indicate support for open drain mode with internal pull up
- periph_gpio_ll_open_source:
To indicate support for open source mode
- periph_gpio_ll_open_source_pull_down:
To indicate support for open source mode with internal pull down
- Move common code for USART (shared SPI / UART peripheral) to its
own file and allow sharing the USART peripheral to provide both
UART and SPI in round-robin fashion.
- Configure both UART and SPI bus via a `struct` in the board's
`periph_conf.h`
- this allows allocating the two UARTs as needed by the use case
- since both USARTs signals have a fixed connection to a single
GPIO, most configuration is moved to the CPU
- the board now only needs to decide which bus is provided by
which USART
Note: Sharing an USART used as UART requires cooperation from the app:
- If the UART is used in TX-only mode (no RX callback), the driver
will release the USART while not sending
- If the UART is used to also receive, the application needs to power
the UART down while not expecting something to send. An
`spi_acquire()` will be blocked while the UART is powered up.
This commit optimizes the `gpio_conf_t` type in the following
regards:
- The "base" `gpio_conf_t` is stripped from members that only some
platforms support, e.g. drive strength, slew rate, and disabling of
the Schmitt Trigger are no longer universally available but
platform-specific extensions
- The `gpio_conf_t` is now crammed into a bit-field that is 8 bit or
16 bit wide. This allows for storing lots of them e.g. in
`driver_foo_params_t` or `uart_conf_t` etc.
- A `union` of the `struct` with bit-field members and a `bits` is used
to allow accessing all bits in a simple C statement and to ensure
alignment for efficient handling of the type
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Expose the compile time configuration knob `CONFIG_AFIO_PCF0_SWJ_CFG`
to allow freeing some/all JTAG pins and use them as GPIOs.
As default, PB4 is remapped from NJTRST to be usable as regular GPIO.
This still allows using the JTAG interface for debugging/flashing,
but makes an GPIO exposed by some boards available.
The API doc clearly states that arbitrary high PWM frequencies can
be requested and the driver should reduce the frequency while keeping
the resolution, when required. So change the code to just do that
rather than blowing assertions.
The function configures additional features of the DMA stream for F2/F4/F7.
`dma_setup_ext` added to configure F2/F4/F7 specific additional features like `MBURST`, `PBURST`, `FIFO` and Peripheral flow controller. It is supposed to be used after `dma_setup` and `dma_prepare`.
timer_set has no documented restriction on this being not null, other
implementations explicitly tolerate it (rpx0xx checks inside the ISR,
but doing it at init time keeps the ISR slim).
This is useful when using a timer just to read, without any action when
it triggers (the action is taken depending on read values, eg. in a
thread context).
- boot the I2C after init in low power mode
- otherwise I2C will consume more power until the first time it is
used, which is surprising
- STM32 F1 only: reconfigure SCL and SDA as GPIOs while the I2C
peripheral is powered down
- When the I2C peripheral is not clocked, it drives SCL and SDA
down. This will dissipate power across the pull up resistor.
- add support for multiple timers
- add support for selecting clock source in the board's `periph_conf.h`
- add support for the prescaler
- implement `periph_timer_query_freqs`
- add a second timer to all MSP430 boards
- the first timer is fast ticking, high-power
- the second is slow ticking, low-power
The functions `uart_poweron()`, `uart_poweroff()` and `uart_mode()`
can share code between the UART (UART without EasyDMA) and UARTE
(UART with EasyDMA) implementations, so let's do that.
- nRF51: Use `uart_conf_t` for consistency with nRF52
- nRF52832: Use UARTE (UART with EasyDMA) over UART (without DMA), as
done for all other nRF52 family members
- use `UARTE_PRESENT` to detect whether an UARTE can be used, rather
than family names
The `i2c_read_bytes()` and `i2c_write_bytes()` function return the
number of bytes written / read, instead of `0` as the API contract
says. This fixes the issue.
With only 8 possible prescalers, we can just loop over the values
and shift the clock. In addition to being much easier to read, using
shifts over divisions can be a lot faster on CPUs without hardware
division.
In addition an `assert()` is added that checks if the API contract
regarding the SPI frequency is honored. If the requested clock is too
low to be generated, we should rather have a blown assertion than
hard to trace communication errors.
Finally, the term prescaler is used instead of divider, as divider may
imply that the frequency is divided by the given value n, but
in fact is divided by 2^(n+1).
Previously, the /CS signal was performed by enabling / disabling the
SPI peripheral. This had the disadvantage that clock polarity settings
where not applied starting with `spi_acquire()`, as assumed by e.g.
the SPI SD card driver, but only just before transmitting data.
Now the SPI peripheral is enabled on `spi_acquire()` and only disabled
when calling `spi_release()`, and the `SPI_CR2_SSOE` bit in the `CR2`
register is used for hardware /CS handling (as supposed to).
