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cpu/qn908x: implement periph_timer_query_freqs

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Marian Buschsieweke 2023-04-28 12:31:58 +02:00 committed by Marian Buschsieweke
parent 5dc3d9c743
commit 35e140b540
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GPG Key ID: 77AA882EC78084E6
4 changed files with 26 additions and 5 deletions
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1
cpu/qn908x/Kconfig
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@ -16,6 +16,7 @@ config CPU_FAM_QN908X
select HAS_PERIPH_I2C_RECONFIGURE
select HAS_PERIPH_RTC
select HAS_PERIPH_SPI_RECONFIGURE
select HAS_PERIPH_TIMER_QUERY_FREQS
select HAS_PERIPH_WDT
select HAS_PERIPH_WDT_CB

1
cpu/qn908x/Makefile.features
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@ -7,6 +7,7 @@ FEATURES_PROVIDED += periph_gpio periph_gpio_irq
FEATURES_PROVIDED += periph_i2c_reconfigure
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_spi_reconfigure
FEATURES_PROVIDED += periph_timer_query_freqs
FEATURES_PROVIDED += periph_wdt periph_wdt_cb
include $(RIOTCPU)/cortexm_common/Makefile.features

2
cpu/qn908x/include/periph_cpu.h
View File

@ -333,7 +333,7 @@ typedef uint16_t adc_conf_t;
* @brief CPU specific timer Counter/Timers (CTIMER) configuration
* @{
*/
#define TIMER_CHANNELS (4)
#define TIMER_CHANNEL_NUMOF (4)
#define TIMER_MAX_VALUE (0xffffffff)
/**
* @brief The nRF5x periph_timer implements timer_set()

27
cpu/qn908x/periph/timer.c
View File

@ -67,6 +67,25 @@ static const clock_ip_name_t ctimers_clocks[FSL_FEATURE_SOC_CTIMER_COUNT] =
#error "ERROR in board timer configuration: too many timers defined"
#endif
uword_t timer_query_freqs_numof(tim_t dev)
{
assert(dev < TIMER_NUMOF);
(void)dev;
return 256;
}
uint32_t timer_query_freqs(tim_t dev, uword_t index)
{
assert(dev < TIMER_NUMOF);
(void)dev;
if (index >= UINT8_MAX) {
return 0;
}
return CLOCK_GetFreq(kCLOCK_ApbClk) / (index + 1);
}
int timer_init(tim_t tim, uint32_t freq, timer_cb_t cb, void *arg)
{
DEBUG("timer_init(%u, %" PRIu32 ")\n", tim, freq);
@ -103,7 +122,7 @@ int timer_init(tim_t tim, uint32_t freq, timer_cb_t cb, void *arg)
int timer_set_absolute(tim_t tim, int channel, unsigned int value)
{
DEBUG("timer_set_absolute(%u, %u, %u)\n", tim, channel, value);
if ((tim >= TIMER_NUMOF) || (channel >= TIMER_CHANNELS)) {
if ((tim >= TIMER_NUMOF) || (channel >= TIMER_CHANNEL_NUMOF)) {
return -1;
}
CTIMER_Type* const dev = ctimers[tim];
@ -115,7 +134,7 @@ int timer_set_absolute(tim_t tim, int channel, unsigned int value)
int timer_set(tim_t tim, int channel, unsigned int value)
{
DEBUG("timer_set(%u, %u, %u)\n", tim, channel, value);
if ((tim >= TIMER_NUMOF) || (channel >= TIMER_CHANNELS)) {
if ((tim >= TIMER_NUMOF) || (channel >= TIMER_CHANNEL_NUMOF)) {
return -1;
}
CTIMER_Type* const dev = ctimers[tim];
@ -140,7 +159,7 @@ int timer_set(tim_t tim, int channel, unsigned int value)
int timer_clear(tim_t tim, int channel)
{
DEBUG("timer_clear(%u, %d)\n", tim, channel);
if ((tim >= TIMER_NUMOF) || (channel >= TIMER_CHANNELS)) {
if ((tim >= TIMER_NUMOF) || (channel >= TIMER_CHANNEL_NUMOF)) {
return -1;
}
CTIMER_Type* const dev = ctimers[tim];
@ -170,7 +189,7 @@ static inline void isr_ctimer_n(CTIMER_Type *dev, uint32_t ctimer_num)
{
DEBUG("isr_ctimer_%" PRIu32 " flags=0x%" PRIx32 "\n",
ctimer_num, dev->IR);
unsigned state = dev->IR & ((1 << TIMER_CHANNELS) - 1);
unsigned state = dev->IR & ((1 << TIMER_CHANNEL_NUMOF) - 1);
while (state) {
uint8_t channel;
state = bitarithm_test_and_clear(state, &channel);