Gilles DOFFE
be2c0ae179
cpu/stm32: define CPU_IRQ_NUMOF for stm32mp157cac
...
This MCU has 150 interrupt vectors.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
91a12c200c
cpu/stm32: do not retrieve cmsis headers
...
Normally, CMSIS headers are retrieved as package from ST git repository
for each stm32.
However stm32mp1 family does not have a CMSIS headers repository but
have been included into RIOT source code in a previous commit.
For stm32mp1, CMSIS headers package must then not be retrieved and
vectors have to be generated from already in-source CMSIS headers.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
d6400c77de
cpu/stm32: include stm32mp1 vendor headers
...
Include stm32mp1 vendors header. CORE_CM4 must be defined to include
Cortex-M4 core headers.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
169097ac21
cpu/stm32: add stm32mp157x vendor headers
...
Add vendor CMSIS headers from STMicroelectronics:
https://wiki.st.com/stm32mpu/wiki/STM32CubeMP1_architecture#CMSIS
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
e6aef8f626
cpu/stm32: get info from stm32mp1 cpu model
...
stm32mp1 ordering informations are not the same than classical
single MCU.
And as stm32mp1 has no flash, just extract second part of model name
and pincount.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
c3e29bb1fa
cpu/stm32: setup clocks for stm32mp1
...
As stm32mp1 clocks are not configured like for other stm32, do not use
stmclk_common.c
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
d173097d7f
cpu/stm32: do not build bootloader for mp1
...
The stm32mp1 family has no flash. The firmware is loaded directly in
RAM by stlink programmer or by Cortex-A7 bootloader/OS.
Thus bootloader is useless for this family, disable it.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
4f0fd9cf95
cpu/stm32: add GPIO_PIN macro for stm32mp1 family
...
As stm32mp1 family accesses gpio pins with a different
offset than other stm32, create a specific macro.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
bdc1cce04d
cpu/stm32: enable MPU for stm32mp1
...
stm32mp1 family has a MPU (Memory Processing Unit).
Thus adds the feature.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
8279e54272
cpu/stm32: add clock configuration for stm32mp1
...
Configure stm32mp1 Cortex-M4 MCU core clock according to board
configuration.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
d78e13e906
cpu/stm32: add stm32mp1 support to clk_conf
...
clk_conf is a useful tool to produce clock headers for new boards.
But it only supports STM32Fx families.
This commits add the definition of a new family: STM32MP1.
Only the STM32MP157 is supported for now.
First build clk_conf:
$ make -C cpu/stm32/dist/clk_conf/
Clock header can be generated with the following command once clk_conf is
built:
$ cpu/stm32/dist/clk_conf/clk_conf stm32mp157 208000000 24000000 1
This command line will produce a core clock of 208MHz with a 24MHz HSE
oscillator and will use LSE clock which corresponds to the STM32MP157C-DK2
board configuration.
The command will output the header to copy paste into the periph_conf.h of
the board:
/**
* @name Clock settings
*
* @note This is auto-generated from
* `cpu/stm32/dist/clk_conf/clk_conf.c`
* @{
*/
/* give the target core clock (HCLK) frequency [in Hz],
* maximum: 209MHz */
#define CLOCK_CORECLOCK (208000000U)
/* 0: no external high speed crystal available
* else: actual crystal frequency [in Hz] */
#define CLOCK_HSE (24000000U)
/* 0: no external low speed crystal available,
* 1: external crystal available (always 32.768kHz) */
#define CLOCK_LSE (1U)
/* peripheral clock setup */
#define CLOCK_MCU_DIV RCC_MCUDIVR_MCUDIV_1 /* max 209MHz */
#define CLOCK_MCU (CLOCK_CORECLOCK / 1)
#define CLOCK_APB1_DIV RCC_APB1DIVR_APB1DIV_2 /* max 104MHz */
#define CLOCK_APB1 (CLOCK_CORECLOCK / 2)
#define CLOCK_APB2_DIV RCC_APB2DIVR_APB2DIV_2 /* max 104MHz */
#define CLOCK_APB2 (CLOCK_CORECLOCK / 2)
#define CLOCK_APB3_DIV RCC_APB3DIVR_APB3DIV_2 /* max 104MHz */
#define CLOCK_APB3 (CLOCK_CORECLOCK / 2)
/* Main PLL factors */
#define CLOCK_PLL_M (2)
#define CLOCK_PLL_N (52)
#define CLOCK_PLL_P (3)
#define CLOCK_PLL_Q (13)
/** @} */
This result has been verified with STM32CubeMX, the official ST tool.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
5e30e60fec
cpu/stm32: avoid configuring stm32mp1 APB1 clock
...
APB1 bus clock is always enabled is not manageable by RCC register.
So avoid enabling it.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
7a2550da9b
cpu/stm32: add stm32mp1 peripheral busses
...
Add stm32mp1 peripheral busses AHB1, AHB2, AHB3 and AHB4 with
enable/disable functions.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
67f37950a0
cpu/stm32: default i2c configuration
...
* Setup i2c speed to I2C_SPEED_LOW by default
* enable i2c_write_regs() function.
* i2c frequency needs to be specified into board periph_conf.h
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
f39aa979af
cpu/stm32: setup CLOCK_LSI for stm32mp1
...
Set stm32mp1 family LSI clock frequency to 32KHz as specified in datasheet.
STM32MP157C example:
https://www.st.com/resource/en/datasheet/stm32mp157c.pdf
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
ba5f8e1cda
cpu/stm32: consider starting white spaces in gen_vectors.py
...
In some CMSIS headers, "typedef enum" could be preceded by white
spaces. Thus consider them when parsing the line.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
1c063a74ea
stm32: Adapt to flashpage/flashpage_pagewise API
2020-11-11 23:16:42 +01:00
9d13c07e92
cpu/stm32f0: handle custom pll prediv/mul at cpu level
2020-11-10 15:55:38 +01:00
5d77b7d90d
cpu/stm32: show PLL params in menuconfig with CUSTOM_PLL_PARAMS
2020-11-10 14:53:37 +01:00
03ee0c938f
cpu/stm32: adapt Kconfig clock configuration for f0
2020-11-10 14:53:12 +01:00
2f2622c76f
cpu/stm32: move stm32l5 default PLL N to cpu
2020-11-10 09:34:07 +01:00
36d33d38f7
cpu/stm32: move stm32l4+ default PLL N to cpu
2020-11-10 09:34:07 +01:00
ef5897775d
cpu/stm32l4wb: add missing define for PLL HSI source
2020-11-10 09:34:07 +01:00
934028c114
cpu/stm32: fix l4l5wb clock configuration
...
Default values were wrong for WB when using HSE 32MHz as PLL input source
Default PLL input source was wrong when not using HSE and the board
provides an HSE
2020-11-10 09:34:07 +01:00
f111fd8447
cpu/stm32/kconfig.clk: adapt for l4/l5/wb
2020-11-10 09:34:06 +01:00
d2a46f58c2
stm32/flashpage: use void pointer for flash address
2020-11-09 14:28:42 +01:00
Francisco
aa79f4da17
Merge pull request #15078 from aabadie/pr/cpu/stm32f0f1f3_mco
...
cpu/stm32f0f1f3: add MCO configuration and initialization
2020-11-06 08:56:43 +01:00
afba298bc1
cpu/stm32f0f1f3: configure and initialize MCO
2020-11-05 21:59:00 +01:00
565242f67e
Merge pull request #15073 from aabadie/pr/cpu/stm32l0l1_mco
...
cpu/stm32l0l1: add MCO configuration and initialization
2020-11-05 17:03:32 +01:00
f98f5f5b49
Merge pull request #15084 from aabadie/pr/cpu/stm32gx_mco
...
cpu/stm32gx: add MCO configuration and initialization
2020-11-05 16:46:04 +01:00
Benjamin Valentin
a90016740c
cpu/stm32/clk/f2f4f7: add config for 25 MHz HSE
2020-11-05 15:46:11 +01:00
5a2409557f
cpu/stm32gx: configure and initialize MCO
2020-11-05 13:39:19 +01:00
4b316c593a
cpu/stm32l0l1: configure MCO
2020-11-05 13:37:34 +01:00
18b5f417d1
cpu/stm32l4: implement MCO configuration
2020-11-05 13:34:45 +01:00
daa7ed54cd
Merge pull request #15000 from aabadie/pr/boards/stm32l0l1_clock_kconfig_only
...
boards/stm32l0l1: model clock configuration in kconfig
2020-11-03 17:20:00 +01:00
fb35edd22d
cpu/stm32: adapt clock configuration for l0/l1
2020-11-03 14:23:46 +01:00
Leandro Lanzieri
500cf238b8
cpu/stm32/vendor: use submake to fetch CMSIS headers
2020-11-03 13:33:16 +01:00
Marian Buschsieweke
125c892c03
drivers/periph/timer: Use uint32_t for frequency
...
For all currently supported platforms `unsigned long` is 32 bit in width. But
better use `uint32_t` to be safe.
2020-10-30 22:02:12 +01:00
7fbfb92f03
boards/stm32gx: move Kconfig clock config to cpu
2020-10-29 23:00:44 +01:00
Marian Buschsieweke
45dc86acce
cpu/stm32: Fix reception bug in periph_eth
...
The reception code hands RX DMA descriptors back to the DMA right after its
contents were copied into the network stack internal buffer. This increases
the odds that the DMA never runs out of DMA descriptors to fill, even under
high load. However, the loop fetching the Ethernet frame stops to iterate at the
end of the frame. If the DMA used one more descriptor to store the FCS, this
was not returned back to the DMA. This commit fixes it.
2020-10-28 14:23:25 +01:00
Marian Buschsieweke
7ced6a8ac8
cpu/stm32: Improve debug output for periph_eth
2020-10-28 14:22:54 +01:00
benpicco
2050193030
Merge pull request #15273 from aabadie/pr/cpu/stm32_clk_cfg_in_cpu
...
boards/stm32: cpu/stm32: move clock configuration from boards to cpu
2020-10-27 10:04:01 +01:00
0bd70a46bc
cpu/stm32: rework clock configuration documentation
2020-10-27 08:54:09 +01:00
ec5b47fc61
cpu/stm32l4+/wb: centralize max core clock define, adapt related boards
2020-10-27 08:44:55 +01:00
05f67a0a00
cpu/stm32: remove useless include in clock configuration
2020-10-26 11:21:07 +01:00
d6d85a3370
cpu/stm32: add common clock configuration header
2020-10-26 11:21:07 +01:00
f2e2c89424
cpu/stm32: move clock configuration headers to cpu
2020-10-26 11:16:23 +01:00
4e50feb4a8
cpu/stm32: adapt Kconfig for stm32l5
2020-10-23 18:28:27 +02:00
bd24a71fe0
cpu/stm32/kconfig: create family directory if not exist
2020-10-23 18:21:51 +02:00
7f26d5c389
cpu/stm32l5: adapt flashpage periph
2020-10-23 18:21:50 +02:00
a416b2793f
cpu/stm32: add basic support for stm32l5
2020-10-23 18:21:50 +02:00
b1b6c33104
cpu/stm32/dist/irqs: adapt for stm32l5
2020-10-23 18:13:07 +02:00
02c4b05a5a
cpu/stm32: configure stm32l5 cmsis repository version
2020-10-23 18:13:07 +02:00
benpicco
ad294aa340
Merge pull request #15203 from maribu/stm32-eth-negotiate
...
cpu/stm32: periph_eth: Use auto-negotation
2020-10-23 14:22:56 +02:00
Bas Stottelaar
7eb3414cff
cpu/*: remove unneeded ENABLE_DEBUG
2020-10-23 11:29:57 +02:00
Bas Stottelaar
22243aec7a
cpu/*: realign ENABLE_DEBUG
2020-10-23 00:46:26 +02:00
Bas Stottelaar
bd34cf8fc0
cpu/*: reorder ENABLE_DEBUG after last include
2020-10-23 00:45:55 +02:00
Marian Buschsieweke
5f9b55a182
cpu/stm32: Add stm32_eth_auto for auto-negotiation
...
Expose the auto-negotiation feature of the Ethernet device via the
pseudo-module stm32_eth_auto. With this enabled, the static speed configuration
set in the boards periph_conf.h will only be used if the PHY lacks
auto-negotiation capabilities - which is unlikely to ever happen.
2020-10-22 12:37:23 +02:00
Bas Stottelaar
ab6188cea3
cpu/*: add missing include of assert.h
2020-10-22 11:13:08 +02:00
72c17588b9
boards/stm32: remove unused CLOCK_LSE define
2020-10-21 12:11:17 +02:00
9f985e8e56
cpu/stm32: use CONFIG_BOARD_HAS_LSE instead of CLOCK_LSE
2020-10-21 12:10:53 +02:00
fed1c4dbbe
Merge pull request #15259 from aabadie/pr/cpu/stm32_cleanup_disable_hsi
...
cpu/stm32: simplify stmclk_disable_hsi function
2020-10-21 11:19:30 +02:00
84306f1122
cpu/stm32: remove unused CLOCK_HSE define
2020-10-21 10:11:46 +02:00
0480490a2b
cpu/stm32/dist: adapt gen_kconfig.py with new directory
2020-10-21 09:18:30 +02:00
2720c5526c
cpu/stm32: rename kconfig directory to kconfigs
...
The kconfig directory names clashes with Kconfig file on non case sensitive filesystems
2020-10-21 09:18:24 +02:00
42f71914a5
cpu/stm32: simplify stmclk_disable_hsi function
...
There is no need to check for CLOCK_HSE or to check if HSI is used as SYSCLK, this is already checked at compile time in the clock initialization code
2020-10-20 22:13:50 +02:00
2f053c90bd
cpu/stm32gx: improve clock initialization sequence
2020-10-20 15:47:21 +02:00
e2ae50258a
cpu/stm32gx: factorize HSE clock activation
2020-10-20 14:29:22 +02:00
2d603269dd
cpu/stm32gx: disable hsi only if unused
2020-10-20 14:29:11 +02:00
20894e47a6
cpu: boards: stm32gx: use IS_ACTIVE macro for clock config
2020-10-20 14:29:11 +02:00
a96ca57f66
cpu/stm32gx: remove useless LSE clock initialization
2020-10-20 14:29:11 +02:00
d78a316139
cpu: boards: stm32gx: compile code for all possible clock modes
2020-10-20 14:29:11 +02:00
d1724d6718
cpu/stm32l4: correctly handle clock freq > 80MHz
2020-10-20 11:37:46 +02:00
00ea7ffa55
cpu/stm32l4wb: cleanup clock initialization
2020-10-20 11:37:46 +02:00
d7d5d9d651
boards/stm32l4: extend clock configuration
...
- add PLLQ default value
- better tune default PLLM value depending on HSE value
- ensure CLOCK_PLL_SRC is always defined
2020-10-20 11:37:45 +02:00
b11d65ab70
cpu/stm32l4: enable PLLQ as 48MHz source if possible
2020-10-20 11:37:45 +02:00
58ad0168e7
cpu/stm32: stm32l011 lines doesn't provide hwrng
2020-10-15 16:24:33 +02:00
2e2b87dda5
cpu/stm32: define EEPROM size for stm32l011k4
2020-10-15 16:24:33 +02:00
e51279b228
cpu/stm32l0: fix clk control register reset
...
on stm32l011, RCC_CR_CSSON is not defined
2020-10-15 16:24:33 +02:00
044acf1175
cpu/stm32: enable power overdrive on f4 and f7
...
This is only enabled if the HCLK clock is above 168MHz on F4 and 180MHz on f7
2020-10-14 13:36:20 +02:00
Cenk Gündoğan
0741f161ae
Merge pull request #15198 from leandrolanzieri/pr/kconfig/add_error_symbols
...
Kconfig: add error symbols and makefile check
2020-10-13 13:09:42 +02:00
Marian Buschsieweke
d84caa50d2
cpu/stm32: Fix link status in periph_eth
...
Previously, only an link-up event was triggered, not an link down event. And
additionally, once the link-up event was sent, the link status was no longer
monitored. As a result, once a link-up was sent, no further link event were
triggered.
2020-10-12 14:53:41 +02:00
Marian Buschsieweke
6294382627
cpu/stm32: Use mii.h for periph_eth
...
Use shared MII definitions and utilities instead own definitions.
2020-10-12 08:46:20 +02:00
benpicco
94e78cd1dd
Merge pull request #15193 from maribu/stm32_eth_fix
...
cpu/stm32: Fix & cleanup periph_eth
2020-10-11 21:40:36 +02:00
Marian Buschsieweke
0e43c927b1
cpu/stm32: Fix/cleanup periph_eth
...
The methods to read from / write to MII registers had an address argument to
allow specifying the PHY to communicate with. However, only a single PHY is
available on all boards supported and the driver is not able to operate with
multiple PHYs anyway - thus, drop this parameter for ease of use.
This fixes a bug in the _get_link_status() function, which used hard coded the
address 0; which might not be correct for all boards.
2020-10-09 20:20:54 +02:00
Leandro Lanzieri
fe6d66d92a
kconfig: add ERROR symbol for conflicting modules
2020-10-09 18:04:17 +02:00
42067b0091
cpu/stm32/kconfig: restore features provided at cpu lines level
2020-10-09 12:39:22 +02:00
87f2f7ab99
cpu/stm32wb: extend Kconfig cpu lines and models
2020-10-09 12:39:22 +02:00
85a3167e4f
cpu/stm32l4: extend Kconfig cpu lines and models
2020-10-09 12:39:22 +02:00
841f500477
cpu/stm32l1: extend Kconfig cpu lines and models
2020-10-09 12:39:22 +02:00
11f3f2de74
cpu/stm32l0: extend Kconfig cpu lines and models
2020-10-09 12:39:22 +02:00
e8479b8cb5
cpu/stm32g4: extend Kconfig cpu lines and models
2020-10-09 12:39:22 +02:00
f223516a39
cpu/stm32g0: extend Kconfig cpu lines and models
2020-10-09 12:39:22 +02:00
7a510c08ff
cpu/stm32f7: extend Kconfig cpu lines and models
2020-10-09 12:39:22 +02:00
1c63b79a6d
cpu/stm32f4: extend Kconfig cpu lines and models
2020-10-09 12:39:21 +02:00
2c0930a3e7
cpu/stm32f3: extend Kconfig cpu lines and models
2020-10-09 12:39:21 +02:00
3d0c91d486
cpu/stm32f2: extend Kconfig cpu lines and models
2020-10-09 12:39:21 +02:00
3c08d564eb
cpu/stm32f1: extend Kconfig cpu lines and models
2020-10-09 12:39:21 +02:00
2490e01445
cpu/stm32f0: extend Kconfig cpu lines and models
2020-10-09 12:39:21 +02:00
06c3361a15
cpu/stm32/dist: add generator for kconfig cpu lines and models
2020-10-09 12:39:21 +02:00
Marian Buschsieweke
7b4d4c198b
cpu/stm32/periph_eth: Code style
2020-10-08 11:46:39 +02:00
Marian Buschsieweke
ab30865a08
cpu/stm32: Cleanup periph_eth
...
Cleanup functions _rw_phy(), _phy_read(), and _phy_write() and rename them to
_mii_reg_{access,read,write}().
2020-10-08 11:46:39 +02:00
3e1fa30c2f
cpu/stm32/irqs: fix vectors generator script
2020-10-08 08:09:31 +02:00
benpicco
2289a188ed
Merge pull request #15164 from maribu/stm32-eth-fix-link-status
...
cpu/stm32: Fix periph_eth link status
2020-10-06 23:46:34 +02:00
4613f840f4
cpu/stm32: put GPIO in ain before initializing the clocks
2020-10-06 16:10:05 +02:00
0d786e3dbb
cpu: boards: stm32f2/f4/f7: rework clock configuration and init
2020-10-06 16:10:05 +02:00
Marian Buschsieweke
7b738a66c4
cpu/stm32: Fix periph_eth link status
...
The link status was previously not returned via the value parameter, as required
by the netdev_driver_t API. As a result, e.g. the `ifconfig` shell command
showed garbage.
2020-10-06 10:29:38 +02:00
Marian Buschsieweke
7920d32e32
cpu/stm32: Clean up periph_eth
...
Use `addr` instead of `mac` when referring to L2 address.
2020-10-05 16:03:47 +02:00
7159fa03fc
Merge pull request #15119 from hugueslarrive/adc_f3
...
cpu/stm32/periph/adc_f3: add ADC3 and ADC4 management
2020-10-01 17:00:00 +02:00
hugues
3d6b473cd7
cpu/stm32/adc_f3: improve peripheral driver
...
- fix clock enable/disable bitfields
- add management for ADC3 and ADC4
- improve calibration
2020-10-01 11:08:45 +02:00
Francisco
b5c51d244e
Merge pull request #14909 from OTAkeys/pr/conn_can_clean_up
...
can: add proper checks for ifnum validity
2020-10-01 09:22:28 +02:00
Vincent Dupont
590f07b38a
stm32/can: fix features dependency
2020-09-30 12:59:03 +02:00
40262c1b7a
cpu/stm32: reorganize Kconfig files per families
2020-09-30 10:31:38 +02:00
1e6a336227
cpu/stm32/Kconfig: move features declared in models to lines
2020-09-30 10:31:29 +02:00
8738bd5e5c
cpu/stm32: select lines from models in Kconfig
2020-09-30 10:31:29 +02:00
d1bab4a25f
cpu/stm32: add Kconfig config for all cpu lines
2020-09-30 10:31:29 +02:00
ba4edb3c63
cpu/stm32: split main Kconfig
2020-09-30 10:31:29 +02:00
e8c79e7a41
cpu/stm32: extend CPU_LINES for G4 and L1
2020-09-30 10:31:29 +02:00
cada451383
cpu/stm32: document info extracted from CPU model name
2020-09-30 10:31:28 +02:00
d407878bc5
Merge pull request #15112 from aabadie/pr/boards/nucleo64-g431kb
...
boards/nucleo-g431rb: add initial support
2020-09-29 15:26:39 +02:00
Francisco
109012b194
Merge pull request #14923 from aabadie/pr/boards/stm32f0f1f3_clock_kconfig
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boards/stm32f1/f3: rework clock initialization and configuration
2020-09-29 14:30:58 +02:00
ef742cddb2
cpu/stm32: add support for stm32g431rb
2020-09-29 12:26:26 +02:00
2c6693d68e
Merge pull request #14863 from hugueslarrive/nucleo-f302r8
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boards/nucleo-f302r8: add ADC feature
2020-09-29 10:45:40 +02:00
2d80bbf7b9
Merge pull request #15109 from aabadie/pr/make/features_bootloader_stm32_cleanup
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cpu/stm32: cleanup bootloader_stm32 build system management
2020-09-29 10:45:27 +02:00
ef864bba39
cpu/stm32: only build bootloader when the module is loaded
2020-09-28 21:07:01 +02:00
1259a89acf
cpu/stm32: remove useless bootloader dependency resolution
2020-09-28 21:07:01 +02:00
42728db45b
cpu/stm32: fix logical bug when getting l0/g0 CPU_CORE
2020-09-28 17:04:54 +02:00
hugues
9c41e25fff
cpu/stm32/periph/adc_f3: fix for devices which have only one ADC
2020-09-28 10:29:53 +02:00
84f1a70b7f
cpu/stm32/rtt: adapt for stm32g0
2020-09-25 15:20:14 +02:00
25e1fec90c
cpu/stm32: add support for stm32g071rb
2020-09-25 13:08:07 +02:00
da9168c652
cpu/stm32: rename stmclk_fx to stmclk_f2f4f7
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This commit also removes all f0/f1/f3 specific code from this file
2020-09-24 11:27:24 +02:00
042a550f0d
boards: cpu: stm32f1/f3: rework clock configuration and init
2020-09-24 11:27:24 +02:00
c14d7ec7db
cpu/stm32l0l1: refactor clock initialization sequence
2020-09-22 22:30:20 +02:00
425a2f69a2
cpu/stm32l0l1: ensure PLL is enabled when required
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PLL is required for the 48MHz output used by HWRNG and also when it's used as system clock
2020-09-22 22:30:20 +02:00
8ac1909ea3
cpu: boards: stm32l0l1: use IS_ACTIVE where possible in stmclk
2020-09-22 22:30:19 +02:00
23117a844e
boards: cpu: stm32l0: rework clock configuration
2020-09-22 22:30:19 +02:00
Francisco
6a826555cf
Merge pull request #14877 from maribu/stm32-eth-fix
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cpu/stm32/periph/eth: Fix transmission bug
2020-09-16 14:30:44 +02:00
Benjamin Valentin
d9116684e5
cpu/cortexm_common: advertise puf_sram feature
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`puf_sram` is a feature of the linker script, it does not need vendor
specific hardware support.
2020-09-11 16:30:45 +02:00
4e235b8e76
cpu/stm32l4wb: fix APBx bitfields for divider factor 2
2020-09-09 15:59:38 +02:00
Francisco
adb0bcab47
Merge pull request #14866 from aabadie/pr/boards/stm32l4wb_clock_kconfig
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boards: cpu: stm32l4/wb: rework clock configuration and initialization
2020-09-09 09:35:29 +02:00
9dd20c0ccb
cpu: boards: stm32l4/wb: use IS_USED for clock where possible
2020-09-08 18:42:42 +02:00
0745cc4a99
cpu: boards: smt32l4: rework clock configuration
2020-09-08 18:42:41 +02:00
7c923da0c8
cpu/stm32: split f0 clock initialization in separate file
2020-09-08 16:03:44 +02:00
ec2e1a15f9
cpu/stm32: move cmsis package Makefile to stm32 cpu
2020-09-02 11:30:49 +02:00
91c9b8c1b0
cpu/stm32: remove hardcoded CPU_IRQ_NUMOF defines
2020-09-02 11:30:49 +02:00
0da196d98d
cpu/stm32: handle generated irqs.h in build system
2020-09-02 11:30:49 +02:00
39d95b1950
cpu/stm32: add tool to generate a header with IRQ numof defines
2020-09-02 11:30:49 +02:00
6cd6d5948f
cpu/stm32/vectors: remove hand crafted vectors_<fam>.c files
2020-09-02 11:30:49 +02:00
29b2a7aec1
cpu/stm32: integrate use of vectors generator in build system
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The cmsis package is not added as a dependency but used directly before generating the vectors.c file
2020-09-02 11:30:49 +02:00
96ad6e9b84
cpu/stm32/vectors: ignore generated vectors C files
2020-09-02 11:30:48 +02:00