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mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00
Commit Graph

32 Commits

Author SHA1 Message Date
Joshua DeWeese
1e4526111f cpu/stm32: moved includes out of header where not used 2024-03-21 11:02:29 -04:00
Joshua DeWeese
fd105b7e77 cpu/stm32: remove redundant conditional compile
This patch removes a largely redundant block of conditional includes.

The removed includes are moved into the family specific headers so that
the more specific headers may override defaults defined in the shared
headers.
2024-03-20 11:29:25 -04:00
Jason Parker
b5d72d8242 cpu/stm32: add CPU_FAM_STM32C0 support 2024-01-29 14:44:10 -05:00
Gunar Schorcht
337a63ecb5 cpu/stm32/periph: add SDMMC support for F2/F4/F7/L4 2023-12-21 18:37:43 +01:00
MrKevinWeiss
641d539092
cpu/stm: Fix clock settings F303* 2022-11-03 11:37:31 +01:00
MrKevinWeiss
17cce015d4
treewide/stm32: Make CLOCK_HS* configurable 2022-11-03 11:37:28 +01:00
Gunar Schorcht
76848492b0 cpu/stm32: add tinyUSB package support 2022-09-30 19:05:51 +02:00
Jean-Pierre De Jesus DIAZ
d64bbdffe5
cpu/stm32: Fix CLOCK_CORECLOCK on stm32l0/l1
With the previous order of the operation there was a loss of precision
when using certain values as the divider
2022-03-01 17:11:16 +01:00
MrKevinWeiss
58097a20aa
cpu/stm32: clk tree account for 16 MHz 2022-02-10 13:27:50 +01:00
2f0efa8c9e
cpu/stm32: add initial support for stm32u5 family 2021-12-23 11:04:41 +01:00
Jean-Pierre De Jesus DIAZ
9d1cff3b55 cpu/stm32: fix doxygen grouping warnings
Signed-off-by: Jean-Pierre De Jesus DIAZ <me@jeandudey.tech>
2021-09-05 20:39:15 +02:00
Jan Romann
4384795cb9
treewide: Remove excessive newlines 2021-08-13 19:50:38 +02:00
Akshai M
fd8ddd6161 boards: add nucleo-wl55jc
Co-authored-by: Kevin "Tristate Tom" Weiss <weiss.kevin604@gmail.com>
2021-04-20 21:04:29 +02:00
Akshai M
c485c774cf cpu/stm32: add stm32wl 2021-04-20 20:57:48 +02:00
5fef40ab5a
cpu/stm32/clk: cleanup common clock configuration 2021-01-25 11:46:35 +01:00
dfed1b0567
cpu/stm32: merge g0 and g4 clock configuration headers 2021-01-25 11:46:34 +01:00
0aadf367cc
cpu/stm32: rework common clock source selection header 2021-01-25 11:46:34 +01:00
048e8446ef
cpu/stm32f0: remove old clock configuration header 2020-12-17 08:38:40 +01:00
45c2b19f25
cpu/stm32: merge f0f1f3 clock configuration headers 2020-12-17 08:38:40 +01:00
c68f63b318
cpu/stm32f1f3: handle custom pll prediv/mul at cpu level 2020-12-08 17:36:52 +01:00
b0b19203a7
Merge pull request #15190 from benpicco/boards/wefun-f401cc
boards/common/weact-f4x1cx: create common WeAct boards
2020-12-01 12:03:38 +01:00
Leandro Lanzieri
5a04f94b63
Merge pull request #14967 from aabadie/pr/boards/stm32f0_clock_kconfig_only
boards/stm32f0: add Kconfig for clock configuration
2020-11-17 12:14:10 +01:00
Gilles DOFFE
2ac0467807 cpu/stm32: configure timer2 for stm32mp1 boards
This timer will be used by RIOT-OS as the scheduling timer for
stm32mp157c-dk2 board.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
9d13c07e92
cpu/stm32f0: handle custom pll prediv/mul at cpu level 2020-11-10 15:55:38 +01:00
2f2622c76f
cpu/stm32: move stm32l5 default PLL N to cpu 2020-11-10 09:34:07 +01:00
36d33d38f7
cpu/stm32: move stm32l4+ default PLL N to cpu 2020-11-10 09:34:07 +01:00
934028c114
cpu/stm32: fix l4l5wb clock configuration
Default values were wrong for WB when using HSE 32MHz as PLL input source
Default PLL input source was wrong when not using HSE and the board
provides an HSE
2020-11-10 09:34:07 +01:00
Benjamin Valentin
a90016740c cpu/stm32/clk/f2f4f7: add config for 25 MHz HSE 2020-11-05 15:46:11 +01:00
ec5b47fc61
cpu/stm32l4+/wb: centralize max core clock define, adapt related boards 2020-10-27 08:44:55 +01:00
05f67a0a00
cpu/stm32: remove useless include in clock configuration 2020-10-26 11:21:07 +01:00
d6d85a3370
cpu/stm32: add common clock configuration header 2020-10-26 11:21:07 +01:00
f2e2c89424
cpu/stm32: move clock configuration headers to cpu 2020-10-26 11:16:23 +01:00