Alexandre Abadie 9d13c07e92 cpu/stm32f0: handle custom pll prediv/mul at cpu level		2020-11-10 15:55:38 +01:00
..
f0	cpu/stm32f0: handle custom pll prediv/mul at cpu level	2020-11-10 15:55:38 +01:00
f1f3	cpu/stm32: remove useless include in clock configuration	2020-10-26 11:21:07 +01:00
f2f4f7
g0	cpu/stm32: remove useless include in clock configuration	2020-10-26 11:21:07 +01:00
g4	cpu/stm32: remove useless include in clock configuration	2020-10-26 11:21:07 +01:00
l0l1
l4l5wb	cpu/stm32: move stm32l5 default PLL N to cpu	2020-11-10 09:34:07 +01:00
clk_conf.h	cpu/stm32l4+/wb: centralize max core clock define, adapt related boards	2020-10-27 08:44:55 +01:00