`thread_measure_stack_free()` previously assumed that reading past the
stack is safe. When the stack was indeed part of a thread, the
`thread_t` structure is put after the stack, increasing the odds of
this assumption to hold. However, `thread_measure_stack_free()` could
also be used on the ISR stack, which may be allocated at the end of
SRAM.
A second parameter had to be added to indicate the stack size, so that
reading past the stack can now be prevented.
This also makes valgrind happy on `native`/`native64`.
This changes a bunch of things that allows building with the musl C lib,
provided that `libucontext-dev` and `pkg-config` are installed.
Note that installing libucontext makes absolutely zero sense on C libs
that do natively provide this deprecated System V API, such as glibc.
Hence, it no sane glibc setup is expected to ever have libucontext
installed.
A main pain point was that argv and argc are expected to be passed to
init_fini handlers, but that is actually a glibc extension. This just
parses `/proc/self/cmdline` by hand to populate argv and argc during
startup, unless running on glibc.
Following best practice, this patch adds the module's header as its
first include. Resulting compiler errors are also fixed by adding the
header's missing include of cpu_conf.h.
This gets rid of a long list of boards with network interfaces and
instead let's boards (or MCUs with peripheral network interfaces)
provide the netif feature.
The apps that before used the long list are not depending on the
feature instead (in case of the default example, this is an
optional dependency).
Co-authored-by: mguetschow <mikolai.guetschow@tu-dresden.de>
Co-authored-by: mewen.berthelot <mewen.berthelot@orange.com>
This patch allows boards to select a max ADC clock speed. This could be
handy if the board wants to clock the ADC differently according to the
board's front end analog circuitry or MCU model's ADC capabilities.
- `printf "%d" ""` triggers an "invalid number" warning on ash, so
let's use `0` as portable default for zero
- add quotes where needed to make shellcheck happy
- `gpio_ll_toggle()` now is race-free
- avoid using a look up table but branch to the two different registers
in the `gpio_ll*()` functions
- in most cases the GPIO port is a compile time constant and the
dead branch is eliminated by the optimizer, making this vastly
more efficient
- some MCUs do only have a single port, in which case
`GPIO_PORT_NUM(port)` is known to return `0` even if `port` is
not known, resulting in one of the branch being eliminated as
dead branch no matter what
- in case it really is unknown at compile time which port to work
on, the branch can still be implemented efficiently by the
compiler e.g. using a conditional move; likely more efficient
than fetching a value from the look up table.
This implements `pm_set_lowest()` for the MSP430. Unlike most other
platforms, it intentionally does not use pm_layered. It is pretty
similar to `pm_layered` in that is does use reference counters, but it
uses them for two independent clock sources.
The main difference is that the low frequency clock domain can be
disabled even when the high frequency clock is still active. With the
layers, disabling layer n-1 while layer n is still blocked would not
work.
For super low symbol rates the auxiliary clock (ACLK) is used to
conserve power. But with only 32,678 Hz clock just prescaling will
result in poor bit timing, hence correct modulation control settings
to compensate are needed. Since computing this is too expensive, a
look-up table (as switch statement) for the four most common symbol
rates was used.
The datasheet gave the prescaler values ordered by ascending symbol
rate, the switch statement was ordered descending.
This changes the order to match the datasheets order and matches the
correct prescaler setting to the corresponding symbol rate.
Fixes https://github.com/RIOT-OS/RIOT/issues/20620
Only call this instruction if a debug session is active otherwise it will trigger a hardfault
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
- The validity test for the high frequency crystal did not take
into account the higher range supported by the MSP430 F2xx / G2xx
family. This fixes the issue.
- The CPU family used is exposed to C as `CPU_FAM_<NAME>` macro
- Unused headers where dropped
- The status register is aliased `SR`, so let's use that more readable
name.
In TX-only mode the UART was previously release before all bits of the
last byte were shifted out. This adds a busy loop waiting while the
peripheral is still busy, fixing the issue.
Co-authored-by: benpicco <benpicco@googlemail.com>
The driver assumes that timer A and timer B have the same register
layout regarding all the features exposed by the driver. This is
backed by the MCU family datasheets for the MSP430 x1xx and the
MSP430 G2xx / F2xx MCUs (and likely more families).
The assert() is pretty limited in coverage, but more to document why
a "timer A clear" mask is used but still claiming the driver also
works for timer B. It just looks too much like a bug otherwise.
This block of code inconsistently made use of else-if statments. The
patch makes the use consistent. The change also makes the code a bit
simpler to read.
APB12 is never defined as a macro. It is an element in the bus_t enum.
Therefore, the test to check if it is defined will always fail.
APB12 is not a real bus. It is the second register of the APB1 bus. I am
not aware of any STM32 family where the ABP2 bus is implmented (ie
RCC_APB2ENR_SYSCFGEN is defined) and devices attached to said bus are
enabled via the APB1 second register. For this reason, the fix is to
simply remove the check.
This cleans up the USCI based UART and SPI implementations and allows
multiple instances of either interface to be configured by the
boards. In addition, it allows sharing the USCI peripherals to provide
multiple serial interfaces with the same hardware (round-robin).
