This cleans up the USCI based UART and SPI implementations and allows
multiple instances of either interface to be configured by the
boards. In addition, it allows sharing the USCI peripherals to provide
multiple serial interfaces with the same hardware (round-robin).
The nRF52840DK is an excellent wireless dev board due to the
integrated debugger, the nRF52840-Dongle is missing the debugger and
therefore a suboptimal choice.
The nRF52840-Dongle is cheap and has an excellent form factor that
allows to easily plug it into e.g. an OpenWRT system to quickly provide
a border router. The nRF52840DK is too large and too expensive for that
use case.
It appears that the rows have just been switched by mistake, this
switches them back to be correct.
This fixes compilation issues in `tests/pkg/tinyusb_netdev` with
newer versions of the RISC-V toolchain due to two competing USB
stacks being pulled in. With the older toolchain the build system
warns:
The following features may conflict: periph_usbdev tinyusb_device
But builds fine (even though surprises at runtime are likely). The
newer toolchain takes an issue with the same symbol being linked
in more than once (and more than one instance not being `weak`).
Adds a separate board for native64 instead of the `NATIVE_64BIT` workaround.
The files in `boards/native64` are more or less dummy files and just include
the `boards/native` logic (similar to `openlabs-kw41z-mini-256kib`).
The main logic for native is in `makefiles/arch/native.inc.mk`, `cpu/native`
and `boards/native`.
The remaining changes concern the build system, and change native board checks
to native CPU checks to cover both boards.
Initial version to test 64 bit compatibility.
Instead of a separate board, the inital version for Linux/x86_64 is enabled
by setting the environment variable `NATIVE_64BIT=y` and compiling as usual.
Not currently implemented:
* Architectures other than x86_64 or operating systems other than Linux
* No FreeBSD support
* No Aarch support
* Rust support for x86_64
- Move common code for USART (shared SPI / UART peripheral) to its
own file and allow sharing the USART peripheral to provide both
UART and SPI in round-robin fashion.
- Configure both UART and SPI bus via a `struct` in the board's
`periph_conf.h`
- this allows allocating the two UARTs as needed by the use case
- since both USARTs signals have a fixed connection to a single
GPIO, most configuration is moved to the CPU
- the board now only needs to decide which bus is provided by
which USART
Note: Sharing an USART used as UART requires cooperation from the app:
- If the UART is used in TX-only mode (no RX callback), the driver
will release the USART while not sending
- If the UART is used to also receive, the application needs to power
the UART down while not expecting something to send. An
`spi_acquire()` will be blocked while the UART is powered up.
C has this feature that the order of struct members in the
initialization doesn't need to match the order in the declaration.
C++ has not yet caught up:
boards/common/gd32v/include/cfg_usbdev_default.h:50:1: error: designator order for field 'dwc2_usb_otg_fshs_config_t::type' does not match declaration order in 'const dwc2_usb_otg_fshs_config_t'
So, just reorder the fields for now by hand.
Revision 10199-V1.0 of the board has an incorrect pin labeling on the
silkscreen, presumably because the board was initially developed
for a different E180 module and the silkscreen was not updated when
populated with a different E180 module.
It is very likely that if newer revisions of the test board get
produced, they will use the same very systematical routing as revision
1.0 and only the silkscreen labeling will be fixed. Hence, documenting
the correct pin mapping will be useful even for newer revisions.
The CC2538-CC2592-DK is one of the few readily available and
affordable boards featuring a legacy CC2538 MCU. This should make
maintaining RIOT support for that legacy MCU more affordable :-)
Fix flashing with `MOST_RECENT_PORT=1` by detecting the board when
either in RIOT mode or in bootloader mode (which matches different
USB vendor and model strings).
Support for programming with the nrf52-u2f bootloader was dropped
apparently, but the documentation still recommends that over the
Arduino Bootloader. This brings doc and code in sync.
- add support for multiple timers
- add support for selecting clock source in the board's `periph_conf.h`
- add support for the prescaler
- implement `periph_timer_query_freqs`
- add a second timer to all MSP430 boards
- the first timer is fast ticking, high-power
- the second is slow ticking, low-power
When using `make flash` or `make term` with `MOST_RECENT_PORT=1`, RIOT
should now only consider plausible TTYs and select the most recently
connected one. The filter is a bit broad, though, and will match
any board with a CH430 UART2USB bridge. But depending on the boards
attached, it might be good enough to reliably tell it apart from
other boards.
When using `make flash` or `make term` with `MOST_RECENT_PORT=1`, RIOT
should now only consider plausible TTYs and select the most recently
connected one. The filter is a bit broad, though, and will match
any board with a CH430 USB 2.0 UART2USB bridge. But depending on the
boards attached, it might be good enough to reliably tell it apart from
other boards.
When using `make flash` or `make term` with `MOST_RECENT_PORT=1`, RIOT
should now only consider plausible TTYs and select the most recently
connected one. The filter is a bit broad, though, and will match
any board with a CP2104 USB2UART bridge. But depending on the boards
attached, it might be good enough to reliably tell it apart from other
boards.
When using `make flash` or `make term` with `MOST_RECENT_PORT=1`, RIOT
should now only consider plausible TTYs and select the most recently
connected one. The filter is a bit broad, though, and will match
any board with a CP2102N USB2UART bridge. But depending on the boards
attached, it might be good enough to reliably tell it apart from other
boards.
When using `make flash` or `make term` with `MOST_RECENT_PORT=1`, RIOT
should now only consider plausible TTYs and select the most recently
connected one. The filter is a bit broad, though, and will match
any board with a CP2102 USB2UART bridge. But depending on the boards
attached, it might be good enough to reliably tell it apart from other
boards.
When using `make flash` or `make term` with `MOST_RECENT_PORT=1`, RIOT
should now select relatively robustly the most recently connected
ESP32 Ethernet Kit / ESP32 Wrover Kit board, even with other TTYs
present. This is because the FTDI Dual RS232-HS with two USB2UART
bridges in the chip would be an expensive overkill for most boards,
unless one is using the FTDI chip to big-bang JTAG as well - as done
on the Ethernet Kit and Wrover Kit boards.
The board have one user button and a user led but are not enabled.
This add necessary support to use the button and the led. It include
the configs to use with SAUL and button interrupt.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
- nRF51: Use `uart_conf_t` for consistency with nRF52
- nRF52832: Use UARTE (UART with EasyDMA) over UART (without DMA), as
done for all other nRF52 family members
- use `UARTE_PRESENT` to detect whether an UARTE can be used, rather
than family names
The `SWJ_CFG` field of the `AFIO_MAPR` register is write only and values
read are undefined (random). Hence, using `AFIO->MAPR |= mask;` to
enable flags can corrupt the state of the `SWJ_CFG` (configure it to
an unintended value).
Two helper functions have been introduced:
- `afio_mapr_read()` reads the value, but sanitizes the `SWJ_CFG` field
to zero
- `afio_mapr_write()` writes the given value, but applies the `SWJ_CFG`
configured by the board before writing.
Finally, the `nucleo-f103rb` and `bluepill*`/`blackpill*` boards have
been updated to no longer specify `STM32F1_DISABLE_JTAG`, as this
is handled by the `SWJ_CFG` setting (which defaults to disabling JTAG).
The macro `ARDUINO_SPI_D11D12D13` is used to refer to the SPI bus
on the pins D11/D12/D13 on Arduino UNO compatible boards. For all
Nucleo64 boards this is `SPI_DEV(0)`, but for this board `SPI_DEV(0)`
is internally connected to the radio. Instead `SPI_DEV(1)` is connected
to the correct pins. This provides the macro explicitly in
`periph_conf.h`, which takes preference over the fallback in
`boards/common/nucleo64` when provided.
20003: coap: create typedef for CoAP methods r=benpicco a=benpicco
20028: nanocoap: fix incorrect uses of coap_get_code() r=benpicco a=benpicco
20036: boards/nucleo-l4r5zi : add PWM configuration r=benpicco a=krzysztof-cabaj
### Contribution description
This PR adds to the Nucleo-l4r5zi PWM configuration
### Testing procedure
Flash the board using `tests/periph/pwm` program. Check if you could, for example, change LED
intensity using PWM.
### Issues/PRs references
None.
20041: pkg/littlefs2: bump to v2.8.1 r=benpicco a=bergzand
### Contribution description
Minor version number bump.
### Testing procedure
- Check if I copied the correct commit hash.
- Run the tests.
### Issues/PRs references
None
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Co-authored-by: krzysztof-cabaj <kcabaj@gmail.com>
Co-authored-by: Koen Zandberg <koen@bergzand.net>
20032: boards/nucleo-l552ze: add PWM configuration r=benpicco a=krzysztof-cabaj
### Contribution description
This PR adds to the Nucleo-l552ze-q PWM configuration
### Testing procedure
Flash the board using `tests/periph/pwm` program. Check if you could, for example, change LED
intensity using PWM.
### Issues/PRs references
None.
Co-authored-by: krzysztof-cabaj <kcabaj@gmail.com>
19465: drivers/mtd: use XFA for pointers to defined MTDs r=benpicco a=gschorcht
### Contribution description
This PR provides the support to hold pointers to defined MTDs within a XFA. The XFA allows
- to access MTDs of different types (`mtd_flashpage`, `mtd_sdcard`, `mtd_emulated`, ...) by an index
- to determine the number of MTDs defined in the system.
### Testing procedure
To be defined once PR #19443 is merged because emulated MTDs will allow to test this PR on arbitrary boards.
### Porting Guide
For external boards:
- remove the `MTD_NUMOF` definition from `board.h`
- add `MTD_XFA_ADD(<mtd_dev>, <idx>);` to the definition of `<mtd_dev>`.
- `MTD_0`, `MTD_1`, … defines are no longer needed.
### Issues/PRs references
Related to PR #19443
19981: Fletcher32: Add incremental API r=benpicco a=bergzand
### Contribution description
This PR extends the current fletcher32 checksum with an incremental API mode. This way the bytes to be checksummed can be supplied via multiple successive calls and do not have to be provided in a single consecutive buffer.
I've also rephrased the warning with the original function a bit as that function uses an `unaligned_get_u16` to access the data. The data thus does not require alignment, but the length does need to be supplied as number of 16 bit words.
### Testing procedure
The test has been extended
### Issues/PRs references
None
19995: sys/psa_crypto: Fix macro for public key max size and SE example r=benpicco a=Einhornhool
### Contribution description
#### 1. Wrong public key size when using secure elements, introduced by #19954
Fixed conditions for key size macros in `crypto_sizes.h`.
#### 2. EdDSA and ECDSA examples fail when using a secure element because of unsopported changes introduced by #19954
Updated `example/psa_crypto` to use only supported functions for secure elements.
### Testing procedure
Build `example/psa_crypto` for secure elements and run application
Output on master:
```
2023-10-19 14:33:24,372 # main(): This is RIOT! (Version: 2019.07-devel-22378-gb6772)
2023-10-19 14:33:24,372 # HMAC SHA256 took 56393 us
2023-10-19 14:33:24,372 # Cipher AES 128 took 68826 us
2023-10-19 14:33:24,372 # *** RIOT kernel panic:
2023-10-19 14:33:24,373 # HARD FAULT HANDLER
2023-10-19 14:33:24,373 #
2023-10-19 14:33:24,373 # *** rebooting...
```
Output with fixes:
```
2023-10-19 13:35:24,715 # main(): This is RIOT! (Version: 2019.07-devel-22384-g8ef66-dev/psa-crypto-fixes)
2023-10-19 13:35:24,715 # HMAC SHA256 took 56374 us
2023-10-19 13:35:24,715 # Cipher AES 128 took 68805 us
2023-10-19 13:35:24,715 # ECDSA took 281164 us
2023-10-19 13:35:24,715 # All Done
```
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Koen Zandberg <koen@bergzand.net>
Co-authored-by: Lena Boeckmann <lena.boeckmann@haw-hamburg.de>
19943: cpu/stm32: FMC used for low-level LCD parallel interface r=maribu a=gschorcht
### Contribution description
This PR provides the implementation of the LCD low-level MCU 8080 parallel interface using the FMC peripheral.
### Testing procedure
```
BOARD=stm32f723e-disco make -C tests/drivers/st77xx flash
```
and
```
BOARD=stm32l496g-disco make -C tests/drivers/st77xx flash
```
should work on top of PR #19941. Drawing operations should be much faster.
### Issues/PRs references
Depends on PR #19941
19978: treewide: fix typos to make codespell happy r=maribu a=maribu
### Contribution description
- fixes typos in comments and docs (no generated firmware changes expected)
- fixes a typo in a string in a GUI of a utility program
- add some false positives to the ignore list
### Testing procedure
- No generated binaries (except for the GUI version of the utility program to flash the MSB-A2) should change
- The diff should not look too scary
### Issues/PRs references
None
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@posteo.net>
Either the wiki is down, or the image was removed from upstream. This
replaces it with the same image hosted on the zephyr doc. As a site
effect, code spell likes the new URL much more.
19760: cpu/sam0_common/periph: add low-level SDMMC peripheral driver for SDHC r=benpicco a=gschorcht
### Contribution description
This PR implements the low-level SDIO/SDMMC peripheral driver for SAM0 SDHC according to the definition in #19539.
### Testing procedure
```
BOARD=same54-xpro make -C tests/drivers/sdmmc
```
```
BOARD=same54-xpro make -C tests/sys/vfs_default
```
### Issues/PRs references
~Depends on PR #19539~
Depends on PR #19899
19946: posix_sockets.c: Fix 2 byte int compilation errors r=benpicco a=mrdeep1
19956: cpu/esp32: fix heap definition for ESP32-S2 and ESP32-S3 r=benpicco a=gschorcht
### Contribution description
For ESP32-S2 and ESP32-S3 the symbol `_heap_end` must not be used as `_eheap` for the newlibc `malloc` and function `sbrk`.
`_heap_end` is used by the ESP-IDF heap implementation `esp-idf-heap` and points to the highest possible address (0x40000000) that could be used for the heap in ESP-IDF. It doesn't point to the top address of the unused SRAM area that can be used in newlibc `malloc` and function `sbrk`. Instead, the origin and the length of `dram0_0_seg` must be used to calculate the end of the heap `_eheap`.
The problem only occurs for the newlibc `malloc` when the `sbrk` function is used but not for the ESP-IDF heap implementation `esp_idf_heap`.
### Testing procedure
Use any ESP32-S2 or ESP32-S3 board and flash `tests/sys/malloc`, e.g.
```
CFLAGS='-DCHUNK_SIZE=16384' USEMODULE='stdio_uart' BOARD=esp32s3-pros3 make -j8 -C tests/sys/malloc flash
```
Without the PR the `nm` command will give the wrong address
```
nm -s tests/sys/malloc/bin/esp32s3-pros3/tests_malloc.elf | grep _eheap
40000000 A _eheap
```
The test will stuck, i.e. the allocation of memory stops when the top of unused SRAM is reached and the board restarts when the watchdog timer expires. With the PR it should work as expected
```
Help: Press s to start test, r to print it is ready
START
main(): This is RIOT! (Version: 2023.10-devel-309-g4669e)
calloc(zu, zu) = 0x10000000
CHUNK_SIZE: 16384
NUMBER_OF_TESTS: 3
Allocated 16384 Bytes at 0x3fc8c4b0, total 16384
...
Allocated 16384 Bytes at 0x3fcec6f0, total 409792
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x7 (TG0WDT_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x403763e3
```
With this PR the `nm` command should give a address in unused SRAM address space
```
nm -s tests/sys/malloc/bin/esp32s3-pros3/tests_malloc.elf | grep _eheap
3fcca000 A _eheap
```
and the test should pass.
### Issues/PRs references
19957: cpu/esp32: fix Octal SPI RAM for ESP32-S3 r=benpicco a=gschorcht
### Contribution description
This PR fixes Octal SPI RAM handling for ESP32-S3.
Functions that are used during the initialization of the Octal SPI RAM must reside in IRAM instead of Flash. Otherwise, the system stucks during boot once the Octal SPI RAM is enabled. The reason is that the Flash is not available during the initialization of the Octal SPI RAM and the functions that are called during that initialization can't be accessed in Flash. As a result the call of such a function leads to code that is messed up and the system crashes.
The PR also includes the documentation fixe for the `esp32s3-box`. It also includes a small documentation fix regarding the SPI RAM for the `esp32s3-pros3` board.
### Testing procedure
Use a board that has Octal SPI RAM and flash `tests/sys/malloc`, e.g.:
```
CFLAGS='-DCHUNK_SIZE=16384' USEMODULE='stdio_uart esp_spi_ram esp_log_startup' \
BOARD=esp32s3-box make -C tests/sys/malloc
```
Without the PR, the system stuck during boot once the information for the Octal SPI RAM is print
```
ESP-ROM:esp32s3-20210327
...
I (133) boot: Loaded app from partition at offset 0x10000
I (134) boot: Disabling RNG early entropy source...
vendor id : 0x0d (AP)
dev id : 0x02 (generation 3)
density : 0x03 (64 Mbit)
good-die : 0x01 (Pass)
Latency : 0x01 (Fixed)
VCC : 0x01 (3V)
SRF : 0x01 (Fast Refresh)
BurstType : 0x01 (Hybrid Wrap)
BurstLen : 0x01 (32 Byte)
Readlatency : 0x02 (10 cycles@Fixed)
DriveStrength: 0x00 (1/1)
```
and the board restarts when the watchdog timer expires.
With this PR, the system starts as expected.
```
ESP-ROM:esp32s3-20210327
...
I (132) boot: Loaded app from partition at offset 0x10000
I (133) boot: Disabling RNG early entropy source...
vendor id : 0x0d (AP)
dev id : 0x02 (generation 3)
density : 0x03 (64 Mbit)
good-die : 0x01 (Pass)
Latency : 0x01 (Fixed)
VCC : 0x01 (3V)
SRF : 0x01 (Fast Refresh)
BurstType : 0x01 (Hybrid Wrap)
BurstLen : 0x01 (32 Byte)
Readlatency : 0x02 (10 cycles@Fixed)
DriveStrength: 0x00 (1/1)
Found 64MBit SPI RAM device
SPI RAM mode: sram 40m
PSRAM initialized, cache is in normal (1-core) mode.
Pro cpu up.
Single core mode
SPI SRAM memory test OK
Initializing. RAM available for dynamic allocation:
At 3FC8C150 len 00053EB0 (335 KiB): D/IRAM
At 3FCE0000 len 0000EE34 (59 KiB): STACK/DRAM
At 3FCF0000 len 00008000 (32 KiB): DRAM
Starting ESP32x with ID: f412fafd0f8c
ESP-IDF SDK Version v4.4.1
Current clocks in Hz: CPU=80000000 APB=80000000 XTAL=40000000 SLOW=150000
PRO cpu is up (single core mode, only PRO cpu is used)
PRO cpu starts user code
Adding pool of 8192K of external SPI memory to heap allocator
Used clocks in Hz: CPU=80000000 APB=80000000 XTAL=40000000 FAST=8000000 SLOW=150000
XTAL calibration value: 3643448
Heap free: 8754851 bytes
Board configuration:
UART_DEV(0) txd=43 rxd=44
LED pins=[ ]
BUTTONS pins=[ 0 ]
Starting RIOT kernel on PRO cpu
Help: Press s to start test, r to print it is ready
```
### Issues/PRs references
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Jon Shallow <supjps-libcoap@jpshallow.com>
19953: boards/esp32s3-wt32-sc01-plus: fix Kconfig r=aabadie a=gschorcht
### Contribution description
This PR fixes a remaining Kconfig mismatch. It should fix the last compilation problem of the nightly.
### Testing procedure
```
python3 dist/tools/compile_test/compile_like_murdock.py -a tests/drivers/ili9341/ -b esp32s3-wt32-sc01-plus
```
should fail w/o this PR but should succeed with this PR.
### Issues/PRs references
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
19914: boards: complete SD Card MTD definition for several bords r=benpicco a=gschorcht
### Contribution description
This PR completes the MTD definition for the following boards:
- `seeedstudio-gd32`
- `sipeed-longan-nano` including `sipeed-longan-nano-tft`
- `waveshare-nrf52840-eval-kit`
- ESP32x boards that have an SPI SD Card interface and use `mtd_sdcard_default`
### Testing procedure
Green CI
### Issues/PRs references#19465
Prerequisite for PR #19465
19915: drivers/lcd: support MCU 8080 8-bit parallel mode r=benpicco a=gschorcht
### Contribution description
LCD driver ICs usually support
- SPI serial mode,
- MCU 8080 8-bit parallel mode and
- MCU 8080 16-bit parallel mode.
This PR extends the LCD display driver API to support the MCU 8080 8-/16-bit parallel modes and implements a GPIO-driven MCU 8080 8-bit parallel mode.
The following features are already working locally and will be provided as follow-on PRs for which this PR is a prerequisite.
- GPIO-driven bit-banging implementation of the 16-bit mode of the MCU 8080 parallel interface
- Enabling the display on `stm32f723e-disco` and `stm32l496g-disco` using the feature above
- Definition of a low-level API for the parallel modes using the LCD controller of the MCU
- Using FMC for the display on `stm32f723e-disco` and `stm32l496g-disco`
- Using LCD controller for the display of `esp32-wt32-sc01-plus` (PR #19917)
### Testing procedure
The PR can be tested with PR #19917 on top of this PR.
```
BOARD=esp32s3-wt32-sc01-plus make -j8 -C tests/drivers/st77xx flash
```
The following video shows the test.
**Please note** The test is pretty slow because the display has 480 x 320 pixels and the MCU 8080 8-bit parallel interface is realized by a GPIO-driven bit-banging implementation where each GPIO of the data bus is set separately. A follow-up PR will use the ESP32-S3 LCD controller and DMA for this board. This PR just defines the extension of the driver by the parallel interface and provides the bit-banging implementation for MCUs that don't have a LCD controller on chip.
https://github.com/RIOT-OS/RIOT/assets/31932013/c1e3e3d7-05d9-4ca5-8fff-9a5eaca50fba
### Issues/PRs references
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
19919: drivers/st77xx: introduce rotation defines r=benpicco a=gschorcht
### Contribution description
The PR introduces counterclockwise rotations for the definition of parameter `ST77XX_PARAM_ROTATION`.
It is more intuitive and universal to use `ST77XX_ROTATION_{0,90,180,270}` instead of `ST77XX_ROTATION_{ST77XX_ROTATION_{VERT,VERT_FLIP,HORZ,HORZ_FLIP}`, especially because the orientation of the display may vary with respect to the orientation of the board.
### Testing procedure
`tests/drivers/st77xx` should still work, for example:
```
BOARD=adafruit-pybadge make -C tests/drivers/st77xx flash
```
```
BOARD=esp32s3-usb-otg make -j8 -C tests/drivers/st77xx flash
```
### Issues/PRs references
19931: boards: fix documentation for GD32V boards and doxygen 1.9.4 r=benpicco a=gschorcht
### Contribution description
This PR fixes some small problems in documentation of `sipeed-longan-nano`, `sipeed-longan-nano-tft` and `seeedstudio-gd32` for doxygen 1.9.4 that is used on `doc.riot-os.org`.
Doxygen version 1.9.4 doesn't like anymore
- single double quotes as symbol for the inches unit in the text
- line breaks in `[]()` to avoid exhausting the 100 characters per line.
See https://doc.riot-os.org/group__boards__sipeed__longan__nano.html for example.
Doxygen 1.9.1 which is part of `riot-docker` container didn't have theses problems 😟
### Testing procedure
Documentation should be fixed.
### Issues/PRs references
19935: boards/nucleo64: fix SPI Arduino mapping for most boards r=benpicco a=maribu
### Contribution description
Before, the Arduino SPI mapping for all Nucleo-64 boards was incorrect. With this, the situation improves to the following:
- [x] nucleo-f030r8
- [ ] nucleo-f070rb
- No SPI buses provided.
- [x] nucleo-f072rb
- [x] nucleo-f091rc
- [x] nucleo-f103rb
- [ ] nucleo-f302r8
- No SPI bus at D11, D12, D13 provided
- [x] nucleo-f303re
- [x] nucleo-f334r8
- [x] nucleo-f401re
- [x] nucleo-f410rb
- [x] nucleo-f411re
- [x] nucleo-f446re
- [x] nucleo-g070rb
- [x] nucleo-g071rb
- [x] nucleo-g431rb
- [x] nucleo-g474re
- [x] nucleo-l053r8
- [x] nucleo-l073rz
- [x] nucleo-l152re
- No SPI bus at D11, D12, D13 provided
- [x] nucleo-l452re
- [x] nucleo-l476rg
- [x] nucleo-wl55jc
The remaining offenders still need to be fixed, but that is better done one PR at a time.
### Testing procedure
- Check if the SPI device provided in the given `boards/<BOARD_NAME>/incude/periph_conf.h` is indeed `SPI_DEV(0)`, or in `periph_conf.h` the correct SPI dev is found
- this should be fine for all boards above, except for the unchecked ones
or:
- run https://github.com/RIOT-OS/RIOT/pull/19932: The SPI test should pass now
### Issues/PRs references
Bug found in https://github.com/RIOT-OS/RIOT/pull/19932#issuecomment-1726305437
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@posteo.net>
The pins P5.2, P5.1, P5.3 configured as SPI pins are only routed to
USART1 and not to USART0, but previously USART0 was configured as
peripheral backing the bus. This fixes the peripheral configuration by
changing it to USART1.
This is quite unfortunate as USART1 is also used to provide the UART
interface used for `stdio`. Hence, one can either use `stdio` or SPI.
A feature conflict between UART and SPI has therefore been added.
Note that while it would be possible to use P3.2, P3.1, P3.3 to provide
SPI with USART0, this would not work in practise: P3.1 and P3.3 are
connected to the CC1020 transceiver.
Switching to P3.4/P3.5 for UART to provide it using USART 0 would also
resolve the resource conflict. However, these pins are not available
via any of the header and would require soldering the UART<->USB
adapter directly to the pins of the MCU chip on the PCB. It is therefore
much more user friendly to keep the UART bus backed by USART1 to use
pins P3.6 and P3.7 that are easily accessible via the pin header.
19825: drivers: rename st7735 to more generic st77xx r=aabadie a=gschorcht
### Contribution description
This PR provides the following changes:
- renames the driver `st7735` to `st77xx`
- renames the test `st7735` to `st77xx`
- models controller variants as pseudomodules `st7735`, `st7789` and `st7796`
- removes the buggy initialization as a workaround to use reset defaults, see issue #19818
- adds backward compatibility header files for `ST7735_PARAM_*` symbols
- adds a test board for compilation test of backward compatibility
- updates the corresponding board definitions
The PR should solve the remaining dependency issues in KConfig we had by using `st7735` module for different controller variants. The backward compatibility header files should work for boards that still use `ST7735_PARAM_*` in their board definitions so that the board defintions at user's side use shouldn't be affected.
~To be compilable, the PR includes PR #19824.~
### Testing procedure
- Green CI
- `tests/drivers/disp_dev` and `tests/drivers/st77xx` should still work for all boards using a ST77xx display.
- The PR was already tested for these tests for:
- [x] `adafruit-pybadge`
- [x] `esp32s2-lilygo-ttgo-t8`
- [x] `esp32s3-usb-otg`
- [x] `sipeed-longan-nano`
### Issues/PRs references
Workaround for issue #19818
Preqruisite for PR #19827
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
19910: boards/stm32f469i-disco: enable FMC with SDRAM support r=aabadie a=gschorcht
### Contribution description
This PR enables the FMC support on the `stm32f469i-disco` board and the on-board SDRAM ISSI IS42S32400F-6BL with 16 MByte.
### Testing procedure
1. `tests/periph/fmc` should succeed, just compile and flash the app with
```
BOARD=stm32f469i-disco make -C tests/periph/fmc flash term
```
2. `tests/sys/malloc` should also use the SDRAM. Use
```
USEMODULE=periph_fmc_sdram CFLAGS='-DCHUNK_SIZE=131072' \
BOARD=stm32f469i-disco make -C tests/sys/malloc flash term
```
and check that the heap also uses the memory in the range from `0xc0000000` to `0xc0fffffff`.
### Issues/PRs references
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
18547: sys: PSA Crypto API implementation r=MrKevinWeiss a=Einhornhool
### Contribution description
This adds an implementation of the ARM [PSA Crypto API](https://armmbed.github.io/mbed-crypto/html/index.html) specification to RIOT.
It is a cryptographic API that supports software and hardware backends as well as the use of multiple secure elements, which can be configured with Kconfig.
It integrates indirect, identifier based key management to support persistent storage of key material in local memory and devices with protected key storage.
A description of the implementation design and an evaluation of the processing time and memory overhead in RIOT has been published here: [Usable Security for an IoT OS: Integrating the Zoo of Embedded Crypto Components Below a Common API](https://arxiv.org/abs/2208.09281)
#### Implementation status
So far this implementation supports the following operations:
- Volatile key storage
- AES in CBC mode
- Hashes (MD5, SHA1, SHA224, SHA256)
- HMAC SHA256
- ECDSA with NIST P192 and P256 curves
The following backends are supported so far:
- RIOT Cipher Module
- RIOT Hash Module
- Micro ECC library package
- Cryptocell 310 hardware accelerator on the Nordic NRF52840dk
- Microchip ATECC608A secure element
Other operations and backends as well as persistent key storage can and will be implemented by me and anyone who wants to contribute in the future.
### Testing procedure
So far there is a show case application in `examples/psa_crypto` to demonstrate the usage and configuration of different backends of the API (refer to the application README for more information).
Co-authored-by: Lena Boeckmann <lena.boeckmann@haw-hamburg.de>
19851: boards/stm32f769i-disco: enable FMC with SDRAM support r=aabadie a=gschorcht
### Contribution description
This PR enables the FMC support on the `stm32f769i-disco` board and the on-board SDRAM MT48LC4M32B2B5-6A with 16 MByte.
The PR also includes a very small documentation fix for the `stm32f746g-disco` board (commit
f761e2d616c861e4857563bae26152bc1f1699d7) and removes double empy line in the test app `tests/periph/fmc`.
### Testing procedure
1. `tests/periph/fmc` should succeed, just compile and flash the app with
```
BOARD=stm32f769i-disco make -C tests/periph/fmc flash term
```
2. `tests/sys/malloc` should also use the SDRAM. Use
```
USEMODULE=periph_fmc_sdram CFLAGS='-DCHUNK_SIZE=131072' \
BOARD=stm32f769i-disco make -C tests/sys/malloc flash term
```
and check that the heap also uses the memory in the range from `0xc0000000` to `0xc0fffffff`.
**UPDATE:** Tested with a `stm32f769i-disco` board.
<details>
<summary>Output from <b>tests/periph/fmc</b></summary>
```
Help: Press s to start test, r to print it is ready
START
main(): This is RIOT! (Version: 2023.10-devel-88-gdcecc-boards/stm32f769i_disco_fmc)
FMC HCLK freq 216 MHz
8-bit data `@0xc0000000,` 16-bit data `@0xc0000100,` 32-bit data `@0xc0ffff00`
------------------------------------------------------------------------
C0000000 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
C0000010 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F
C0000020 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F
C0000030 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F
C0000040 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
C0000050 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F
C0000060 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F
C0000070 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F
C0000080 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F
C0000090 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F
C00000A0 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF
C00000B0 B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF
C00000C0 C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF
C00000D0 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF
C00000E0 E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF
C00000F0 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF
------------------------------------------------------------------------
C0000100 00 80 01 81 02 82 03 83 04 84 05 85 06 86 07 87
C0000110 08 88 09 89 0A 8A 0B 8B 0C 8C 0D 8D 0E 8E 0F 8F
C0000120 10 90 11 91 12 92 13 93 14 94 15 95 16 96 17 97
C0000130 18 98 19 99 1A 9A 1B 9B 1C 9C 1D 9D 1E 9E 1F 9F
C0000140 20 A0 21 A1 22 A2 23 A3 24 A4 25 A5 26 A6 27 A7
C0000150 28 A8 29 A9 2A AA 2B AB 2C AC 2D AD 2E AE 2F AF
C0000160 30 B0 31 B1 32 B2 33 B3 34 B4 35 B5 36 B6 37 B7
C0000170 38 B8 39 B9 3A BA 3B BB 3C BC 3D BD 3E BE 3F BF
C0000180 40 C0 41 C1 42 C2 43 C3 44 C4 45 C5 46 C6 47 C7
C0000190 48 C8 49 C9 4A CA 4B CB 4C CC 4D CD 4E CE 4F CF
C00001A0 50 D0 51 D1 52 D2 53 D3 54 D4 55 D5 56 D6 57 D7
C00001B0 58 D8 59 D9 5A DA 5B DB 5C DC 5D DD 5E DE 5F DF
C00001C0 60 E0 61 E1 62 E2 63 E3 64 E4 65 E5 66 E6 67 E7
C00001D0 68 E8 69 E9 6A EA 6B EB 6C EC 6D ED 6E EE 6F EF
C00001E0 70 F0 71 F1 72 F2 73 F3 74 F4 75 F5 76 F6 77 F7
C00001F0 78 F8 79 F9 7A FA 7B FB 7C FC 7D FD 7E FE 7F FF
------------------------------------------------------------------------
C0FFFF00 00 40 80 C0 01 41 81 C1 02 42 82 C2 03 43 83 C3
C0FFFF10 04 44 84 C4 05 45 85 C5 06 46 86 C6 07 47 87 C7
C0FFFF20 08 48 88 C8 09 49 89 C9 0A 4A 8A CA 0B 4B 8B CB
C0FFFF30 0C 4C 8C CC 0D 4D 8D CD 0E 4E 8E CE 0F 4F 8F CF
C0FFFF40 10 50 90 D0 11 51 91 D1 12 52 92 D2 13 53 93 D3
C0FFFF50 14 54 94 D4 15 55 95 D5 16 56 96 D6 17 57 97 D7
C0FFFF60 18 58 98 D8 19 59 99 D9 1A 5A 9A DA 1B 5B 9B DB
C0FFFF70 1C 5C 9C DC 1D 5D 9D DD 1E 5E 9E DE 1F 5F 9F DF
C0FFFF80 20 60 A0 E0 21 61 A1 E1 22 62 A2 E2 23 63 A3 E3
C0FFFF90 24 64 A4 E4 25 65 A5 E5 26 66 A6 E6 27 67 A7 E7
C0FFFFA0 28 68 A8 E8 29 69 A9 E9 2A 6A AA EA 2B 6B AB EB
C0FFFFB0 2C 6C AC EC 2D 6D AD ED 2E 6E AE EE 2F 6F AF EF
C0FFFFC0 30 70 B0 F0 31 71 B1 F1 32 72 B2 F2 33 73 B3 F3
C0FFFFD0 34 74 B4 F4 35 75 B5 F5 36 76 B6 F6 37 77 B7 F7
C0FFFFE0 38 78 B8 F8 39 79 B9 F9 3A 7A BA FA 3B 7B BB FB
C0FFFFF0 3C 7C BC FC 3D 7D BD FD 3E 7E BE FE 3F 7F BF FF
------------------------------------------------------------------------
fill complete memory of 16384 kByte, a . represents a 16 kByte block
................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
ready
check memory content, a + represents one 16 kByte block of matching data
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
ready
------------------------------------------------------------------------
Doing some benchmarks
write 8 bit: 233018us --- 0.013us per call --- 71999656 calls per sec
write 16 bit: 116510us --- 0.013us per call --- 71999038 calls per sec
write 32 bit: 563125us --- 0.134us per call --- 7448264 calls per sec
read 8 bit: 900066us --- 0.053us per call --- 18639984 calls per sec
read 16 bit: 1165181us --- 0.138us per call --- 7199403 calls per sec
read 32 bit: 225729us --- 0.053us per call --- 18581148 calls per sec
ready
------------------------------------------------------------------------
print first and last memory block after benchmark, should be 0xaa
C0000000 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0000010 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0000020 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0000030 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0000040 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0000050 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0000060 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0000070 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0000080 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0000090 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C00000A0 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C00000B0 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C00000C0 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C00000D0 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C00000E0 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C00000F0 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFF00 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFF10 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFF20 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFF30 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFF40 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFF50 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFF60 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFF70 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFF80 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFF90 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFFA0 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFFB0 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFFC0 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFFD0 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFFE0 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
C0FFFFF0 AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA AA
------------------------------------------------------------------------
[SUCCESS]
{ "threads": [{ "name": "main", "stack_size": 1536, "stack_used": 412}]}
```
</details>
<details>
<summary>Output from <b>tests/sys/malloc</b></summary>
```
Help: Press s to start test, r to print it is ready
START
main(): This is RIOT! (Version: 2023.10-devel-88-gdcecc-boards/stm32f769i_disco_fmc)
calloc(zu, zu) = 0x10000000
CHUNK_SIZE: 131072
NUMBER_OF_TESTS: 3
Allocated 131072 Bytes at 0x200013a8, total 131072
Allocated 131072 Bytes at 0x200213c0, total 262152
Allocated 131072 Bytes at 0x200413d8, total 393232
Allocated 131072 Bytes at 0xc0000008, total 524312
Allocated 131072 Bytes at 0xc0020010, total 655392
Allocated 131072 Bytes at 0xc0040018, total 786472
Allocated 131072 Bytes at 0xc0060020, total 917552
Allocated 131072 Bytes at 0xc0080028, total 1048632
Allocated 131072 Bytes at 0xc00a0030, total 1179712
Allocated 131072 Bytes at 0xc00c0038, total 1310792
Allocated 131072 Bytes at 0xc00e0040, total 1441872
Allocated 131072 Bytes at 0xc0100048, total 1572952
Allocated 131072 Bytes at 0xc0120050, total 1704032
Allocated 131072 Bytes at 0xc0140058, total 1835112
Allocated 131072 Bytes at 0xc0160060, total 1966192
Allocated 131072 Bytes at 0xc0180068, total 2097272
Allocated 131072 Bytes at 0xc01a0070, total 2228352
Allocated 131072 Bytes at 0xc01c0078, total 2359432
Allocated 131072 Bytes at 0xc01e0080, total 2490512
Allocated 131072 Bytes at 0xc0200088, total 2621592
Allocated 131072 Bytes at 0xc0220090, total 2752672
Allocated 131072 Bytes at 0xc0240098, total 2883752
Allocated 131072 Bytes at 0xc02600a0, total 3014832
Allocated 131072 Bytes at 0xc02800a8, total 3145912
Allocated 131072 Bytes at 0xc02a00b0, total 3276992
Allocated 131072 Bytes at 0xc02c00b8, total 3408072
Allocated 131072 Bytes at 0xc02e00c0, total 3539152
Allocated 131072 Bytes at 0xc03000c8, total 3670232
Allocated 131072 Bytes at 0xc03200d0, total 3801312
Allocated 131072 Bytes at 0xc03400d8, total 3932392
Allocated 131072 Bytes at 0xc03600e0, total 4063472
Allocated 131072 Bytes at 0xc03800e8, total 4194552
Allocated 131072 Bytes at 0xc03a00f0, total 4325632
Allocated 131072 Bytes at 0xc03c00f8, total 4456712
Allocated 131072 Bytes at 0xc03e0100, total 4587792
Allocated 131072 Bytes at 0xc0400108, total 4718872
Allocated 131072 Bytes at 0xc0420110, total 4849952
Allocated 131072 Bytes at 0xc0440118, total 4981032
Allocated 131072 Bytes at 0xc0460120, total 5112112
Allocated 131072 Bytes at 0xc0480128, total 5243192
Allocated 131072 Bytes at 0xc04a0130, total 5374272
Allocated 131072 Bytes at 0xc04c0138, total 5505352
Allocated 131072 Bytes at 0xc04e0140, total 5636432
Allocated 131072 Bytes at 0xc0500148, total 5767512
Allocated 131072 Bytes at 0xc0520150, total 5898592
Allocated 131072 Bytes at 0xc0540158, total 6029672
Allocated 131072 Bytes at 0xc0560160, total 6160752
Allocated 131072 Bytes at 0xc0580168, total 6291832
Allocated 131072 Bytes at 0xc05a0170, total 6422912
Allocated 131072 Bytes at 0xc05c0178, total 6553992
Allocated 131072 Bytes at 0xc05e0180, total 6685072
Allocated 131072 Bytes at 0xc0600188, total 6816152
Allocated 131072 Bytes at 0xc0620190, total 6947232
Allocated 131072 Bytes at 0xc0640198, total 7078312
Allocated 131072 Bytes at 0xc06601a0, total 7209392
Allocated 131072 Bytes at 0xc06801a8, total 7340472
Allocated 131072 Bytes at 0xc06a01b0, total 7471552
Allocated 131072 Bytes at 0xc06c01b8, total 7602632
Allocated 131072 Bytes at 0xc06e01c0, total 7733712
Allocated 131072 Bytes at 0xc07001c8, total 7864792
Allocated 131072 Bytes at 0xc07201d0, total 7995872
Allocated 131072 Bytes at 0xc07401d8, total 8126952
Allocated 131072 Bytes at 0xc07601e0, total 8258032
Allocated 131072 Bytes at 0xc07801e8, total 8389112
Allocated 131072 Bytes at 0xc07a01f0, total 8520192
Allocated 131072 Bytes at 0xc07c01f8, total 8651272
Allocated 131072 Bytes at 0xc07e0200, total 8782352
Allocated 131072 Bytes at 0xc0800208, total 8913432
Allocated 131072 Bytes at 0xc0820210, total 9044512
Allocated 131072 Bytes at 0xc0840218, total 9175592
Allocated 131072 Bytes at 0xc0860220, total 9306672
Allocated 131072 Bytes at 0xc0880228, total 9437752
Allocated 131072 Bytes at 0xc08a0230, total 9568832
Allocated 131072 Bytes at 0xc08c0238, total 9699912
Allocated 131072 Bytes at 0xc08e0240, total 9830992
Allocated 131072 Bytes at 0xc0900248, total 9962072
Allocated 131072 Bytes at 0xc0920250, total 10093152
Allocated 131072 Bytes at 0xc0940258, total 10224232
Allocated 131072 Bytes at 0xc0960260, total 10355312
Allocated 131072 Bytes at 0xc0980268, total 10486392
Allocated 131072 Bytes at 0xc09a0270, total 10617472
Allocated 131072 Bytes at 0xc09c0278, total 10748552
Allocated 131072 Bytes at 0xc09e0280, total 10879632
Allocated 131072 Bytes at 0xc0a00288, total 11010712
Allocated 131072 Bytes at 0xc0a20290, total 11141792
Allocated 131072 Bytes at 0xc0a40298, total 11272872
Allocated 131072 Bytes at 0xc0a602a0, total 11403952
Allocated 131072 Bytes at 0xc0a802a8, total 11535032
Allocated 131072 Bytes at 0xc0aa02b0, total 11666112
Allocated 131072 Bytes at 0xc0ac02b8, total 11797192
Allocated 131072 Bytes at 0xc0ae02c0, total 11928272
Allocated 131072 Bytes at 0xc0b002c8, total 12059352
Allocated 131072 Bytes at 0xc0b202d0, total 12190432
Allocated 131072 Bytes at 0xc0b402d8, total 12321512
Allocated 131072 Bytes at 0xc0b602e0, total 12452592
Allocated 131072 Bytes at 0xc0b802e8, total 12583672
Allocated 131072 Bytes at 0xc0ba02f0, total 12714752
Allocated 131072 Bytes at 0xc0bc02f8, total 12845832
Allocated 131072 Bytes at 0xc0be0300, total 12976912
Allocated 131072 Bytes at 0xc0c00308, total 13107992
Allocated 131072 Bytes at 0xc0c20310, total 13239072
Allocated 131072 Bytes at 0xc0c40318, total 13370152
Allocated 131072 Bytes at 0xc0c60320, total 13501232
Allocated 131072 Bytes at 0xc0c80328, total 13632312
Allocated 131072 Bytes at 0xc0ca0330, total 13763392
Allocated 131072 Bytes at 0xc0cc0338, total 13894472
Allocated 131072 Bytes at 0xc0ce0340, total 14025552
Allocated 131072 Bytes at 0xc0d00348, total 14156632
Allocated 131072 Bytes at 0xc0d20350, total 14287712
Allocated 131072 Bytes at 0xc0d40358, total 14418792
Allocated 131072 Bytes at 0xc0d60360, total 14549872
Allocated 131072 Bytes at 0xc0d80368, total 14680952
Allocated 131072 Bytes at 0xc0da0370, total 14812032
Allocated 131072 Bytes at 0xc0dc0378, total 14943112
Allocated 131072 Bytes at 0xc0de0380, total 15074192
Allocated 131072 Bytes at 0xc0e00388, total 15205272
Allocated 131072 Bytes at 0xc0e20390, total 15336352
Allocated 131072 Bytes at 0xc0e40398, total 15467432
Allocated 131072 Bytes at 0xc0e603a0, total 15598512
Allocated 131072 Bytes at 0xc0e803a8, total 15729592
Allocated 131072 Bytes at 0xc0ea03b0, total 15860672
Allocated 131072 Bytes at 0xc0ec03b8, total 15991752
Allocated 131072 Bytes at 0xc0ee03c0, total 16122832
Allocated 131072 Bytes at 0xc0f003c8, total 16253912
Allocated 131072 Bytes at 0xc0f203d0, total 16384992
Allocated 131072 Bytes at 0xc0f403d8, total 16516072
Allocated 131072 Bytes at 0xc0f603e0, total 16647152
Allocated 131072 Bytes at 0xc0f803e8, total 16778232
Allocated 131072 Bytes at 0xc0fa03f0, total 16909312
Allocated 131072 Bytes at 0xc0fc03f8, total 17040392
Allocations count: 130
Free 131072 Bytes at 0x200013a8, total 16909328
Free 131072 Bytes at 0x200213c0, total 16778248
Free 131072 Bytes at 0x200413d8, total 16647168
Free 131072 Bytes at 0xc0000008, total 16516088
Free 131072 Bytes at 0xc0020010, total 16385008
Free 131072 Bytes at 0xc0040018, total 16253928
Free 131072 Bytes at 0xc0060020, total 16122848
Free 131072 Bytes at 0xc0080028, total 15991768
Free 131072 Bytes at 0xc00a0030, total 15860688
Free 131072 Bytes at 0xc00c0038, total 15729608
Free 131072 Bytes at 0xc00e0040, total 15598528
Free 131072 Bytes at 0xc0100048, total 15467448
Free 131072 Bytes at 0xc0120050, total 15336368
Free 131072 Bytes at 0xc0140058, total 15205288
Free 131072 Bytes at 0xc0160060, total 15074208
Free 131072 Bytes at 0xc0180068, total 14943128
Free 131072 Bytes at 0xc01a0070, total 14812048
Free 131072 Bytes at 0xc01c0078, total 14680968
Free 131072 Bytes at 0xc01e0080, total 14549888
Free 131072 Bytes at 0xc0200088, total 14418808
Free 131072 Bytes at 0xc0220090, total 14287728
Free 131072 Bytes at 0xc0240098, total 14156648
Free 131072 Bytes at 0xc02600a0, total 14025568
Free 131072 Bytes at 0xc02800a8, total 13894488
Free 131072 Bytes at 0xc02a00b0, total 13763408
Free 131072 Bytes at 0xc02c00b8, total 13632328
Free 131072 Bytes at 0xc02e00c0, total 13501248
Free 131072 Bytes at 0xc03000c8, total 13370168
Free 131072 Bytes at 0xc03200d0, total 13239088
Free 131072 Bytes at 0xc03400d8, total 13108008
Free 131072 Bytes at 0xc03600e0, total 12976928
Free 131072 Bytes at 0xc03800e8, total 12845848
Free 131072 Bytes at 0xc03a00f0, total 12714768
Free 131072 Bytes at 0xc03c00f8, total 12583688
Free 131072 Bytes at 0xc03e0100, total 12452608
Free 131072 Bytes at 0xc0400108, total 12321528
Free 131072 Bytes at 0xc0420110, total 12190448
Free 131072 Bytes at 0xc0440118, total 12059368
Free 131072 Bytes at 0xc0460120, total 11928288
Free 131072 Bytes at 0xc0480128, total 11797208
Free 131072 Bytes at 0xc04a0130, total 11666128
Free 131072 Bytes at 0xc04c0138, total 11535048
Free 131072 Bytes at 0xc04e0140, total 11403968
Free 131072 Bytes at 0xc0500148, total 11272888
Free 131072 Bytes at 0xc0520150, total 11141808
Free 131072 Bytes at 0xc0540158, total 11010728
Free 131072 Bytes at 0xc0560160, total 10879648
Free 131072 Bytes at 0xc0580168, total 10748568
Free 131072 Bytes at 0xc05a0170, total 10617488
Free 131072 Bytes at 0xc05c0178, total 10486408
Free 131072 Bytes at 0xc05e0180, total 10355328
Free 131072 Bytes at 0xc0600188, total 10224248
Free 131072 Bytes at 0xc0620190, total 10093168
Free 131072 Bytes at 0xc0640198, total 9962088
Free 131072 Bytes at 0xc06601a0, total 9831008
Free 131072 Bytes at 0xc06801a8, total 9699928
Free 131072 Bytes at 0xc06a01b0, total 9568848
Free 131072 Bytes at 0xc06c01b8, total 9437768
Free 131072 Bytes at 0xc06e01c0, total 9306688
Free 131072 Bytes at 0xc07001c8, total 9175608
Free 131072 Bytes at 0xc07201d0, total 9044528
Free 131072 Bytes at 0xc07401d8, total 8913448
Free 131072 Bytes at 0xc07601e0, total 8782368
Free 131072 Bytes at 0xc07801e8, total 8651288
Free 131072 Bytes at 0xc07a01f0, total 8520208
Free 131072 Bytes at 0xc07c01f8, total 8389128
Free 131072 Bytes at 0xc07e0200, total 8258048
Free 131072 Bytes at 0xc0800208, total 8126968
Free 131072 Bytes at 0xc0820210, total 7995888
Free 131072 Bytes at 0xc0840218, total 7864808
Free 131072 Bytes at 0xc0860220, total 7733728
Free 131072 Bytes at 0xc0880228, total 7602648
Free 131072 Bytes at 0xc08a0230, total 7471568
Free 131072 Bytes at 0xc08c0238, total 7340488
Free 131072 Bytes at 0xc08e0240, total 7209408
Free 131072 Bytes at 0xc0900248, total 7078328
Free 131072 Bytes at 0xc0920250, total 6947248
Free 131072 Bytes at 0xc0940258, total 6816168
Free 131072 Bytes at 0xc0960260, total 6685088
Free 131072 Bytes at 0xc0980268, total 6554008
Free 131072 Bytes at 0xc09a0270, total 6422928
Free 131072 Bytes at 0xc09c0278, total 6291848
Free 131072 Bytes at 0xc09e0280, total 6160768
Free 131072 Bytes at 0xc0a00288, total 6029688
Free 131072 Bytes at 0xc0a20290, total 5898608
Free 131072 Bytes at 0xc0a40298, total 5767528
Free 131072 Bytes at 0xc0a602a0, total 5636448
Free 131072 Bytes at 0xc0a802a8, total 5505368
Free 131072 Bytes at 0xc0aa02b0, total 5374288
Free 131072 Bytes at 0xc0ac02b8, total 5243208
Free 131072 Bytes at 0xc0ae02c0, total 5112128
Free 131072 Bytes at 0xc0b002c8, total 4981048
Free 131072 Bytes at 0xc0b202d0, total 4849968
Free 131072 Bytes at 0xc0b402d8, total 4718888
Free 131072 Bytes at 0xc0b602e0, total 4587808
Free 131072 Bytes at 0xc0b802e8, total 4456728
Free 131072 Bytes at 0xc0ba02f0, total 4325648
Free 131072 Bytes at 0xc0bc02f8, total 4194568
Free 131072 Bytes at 0xc0be0300, total 4063488
Free 131072 Bytes at 0xc0c00308, total 3932408
Free 131072 Bytes at 0xc0c20310, total 3801328
Free 131072 Bytes at 0xc0c40318, total 3670248
Free 131072 Bytes at 0xc0c60320, total 3539168
Free 131072 Bytes at 0xc0c80328, total 3408088
Free 131072 Bytes at 0xc0ca0330, total 3277008
Free 131072 Bytes at 0xc0cc0338, total 3145928
Free 131072 Bytes at 0xc0ce0340, total 3014848
Free 131072 Bytes at 0xc0d00348, total 2883768
Free 131072 Bytes at 0xc0d20350, total 2752688
Free 131072 Bytes at 0xc0d40358, total 2621608
Free 131072 Bytes at 0xc0d60360, total 2490528
Free 131072 Bytes at 0xc0d80368, total 2359448
Free 131072 Bytes at 0xc0da0370, total 2228368
Free 131072 Bytes at 0xc0dc0378, total 2097288
Free 131072 Bytes at 0xc0de0380, total 1966208
Free 131072 Bytes at 0xc0e00388, total 1835128
Free 131072 Bytes at 0xc0e20390, total 1704048
Free 131072 Bytes at 0xc0e40398, total 1572968
Free 131072 Bytes at 0xc0e603a0, total 1441888
Free 131072 Bytes at 0xc0e803a8, total 1310808
Free 131072 Bytes at 0xc0ea03b0, total 1179728
Free 131072 Bytes at 0xc0ec03b8, total 1048648
Free 131072 Bytes at 0xc0ee03c0, total 917568
Free 131072 Bytes at 0xc0f003c8, total 786488
Free 131072 Bytes at 0xc0f203d0, total 655408
Free 131072 Bytes at 0xc0f403d8, total 524328
Free 131072 Bytes at 0xc0f603e0, total 393248
Free 131072 Bytes at 0xc0f803e8, total 262168
Free 131072 Bytes at 0xc0fa03f0, total 131088
Free 131072 Bytes at 0xc0fc03f8, total 8
Free count: 130
...
Free 131072 Bytes at 0xc0fc03f8, total 8
Free count: 130
[SUCCESS]
{ "threads": [{ "name": "main", "stack_size": 1536, "stack_used": 396 }]}
```
</details>
### Issues/PRs references
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
19355: boards/adafruit-itsybitsy-m4: configure littleFS on external flash r=aabadie a=benpicco
19883: drivers/stmpe811: introduce conversion for X and Y coordinates r=aabadie a=gschorcht
### Contribution description
To obtain coordinates from the touch panel that correspond to the display coordinates, it is often necessary to convert the coordinates by swapping and mirroring. Instead of hard coding this conversion, it is now controlled by an additional conversion parameter. For the sake of simplicity, possible rotations are predefined.
The PR fixes `tests/pkg/lgvl_touch` for the `stm32f429i-disc1` board where the coordinates from the touch panel seem to be mirrored in relation to the screen coordinates at the vertical axis.
### Testing procedure
Flash `tests/pkg/lvgl_touch`. Without this PR the coordinates of the button don't correspond to the touch panel coordinates once the button has been pressed. Instead they seem to be mirrored at the vertical axis. With this PR, the coordinates should be correct.
### Issues/PRs references
Co-authored-by: Benjamin Valentin <benpicco@beuth-hochschule.de>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
19887: cpu/efm32/periph: add DAC support for EFM32 Series 1 (VDAC) r=aabadie a=gschorcht
### Contribution description
This PR provides a small change for `periph_dac` to support the VDACs of EFM32 Series 1 MCUs. It was tested with `sltb009a` board for which this PR includes the DAC configuration.
### Testing procedure
`tests/periph/dac` should work for the `sltb009a` board. I've tested it already.
```
BOARD=sltb009a make -j8 -C tests/periph/dac flash
```
### Issues/PRs references
Depends on PR #19886
19898: tests/net/gcoap_fileserver: disable test on CI r=aabadie a=benpicco
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
19539: drivers/periph_sdmmc: define a High-level SDIO/SD/MMC API and low-level SDMMC periperal driver interface r=benpicco a=gschorcht
### Contribution description
This PR provides a SDIO/SD/MMC Device API (SDMMC). It implements a SD host controller driver that provides a high-level functions using a low-level SDIO/SD/MMC peripheral driver for accessing
- MultiMediaCards (MMC) and Embedded MultiMediaCards (eMMC)
- SD Memory Cards (SD Cards) with Standard Capacity (SDSC), High Capacity (SDHC) or Extended Capacity (SDXC).
It supports:
- 1-bit, 4-bit and 8-bit data bus width
- Default Speed and High Speed
- Auto-CLK
The SDIO/SD/MMC device API (SDMMC) is divided into two parts:
1. The high-level API that implements the SD Host Controller driver and allows
- to inititialize and identify different types of cards,
- to access them either blockwise or bytewise,
- to get information about the used card, and
- to send single commands or application specific commands to the card.
2. The low-level SDIO/SD/MMC peripheral driver implements the low-level functions required by the high-level device API. It has to be implemented for each MCU.
### Limitations:
- Only one card per SDIO/SD/MMC device is supported.
- eMMCs specific features are not supported.
- UHS-I, UHS-II and UHS-III are not supported.
### Testing procedure
PR #19540, PR #19760 or PR #19786 is needed to test this PR.
### Issues/PRs references
Prerequisite for PR #19540
Prerequisite for PR #19760
Prerequisite for PR #19786
19815: cpu/sam0_common/periph/sdhc: busy waiting and clock fixes r=benpicco a=benpicco
19860: drivers/ft5x06: fix vendor ID for FT6xx6 and FTxxxx register addresses r=benpicco a=gschorcht
### Contribution description
This PR provides a fix of the vendor ID for FT6xx6 touch panel driver ICs and a fix of register addresses for FTxxxx.
According to the [Application Note for FT6x06 CTPM](https://cdn-shop.adafruit.com/datasheets/FT6x06_AN_public_ver0.1.3.pdf), the vendor ID of FT6x06 touch panel driver ICs is `0x11` instead of `0xcd`. Although there are no information found in the Web about the FT6x36, the FT6336U touch panel of a ESP32-S3 WT32 SC01 Plus is also working with `0x11` as vendor ID so that it seems that FT6x36 is also using `0x11` as vendor ID.
Figured out with a `stm32f723e-disco` board (revision D03). Without this PR, `tests/drivers/ft5x06` gives:
```
+------------Initializing------------+
[ft5x06] init: invalid vendor ID: '0x11' (expected: 0xcd)
[Error] Initialization failed
```
With this PR it works as expected.
```
+------------Initializing------------+
Initialization successful
main(): This is RIOT! (Version: 2023.10-devel-96-gbb9011-drivers/ft5x06_fix_vendor_id)
FT5x06 test application
+------------Initializing------------+
[ft5x06] init: configuring touchscreen interrupt
Initialization successful
1 touch detected
[ft5x06] read gesture_id '0x00'
Touch 1 - X: 151, Y:138
[ft5x06] read gesture_id '0x00'
```
Some background information found in the Web:
- According to the [STM32CubeF7](c20e6dd15b/Drivers/BSP/STM32F723E-Discovery/stm32f723e_discovery_ts.c (L24-L27)) the FRIDA LCD panel mounted on the `stm32f723e-disco` board either uses FT6x36 (prior revision D) or FT3x67 (revision D). However, the FT5x06 driver type for the card is defined as FT6x06, which does not seem correct: bb9011c3fb/boards/stm32f723e-disco/include/board.h (L59)
- According to the [STM32CubeF7](c20e6dd15b/Drivers/BSP/Components/ft6x06/ft6x06.h (L269-L270)), the vendor ID for FT6x36 should be `0xcd`. However, the FT6336U on ESP32-S3 WT32 SC01 Plus works with vendor ID `0x11`.
- The [Adafruit FT6206 library](95118cd983/Adafruit_FT6206.h (L28)) uses `0x11` as vendor id.
- The `stm32l496g-disco` board uses a FT6236 which has vendor ID `0xcd`.
So the information available on the web is confusing. Maybe, a better solution would be to accept `0x11` as well as `0xcd` as vendor ID for FT6xxx touch panels. Unfortunately, there are no documents available on the registers directly from FocalTech 😟 so it seems to be more speculation than knowledge.
### Testing procedure
### Issues/PRs references
19886: cpu/efm32: fix DAC configuration r=benpicco a=gschorcht
### Contribution description
The EFM32 MCU allows the reference voltage to be configured per DAC device, not per DAC channel. Also, the DAC reference voltage was defined in the configuration but not used anywhere.
At the moment we have only defined one board (`stwstk6220a`) that uses the DAC, so changing the configuration interface shouldn't be critical.
### Testing procedure
`tests/periph/dac` should still work for the `stwstk6220a`
```
BOARD=slwstk6220a make -j8 -C tests/periph/dac flash
```
I don't have a `stwstk6220a` board (EFM32 Series 0) so that I can't test it. I could only test it for the `sltb009a` board (EFM32 Series 1) with the change for VDAC in PR #19887.
### Issues/PRs references
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
