9dd20c0ccb
cpu: boards: stm32l4/wb: use IS_USED for clock where possible
2020-09-08 18:42:42 +02:00
0745cc4a99
cpu: boards: smt32l4: rework clock configuration
2020-09-08 18:42:41 +02:00
95057a8aef
boards/stm32l4: rename common clock config header
2020-09-08 18:42:41 +02:00
8f1c5ab919
Update boards/common/stm32/include/f0/cfg_clock_default.h
2020-09-08 16:03:44 +02:00
6d76e61ff0
boards/stm32f0: adapt default clock configuration
2020-09-08 16:03:44 +02:00
1c95ff86bf
boards/stm32f3: fix clock configuration for HSI
2020-09-07 09:26:26 +02:00
Francisco
a75d32692c
Merge pull request #14892 from aabadie/pr/boards/stm32f1f3_default_clock
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boards/stm32f1: stm32f3: use shared default clock configuration header
2020-09-02 09:48:43 +02:00
Francisco
c44a43dadd
Merge pull request #14891 from aabadie/pr/boards/stm32f0_default_clock
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boards/stm32f0: introduce default shared clock configuration header
2020-09-01 13:37:54 +02:00
5cea49808a
boards/stm32f1f3: introduce default shared clock configuration
2020-08-31 08:40:17 +02:00
88d7ecb857
boards/stm32f0: introduce shared default clock configuration header
2020-08-30 22:05:46 +02:00
9d1ebb54d4
boards/common/stm32l1: introduce common clock config header
2020-08-28 16:55:32 +02:00
7472280369
boards/stm32g0: add clock configuration via Kconfig
2020-08-25 12:57:03 +02:00
f9fa90fcd8
boards/stm32g4: add clock configuration via Kconfig
2020-08-25 12:57:03 +02:00
a1038aa70e
cpu: boards: stm32g4: improve clock configuration
2020-08-25 12:55:16 +02:00
d15d123eef
boards/stm32g4: enable max 170MHz clock by default
2020-08-24 15:42:14 +02:00
ef82cebdd0
common/stm32: remove obsolete spi_divtable config
2020-08-18 16:55:11 +02:00
8272541b44
boards/common/stm32: add common code for stm32g0
2020-07-21 12:45:25 +02:00
34c872093c
boards/common/stm32: add common configuration for stm32g4 boards
2020-06-19 14:18:18 +02:00
Benjamin Valentin
b20ec93991
boards: add WeAct-f411ce board
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The WeAct-F411CE is a blackpill-like board with a STM32F411CE.
It can be flashed using the vendor-provided bootloader.
2020-06-04 12:39:14 +02:00
Francisco Molina
b5bcf26e0f
cpu/stm32_common: make RTT_FREQUENCY configurable
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Adds: RTT_MAX_FREQUENCY, RTT_MIN_FREQUENCY & RTT_CLOCK_FREQUENCY
2020-05-05 14:36:31 +02:00
73615d690d
boards/stm32l4: introduce common clock configuration
2020-04-07 17:42:56 +02:00
Francisco Molina
e220483adc
boards: p-nucleo-wb55 initial support
2020-03-25 09:29:57 +01:00
Karl Fessel
979b4d5cf7
Revert "boards/nucleo-f767zi: add correct flash bank openocd config"
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This reverts commits:
- 1dec5ba61b53f60db66f
2020-02-28 13:51:58 +01:00
1f5340c307
boards/stm32: Add default config for USB OTG HS peripheral
2020-02-11 15:50:22 +01:00
fc63fb77bf
boards/stm32: Add default config for USB OTG FS peripheral
2020-02-11 15:50:18 +01:00
Francisco Molina
1dec5ba61b
boards/common/stm32f7: add correct flash bank configuration
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openocd configuration file for `stm32f7` relies on probing to find out
FLASH_ADDR. On nucleo-f767zi board probing (`flash probe 0`) fails when
`srst` is asserted, but `srst` needs to be asserted to be able to flash
the `BOARD` when sleeping or after a hardfault.
To circumvent this in boards/common/stm32/dist/stm32f7.cfg we define a new
flash bank with the appropriate fash start address and specify that this is
the flash bank to be used as default configuration instead of the
default by setting FLASH_BANK=4
2020-01-27 22:32:06 +01:00
Benjamin Valentin
0ea2cbf1eb
boards: remove RTT_NUMOF/RTC_NUMOF
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Those macros are defined but never used.
2019-11-08 14:20:33 +01:00
66b57f2a51
boards/stm32: add 54MHz and 108MHz divtable entries
2019-10-13 20:27:37 +02:00
Francisco
8467dba680
Merge pull request #12158 from aabadie/pr/boards/stm32_connect_assert_srst
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boards/stm32: generalize use of connect_assert_srst for flashing
2019-09-23 14:02:39 +02:00
281273f362
boards/stm32: remove use of connect_assert_srst for flashing stm32l0
2019-09-02 21:46:15 +02:00
df18dba378
boards/stm32: introduce shared i2c configuration
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This configuration corresponds to I2C1 connected to PB6 (SCL) and PB7 (SDA)
2019-09-02 08:17:21 +02:00
Benjamin Valentin
8af04cd939
boards: make use of ARRAY_SIZE macro
2019-08-06 19:43:54 +02:00
6b5a977f08
boards/stm32: introduce common timer config with TIM5
2019-08-05 15:00:12 +02:00
94a9e2c3de
boards/stm32: introduce common timer config with TIM2
2019-08-05 15:00:11 +02:00
6cad403dfa
boards/stm32: adapt common i2c config to L0 boards
2019-05-24 11:11:24 +02:00
d6689103ef
boards/stm32: add shared STM32L0 clock configuration
2019-05-23 14:03:17 +02:00
f559ccb0c6
Merge pull request #11260 from maribu/nucleo-f767zi
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boards/nucleof7*: SPI and refactoring
2019-05-21 14:01:41 +02:00
871dda1216
boards/stm32: introduce common default rtt config
2019-05-21 08:38:43 +02:00
Marian Buschsieweke
17fd6941ce
boards/common/stm32: SPI divtable for 108MHz/54MHz
2019-03-25 15:51:30 +01:00
Marian Buschsieweke
7ab1ae1b76
boards/common/stm32: Clock for F7 216MHz/8MHz/LSE
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Added file with clock settings for STM32-F7 CPUs with a core clock of 216MHz,
an external high speed clock of 8 MHz and external low speed clock (32.768kHz)
enabled.
2019-03-25 15:51:30 +01:00
francisco
026f7dc4a4
boards/stm32lx: use openocd dual bank if possible
2019-03-14 18:10:27 +01:00
e3b10e3d7d
Merge pull request #10343 from MrKevinWeiss/pr/fixnucleol1flasher
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boards/stm32l0: Fix openocd to prevent flash locking
2019-03-14 10:27:02 +01:00
7d31bb43f1
boards/stm32/f4: factorize common clock configuration (168/8)
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A common configuration file is introduced for stm32f4 with core clock
at 168MHz with HSE at 8MHz, 2 configuration files are introduced to²:
distinguish between clock configuration with and without LSE.
2019-02-27 21:49:55 +01:00
24bc5ae254
boards/nucleo-f0xx: use common i2c configuration
2019-01-02 14:23:46 +01:00
541fc7f93f
boards/stm32: add f2 common clock configuration
2019-01-02 14:23:46 +01:00
f8d8ddb1ef
boards/stm32: adapt common i2c config to f7 and l4
2019-01-02 11:25:32 +01:00
08608c350c
boards/stm32: add common I2C configuration
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This configuration provides 1 I2C using I2C1 on PB8 and PB9, which is very common for STMs
2019-01-02 10:30:13 +01:00
11da5036fb
boards/stm32: add new common clock configurations
2019-01-02 10:30:13 +01:00
MrKevinWeiss
7c9ef1e9e0
boards/stm32l0: Fix openocd to prevent flash locking
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This commit add the connect_assert_srst which requires the SRST to be asserted before trying to connect.
Certain firmwares will cause it to get to a state where flashing fails and the reset button must be pushed at the correct time to recover.
2018-11-30 10:07:18 +01:00
de15af4c87
boards/common/stm32-link: add common place for stlink
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- introduce common place for boards using stlink: same serial, all use openocd
- apply this to nucleos
2018-06-26 20:45:23 +02:00
Hauke Petersen
079f3c08d4
boards/stm32f4-based: use shared 168MHz clock conf
2018-05-24 19:00:42 +02:00
Hauke Petersen
cc90edc373
boards/stm32: use shared 180MHz clock config
2018-05-24 19:00:42 +02:00
Hauke Petersen
3182ad21e6
boards/stm32: add shared spi divtable header
2018-05-24 19:00:42 +02:00
Hauke Petersen
e18f518023
boards: add path for STM32-shared config snippets
2018-05-24 19:00:42 +02:00
