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Commit Graph

55 Commits

Author SHA1 Message Date
Marian Buschsieweke
c2c2cc8592
drivers/periph_gpio: let gpio_read() return bool
Since https://github.com/RIOT-OS/RIOT/pull/20935 gpio_write()
uses a `bool` instead of an `int`. This does the same treatment for
`gpio_read()`.

This does indeed add an instruction to `gpio_read()` implementations.
However, users caring about an instruction more are better served with
`gpio_ll_read()` anyway. And `gpio_read() == 1` is often seen in
newcomer's code, which would now work as expected.
2024-10-23 13:24:09 +02:00
Benjamin Valentin
4627f66caa drivers/periph/gpio: make gpio_write() take a bool 2024-10-22 16:39:48 +02:00
MrKevinWeiss
e0fdc3c16c
*Kconfig*: Modify Kconfig to remove dep model 2024-03-27 10:28:12 +01:00
MrKevinWeiss
7a68fb0d5e
*Kconfig*: Remove dep-only Kconfig files 2024-03-26 14:54:22 +01:00
Marian Buschsieweke
c18c47d621
cpu/cc26xx_cc13xx: implement periph_timer_query_freqs 2023-12-07 16:15:43 +01:00
Marian Buschsieweke
d6499fa8fd
cpu/cc26xx_cc13xx: Fix bogus array-bound warning
GCC 12 create a bogus array out of bounds warning as it assumes that
because there is special handling for `uart == 0` and `uart == 1`,
`uart` can indeed be `1`. There is an `assert(uart < UART_NUMOF)` above
that would blow up prior to any out of bounds access.

In any case, optimizing out the special handling of `uart == 1` for
when `UART_NUMOF == 1` likely improves the generated code and fixes
the warning.

    /home/maribu/Repos/software/RIOT/cc2650/cpu/cc26xx_cc13xx/periph/uart.c:88:8: error: array subscript 1 is above array bounds of 'uart_isr_ctx_t[1]' [-Werror=array-bounds]
       88 |     ctx[uart].rx_cb = rx_cb;
          |     ~~~^~~~~~
    /home/maribu/Repos/software/RIOT/cc2650/cpu/cc26xx_cc13xx/periph/uart.c:52:23: note: while referencing 'ctx'
       52 | static uart_isr_ctx_t ctx[UART_NUMOF];
          |                       ^~~
    /home/maribu/Repos/software/RIOT/cc2650/cpu/cc26xx_cc13xx/periph/uart.c:89:8: error: array subscript 1 is above array bounds of 'uart_isr_ctx_t[1]' [-Werror=array-bounds]
       89 |     ctx[uart].arg = arg;
          |     ~~~^~~~~~
    /home/maribu/Repos/software/RIOT/cc2650/cpu/cc26xx_cc13xx/periph/uart.c:52:23: note: while referencing 'ctx'
       52 | static uart_isr_ctx_t ctx[UART_NUMOF];
          |                       ^~~
2023-04-25 15:31:27 +02:00
Marian Buschsieweke
c78c0056ea
boards/common/cc26xx_cc13xx: Fix flashing with upstream OpenOCD
This adds a work around that allows flashing with upstream OpenOCD,
most of the time.
2023-01-10 22:39:35 +01:00
krzysztof-cabaj
f82f856c63 cpu/cc26xx_cc13xx: remove broken HTML links and headings from doc 2022-10-28 08:57:17 -04:00
Benjamin Valentin
7abaae7bbd treewide: fix typos 2022-09-15 12:12:23 +02:00
Gunar Schorcht
007e29ebb5 cpu/periph/i2c: update implementations to new I2C API
Make all `spi_acquire` implementations return `void` and add assertions to check for valid device identifier where missing.
2021-11-29 06:35:25 +01:00
Leandro Lanzieri
c68fce0850
cpu/cc26xx_cc13xx: model Kconfig 2021-11-19 10:50:50 +01:00
Jean-Pierre De Jesus DIAZ
0d9f6ca3f4 cpu/cc26xx_cc13xx: fix doxygen grouping warnings
Signed-off-by: Jean-Pierre De Jesus DIAZ <me@jeandudey.tech>
2021-09-11 12:45:15 +02:00
Jan Romann
4384795cb9
treewide: Remove excessive newlines 2021-08-13 19:50:38 +02:00
Jean Pierre Dudey
5a17e1335f cpu/cc26xx_cc13xx: add CPU documentation
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2021-02-18 11:28:06 +01:00
Jean Pierre Dudey
b289c698b8 cpu/cc26xx_cc13xx: define GPIO_PIN macro
This allows using the macro inside the periph_conf.h board files since the
periph/gpio.h header can't be included on the peripheral configuration.

Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2021-02-09 23:04:24 +01:00
Jean Pierre Dudey
7db791476e cpu/cc26x0: rename to cc26x0_cc13x0
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2021-02-08 17:25:42 +01:00
Marian Buschsieweke
125c892c03
drivers/periph/timer: Use uint32_t for frequency
For all currently supported platforms `unsigned long` is 32 bit in width. But
better use `uint32_t` to be safe.
2020-10-30 22:02:12 +01:00
Bas Stottelaar
22243aec7a cpu/*: realign ENABLE_DEBUG 2020-10-23 00:46:26 +02:00
Bas Stottelaar
ab6188cea3 cpu/*: add missing include of assert.h 2020-10-22 11:13:08 +02:00
Jean Pierre Dudey
becca71caf cpu/cc26xx_cc13xx: fix typo on XOSC selection
> Fixes a typo on XOSC selection bitfield that would
make the CPU crash when changing it.
> Sets the other fields to their default values.

Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2020-10-12 14:37:55 -05:00
benpicco
482dacfa32
Merge pull request #15134 from btcven/2020_10_01-idle-fix
cpu/cc26xx_cc13xx: enable periph clocks on sleep
2020-10-02 17:30:24 +02:00
9b32226e03
cpu/cc26xx_cc13xx: fix typo 'exmaple' -> 'example' 2020-10-02 07:54:37 +02:00
Jean Pierre Dudey
f443a8bc84 cpu/cc26xx_cc13xx: enable periph clocks on sleep
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2020-10-01 18:38:03 -05:00
Jean Pierre Dudey
3561c7dc78 cpu/cc26xx_cc13xx: fix CCFG.MODE_CONF_1 on cc26x0
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2020-09-30 11:52:04 -05:00
Jean Pierre Dudey
ed2e04904b cpu/cc26xx_cc13xx: use _rom_length symbol for CCFG origin
>Now `ROM_LEN` is the "real" length, 352K and 128K respectively
and the CCFG position is determined by subtracting it's size
from `_rom_length` symbol.

Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2020-09-30 11:52:04 -05:00
Jean Pierre Dudey
447cdebd26 cpu/cc26xx_cc13xx: add & link CCFG configuration
> Allows flahsing CCFG configuration using Kconfig,
formely "make menuconfig".
> Supports cc26x0, cc26x2_cc13x2.
> Can be used to enable bootloader backdoor, to use
cc2538-bsl flashing script.
> Not all options are in Kconfig, most important ones,
others can be added in further commits.
> On cc13xx targets the VDDR high option can be enabled
using Kconfig.
> With this, RIOT can flash blank chips and the firmware
will run just fine.

Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2020-09-27 17:58:11 -05:00
Jean Pierre Dudey
978ea409b5 cpu/cc26xx_cc13xx: add CCFG register values
This adds almost all registers necessary to flash create
the CCFG configuration.

Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2020-09-27 17:56:55 -05:00
Jean Pierre Dudey
d0aedf0f95 cpu/cc26xx_cc13xx: add custom ld script
This add a custom ldscript for cc26xx_cc13xx CPUs,
which allows linking CCFG configuration, usage of GPRAM,
etc.

Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2020-09-27 17:54:14 -05:00
Jean Pierre Dudey
d9580514a3
cpu/cc26xx_cc13xx: model features in Kconfig
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-06-08 08:23:45 -05:00
Jean Pierre Dudey
0f3393d61a
cpu/cc26x0: move i2c code to cc26xx_cc13xx
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-05-24 12:44:09 -05:00
Jean Pierre Dudey
0aeed80eb0
cc26xx_cc13xx: add ROM Hard-API
This is needed to switch the SCLK_HF source clock safely.

Note: these functions work on cc26x2_cc13x2 and cc26x0, but special care
needs to be taken when calling on cc26x0 some of these functions, as
ADDI_SEM needs to be taken.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-05-02 13:25:41 -05:00
Jean Pierre Dudey
951a99dba3
cc26x2_cc13x2: add setup_trim_device function
This function trims the necessary registers for the device to operate
normally.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:32:58 -05:00
Jean Pierre Dudey
dc1d2ace42
cc26xx_cc13xx: add ADI3 and masked access
- Added ADI instruction offsets
- Added register banks and address bases for masked access (writes).

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:32:58 -05:00
Jean Pierre Dudey
e2489ced97
cc26xx_cc13xx: add register values
Add some register values needed to trim registers.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
6829dfdf1b
cc26xx_cc13xx: fix FLASH->CFG offset, update VIMS
- Changed "meh" to "Reserved".
- Renamed CTL to CFG to match SDK/TRM name.
- Added constants for VIMS and FLASH necessary to trim registers.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
1733e62217
cc26xx_cc13xx: update AON_IOC register bank
- Updated documentation
- Fixed register bank name
- Added missing field

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
cdf2e88804
cc26x2_cc13x2: add 16-bit masked access to DDI_0_OSC
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
0aba7556d0
cc26xx_cc13xx: update VIMS/FLASH documentation
Also i've fixed the register bank offsets, 0x4 was being added without
need.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-23 17:10:18 -05:00
benpicco
91200aa6ea
Merge pull request #13867 from btcven/2020_04_14-ccfg-fcfg1
cc26xx_cc13xx: fix CCFG/FCFG1 register offsets
2020-04-15 17:33:12 +02:00
Jean Pierre Dudey
cbcd7d58e7
cc26xx_cc13xx: fix CCFG offset on x2 variants
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-14 17:15:56 -05:00
Jean Pierre Dudey
d4084d6df9
cc26xx_cc13xx: fix UART1 initialization
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-08 12:24:02 -05:00
Leandro Lanzieri
64552a3b9a
cpu/cortexm_common: Move common modules to Makefile.dep
This moves the following modules to a architecture-specific Makefile.dep
file:
- cortexm_common
- cortexm_common_periph
- newlib
- newlib_nano
- periph
2020-04-01 09:46:21 +02:00
Jean Pierre Dudey
ffa5005021
cc26xx_cc13xx: add API to manage peripheral clocks
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-03-23 09:33:53 -05:00
Jean Pierre Dudey
4643ed5733
cc26xx_cc13xx: add power abstraction
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-03-23 09:33:22 -05:00
Jean Pierre Dudey
20439cc3cc
cc26xx_cc13xx: add RFC_DBELL/RFC_PWR definitions
This definition is compatible with `cc26x0` and `cc26x2_cc13x2`.

The only difference is (cc26x0 -> cc26x2_cc13x2):

- IRQ13 -> FG_COMMAND_STARTED
- IRQ12 -> COMMAND_STARTED

Those IRQs aren't used on cc26x0 radio so it shouldn't affect anything.
2020-03-16 19:36:54 -05:00
Jean Pierre Dudey
ec4fccb3f7
cc26xx_cc13xx: add PERIPH_BASE_NONBUF
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-03-16 19:30:31 -05:00
Dylan Laduranty
8e2227b18b cpu/cc26xx_cc13xx: use generic hw fc module 2020-03-10 14:22:34 +01:00
Benjamin Valentin
5d96bcf0a0 cpu/cc13x2: fix leftover from cc26x2_cc13x2 rename
A files was forgotten to move and one doxygen group was not renamed.
2020-02-04 14:37:43 +01:00
benpicco
cc90a896c7
Merge pull request #13166 from jeandudey/2020_01_19-cc26x2-cc13x2
cpu/cc13x2: rename cpu to cc26x2_cc13x2.
2020-02-04 11:45:59 +01:00
1ae5a08ec7
cpu/cc26xx_cc13xx: move dependencies to Makefile.dep 2020-01-28 13:20:52 +01:00