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cpu/cc26xx_cc13xx: enable periph clocks on sleep
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
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@ -341,6 +341,14 @@ typedef struct {
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#define GPIOCLKGR_CLK_EN 0x1
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#define I2CCLKGR_CLK_EN 0x1
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#define UARTCLKGR_CLK_EN_UART0 0x1
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#define GPIOCLKGS_CLK_EN 0x1
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#define I2CCLKGS_CLK_EN 0x1
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#define UARTCLKGS_CLK_EN_UART0 0x1
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#define GPIOCLKGDS_CLK_EN 0x1
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#define I2CCLKGDS_CLK_EN 0x1
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#define UARTCLKGDS_CLK_EN_UART0 0x1
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/** @} */
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/** @ingroup cpu_specific_peripheral_memory_map
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@ -354,10 +354,20 @@ typedef struct {
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#define PDSTAT1_RFC_ON 0x4
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#define PDSTAT1_VIMS_ON 0x8
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#define GPIOCLKGR_CLK_EN 0x1
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#define I2CCLKGR_CLK_EN 0x1
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#define UARTCLKGR_CLK_EN_UART0 0x1
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#define UARTCLKGR_CLK_EN_UART1 0x2
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#define GPIOCLKGR_CLK_EN 0x1
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#define I2CCLKGR_CLK_EN 0x1
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#define UARTCLKGR_CLK_EN_UART0 0x1
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#define UARTCLKGR_CLK_EN_UART1 0x2
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#define GPIOCLKGS_CLK_EN 0x1
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#define I2CCLKGS_CLK_EN 0x1
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#define UARTCLKGS_CLK_EN_UART0 0x1
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#define UARTCLKGS_CLK_EN_UART1 0x2
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#define GPIOCLKGDS_CLK_EN 0x1
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#define I2CCLKGDS_CLK_EN 0x1
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#define UARTCLKGDS_CLK_EN_UART0 0x1
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#define UARTCLKGDS_CLK_EN_UART1 0x2
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/** @} */
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/** @ingroup cpu_specific_peripheral_memory_map
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@ -8,6 +8,7 @@
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/**
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* @ingroup cpu_cc26xx_cc13xx
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*
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* @{
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*
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* @file
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@ -95,31 +96,42 @@ void power_enable_domain(const power_domain_t domain)
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void power_clock_enable_gpio(void)
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{
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PRCM->GPIOCLKGR = GPIOCLKGR_CLK_EN;
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/* enable clock gates for GPIO peripheral, for run mode
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* and sleep mode */
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PRCM->GPIOCLKGR |= GPIOCLKGR_CLK_EN;
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PRCM->GPIOCLKGS |= GPIOCLKGS_CLK_EN;
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prcm_commit();
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}
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void power_clock_enable_gpt(uint32_t tim)
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{
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/* enable clock gates for GPT peripheral, for run mode and sleep mode */
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PRCM->GPTCLKGR |= (1 << tim);
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PRCM->GPTCLKGS |= (1 << tim);
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prcm_commit();
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}
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void power_clock_enable_i2c(void) {
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PRCM->I2CCLKGR = I2CCLKGR_CLK_EN;
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/* I2C peripheral is only enabled for run mode as it isn't necessary to
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* keep it running at sleep or deep sleep, as the I2C interrupt is mainly
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* for the slave mode ;-) */
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PRCM->I2CCLKGR |= I2CCLKGR_CLK_EN;
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prcm_commit();
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}
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void power_clock_enable_uart(uart_t uart)
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{
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/* enable clock gates for UART peripheral, for run mode and sleep mode. */
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if (uart == 0) {
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PRCM->UARTCLKGR |= UARTCLKGR_CLK_EN_UART0;
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PRCM->UARTCLKGS |= UARTCLKGS_CLK_EN_UART0;
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}
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#ifdef UARTCLKGR_CLK_EN_UART1
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else if (uart == 1) {
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PRCM->UARTCLKGR |= UARTCLKGR_CLK_EN_UART1;
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PRCM->UARTCLKGS |= UARTCLKGS_CLK_EN_UART1;
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}
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#endif
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@ -128,12 +140,15 @@ void power_clock_enable_uart(uart_t uart)
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void power_clock_disable_uart(uart_t uart)
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{
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/* disable clock gates for UART peripheral, for run and sleep mode */
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if (uart == 0) {
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PRCM->UARTCLKGR &= ~UARTCLKGR_CLK_EN_UART0;
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PRCM->UARTCLKGS &= ~UARTCLKGS_CLK_EN_UART0;
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}
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#ifdef UARTCLKGR_CLK_EN_UART1
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else if (uart == 1) {
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PRCM->UARTCLKGR &= ~UARTCLKGR_CLK_EN_UART1;
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PRCM->UARTCLKGS &= ~UARTCLKGS_CLK_EN_UART1;
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}
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#endif
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