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cpu/cc26xx_cc13xx: add CCFG register values

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This adds almost all registers necessary to flash create
the CCFG configuration.

Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
This commit is contained in:
Jean Pierre Dudey 2020-09-27 17:56:55 -05:00
parent d0aedf0f95
commit 978ea409b5
1 changed files with 81 additions and 5 deletions
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86
cpu/cc26xx_cc13xx/include/cc26xx_cc13xx_ccfg.h
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@ -54,11 +54,87 @@ typedef struct {
* @brief CCFG register values
* @{
*/
#define CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_s 16
#define CCFG_MODE_CONF_VDDR_EXT_LOAD 0x02000000
#define CCFG_MODE_CONF_VDDS_BOD_LEVEL 0x01000000
#define CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM 0x00000004
#define CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING 0x00000002
#define CCFG_EXT_LF_CLK_DIO_m 0xFF000000
#define CCFG_EXT_LF_CLK_DIO_s 24
#define CCFG_EXT_LF_CLK_RTC_INCREMENT_m 0x00FFFFFF
#define CCFG_EXT_LF_CLK_RTC_INCREMENT_s 0
#define CCFG_MODE_CONF_1_TCXO_TYPE_m 0x80000000
#define CCFG_MODE_CONF_1_TCXO_TYPE_s 31
#define CCFG_MODE_CONF_1_TCXO_MAX_START_m 0x7F000000
#define CCFG_MODE_CONF_1_TCXO_MAX_START_s 24
#define CCFG_MODE_CONF_1_ALT_DCDC_VMIN_m 0x00F00000
#define CCFG_MODE_CONF_1_ALT_DCDC_VMIN_s 20
#define CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN_m 0x00080000
#define CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN_s 19
#define CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_m 0x00070000
#define CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_s 16
#define CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_m 0x0000F000
#define CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_s 12
#define CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET_m 0x00000F00
#define CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET_s 8
#define CCFG_MODE_CONF_1_XOSC_MAX_START_m 0x000000FF
#define CCFG_MODE_CONF_1_XOSC_MAX_START_s 0
#define CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG_m 0xFFFF0000
#define CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG_s 16
#define CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_m 0x0000FFF0
#define CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_s 4
#define CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO_m 0x00000008
#define CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO_s 3
#define CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_m 0x00000004
#define CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_s 2
#define CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING 0x00000002
#define CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING_m 0x00000002
#define CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING_s 1
#define CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_m 0x00000001
#define CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_s 0
#define CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_m 0xF0000000
#define CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_s 28
#define CCFG_MODE_CONF_DCDC_RECHARGE_m 0x08000000
#define CCFG_MODE_CONF_DCDC_RECHARGE_s 27
#define CCFG_MODE_CONF_DCDC_ACTIVE_m 0x04000000
#define CCFG_MODE_CONF_DCDC_ACTIVE_s 26
#define CCFG_MODE_CONF_VDDR_EXT_LOAD 0x02000000
#define CCFG_MODE_CONF_VDDR_EXT_LOAD_m 0x02000000
#define CCFG_MODE_CONF_VDDR_EXT_LOAD_s 25
#define CCFG_MODE_CONF_VDDS_BOD_LEVEL 0x01000000
#define CCFG_MODE_CONF_VDDS_BOD_LEVEL_m 0x01000000
#define CCFG_MODE_CONF_VDDS_BOD_LEVEL_s 24
#define CCFG_MODE_CONF_SCLK_LF_OPTION_m 0x00C00000
#define CCFG_MODE_CONF_SCLK_LF_OPTION_s 22
#define CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC_m 0x00200000
#define CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC_s 21
#define CCFG_MODE_CONF_RTC_COMP_m 0x00100000
#define CCFG_MODE_CONF_RTC_COMP_s 20
#define CCFG_MODE_CONF_XOSC_FREQ_m 0x000C0000
#define CCFG_MODE_CONF_XOSC_FREQ_s 18
#define CCFG_MODE_CONF_XOSC_CAP_MOD_m 0x00020000
#define CCFG_MODE_CONF_XOSC_CAP_MOD_s 17
#define CCFG_MODE_CONF_HF_COMP_m 0x00010000
#define CCFG_MODE_CONF_HF_COMP_s 16
#define CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_m 0x0000FF00
#define CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_s 8
#define CCFG_MODE_CONF_VDDR_CAP_m 0x000000FF
#define CCFG_MODE_CONF_VDDR_CAP_s 0
#define CCFG_BL_CONFIG_BOOTLOADER_ENABLE_m 0xFF000000
#define CCFG_BL_CONFIG_BOOTLOADER_ENABLE_s 24
#define CCFG_BL_CONFIG_BL_LEVEL_m 0x00010000
#define CCFG_BL_CONFIG_BL_LEVEL_s 16
#define CCFG_BL_CONFIG_BL_PIN_NUMBER_m 0x0000FF00
#define CCFG_BL_CONFIG_BL_PIN_NUMBER_s 8
#define CCFG_BL_CONFIG_BL_ENABLE_m 0x000000FF
#define CCFG_BL_CONFIG_BL_ENABLE_s 0
#define CCFG_ERASE_CONF_CHIP_ERASE_DIS_N_m 0x00000100
#define CCFG_ERASE_CONF_CHIP_ERASE_DIS_N_s 8
#define CCFG_ERASE_CONF_BANK_ERASE_DIS_N_m 0x00000001
#define CCFG_ERASE_CONF_BANK_ERASE_DIS_N_s 0
#define CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE_m 0x000000FF
#define CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE_s 0
#define CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE_m 0x00FF0000
#define CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE_s 16
#define CCFG_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE_m 0x0000FF00
#define CCFG_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE_s 8
#define CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE_m 0x000000FF
#define CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE_s 0
/** @} */
/**