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Commit Graph

7942 Commits

Author SHA1 Message Date
Benjamin Valentin
0bd67d98d9 cpu: always rely on stdio.inc.mk for default stdio selection 2022-11-09 10:42:47 +01:00
benpicco
8559472179
Merge pull request #18821 from jue89/feature/saml21_pheriph_pm
cpu/saml21: add interaction with pm_layered for peripheral drivers
2022-11-07 19:53:57 +01:00
benpicco
384e3ca534
Merge pull request #18847 from krzysztof-cabaj/nucleo-f207zg-ADC
boards/nucleo-f207zg:  support for ADC
2022-11-05 01:55:30 +01:00
krzysztof-cabaj
aa426bd3aa cpu/stm32/f2: add ADC support for f207zg 2022-11-04 18:02:28 -04:00
Jue
73e6886b2c cpu/saml21: define required power modes
We can get rid initially blocked pm modes \o/
2022-11-03 14:53:45 +01:00
Jue
24461b43f8 cpu/sam0/spi: generalize pm_layered interaction
In DMA mode SPI transfers are carried out by HW. We need to block certain pm modes during transfer.
2022-11-03 14:53:44 +01:00
Jue
db9263eeca cpu/sam0/rtc_rtt: integrate pm_layered 2022-11-03 14:53:43 +01:00
Jue
cc4e880aa8 cpu/sam0/rtc: remove overflow IRQ
Due to the RIOT_EPOCH of 2020 this overflow will happen in year 2084. It would be scary if IoT devices are still around then.

We can save RAM and ROM. Furthermore, this overflow handling should block BACKUP power mode in order to keep track of the reference year.
2022-11-03 14:52:38 +01:00
Jue
5866262122 cpu/sam0/usbdev: generalize pm_layered interaction
periph_cpu.h should define the required pm modes.
Additionally, some CPUs require a certain pm mode in USB IDLE mode.
2022-11-03 14:27:47 +01:00
Jue
220be1da7e cpu/sam0/gpio: integrate pm_layered 2022-11-03 14:27:47 +01:00
Jue
ae9190da30 cpu/sam0/uart: integrate pm_layered 2022-11-03 14:27:47 +01:00
Jue
aa5ad12f37 cpu/sam0/uart: skip uart_write() if uart isn't active
Otherwise we get stuck in an endless loop ...
2022-11-03 14:27:47 +01:00
Jue
cf5e207d62 cpu/sam0/uart: enable peripheral clock before accessing regs 2022-11-03 14:27:47 +01:00
Jue
4f25c1017d cpu/sam0/timer: integrate pm_layered 2022-11-03 14:27:47 +01:00
Gunar Schorcht
31efa61eda cpu/stm32: improvement of USB driver selection
There are STM32 families where all models use only the Synopsys DWC2 USB OTG core while others completely use only the USB Device FS core. For these families then either the driver `drivers/usbdev_synopsys_dwc2` or the driver `cpu/stm32/periph/usbdev` is used depending on the respective family. However, the STM32 families F1 and L4 use both cores. The correct driver must therefore be selected depending on the CPU line or CPU model.
2022-11-03 13:52:01 +01:00
Gunar Schorcht
ccbb304eae
Merge pull request #18814 from jue89/fix/efm32_series2_timer
cpu/efm32/timer_series2: fix interaction with pm_layered
2022-11-02 16:30:13 +01:00
Jon-Mailes Graeffe
b0686ce4dd cpu/esp32: set bootloader XTAL frequency configuration to automatic 2022-11-01 03:22:38 +01:00
Jue
75295df810 cpu/saml21/pm: allow blocking IDLE mode 2022-10-31 22:18:00 +01:00
Jue
d0c11e568a cpu/saml21/pm: specify power mode names 2022-10-31 22:18:00 +01:00
krzysztof-cabaj
f82f856c63 cpu/cc26xx_cc13xx: remove broken HTML links and headings from doc 2022-10-28 08:57:17 -04:00
Jue
54e915e40d cpu/efm32/timer_series2: sync STATUS register
Make sure the STATUS register has been synced between the different clock domains.

Especially the LETIMER needs some time to update the STATUS register after it has been enabled. If the LETIMER is started and stopped with just a short delay, pm_layered gets confused because the timer seems to be inactive ...
2022-10-28 11:34:55 +02:00
Jue
e6d18af3ad cpu/efm32/timer_series2: fix timer_start() interaction with pm_layered
The timer hasn't been enabled yet, if the STATUS isn't RUNNING, yet ...
2022-10-28 11:34:55 +02:00
Juergen Fitschen
41251507a2
Merge pull request #18806 from jue89/fix/efm32_startup
cpu/efm32: include periph_conf.h for system-related methods
2022-10-27 23:26:42 +02:00
benpicco
ed1d8e0a3d
Merge pull request #18785 from maribu/boards/blxxxpill/periph_conf
boards/common/blxxxpill: Fix pin conflicts in periph_conf
2022-10-27 21:22:10 +02:00
Juergen Fitschen
6190738bf0 cpu/efm32: include periph_conf.h for system-related methods
This allows boards to define different crystal frequencies. The correct frequency is required by the system-related methods to ensure proper function of the underlying emlib.
2022-10-27 15:22:58 +02:00
benpicco
578d328ff4
Merge pull request #18711 from Enoch247/cpu-stm32-dma-fixes
cpu/stm32: fix periph_dma
2022-10-27 14:36:10 +02:00
Marian Buschsieweke
5ddc332b52
cpu/stm32/periph_pwm: support pin remap for F1
Add support to route timer peripheral to alternative pins for the
STM32F1.
2022-10-27 14:28:06 +02:00
Marian Buschsieweke
b6845cef79
cpu/stm32/periph_qdec: support pin remap for F1
Add support to route peripheral to alternative pins for the STM32F1
family.
2022-10-27 14:28:06 +02:00
Juergen Fitschen
0151279ffe
Merge pull request #18780 from jue89/feature/efm32-series2
EFM32: add cpu family EFR32ZG23 and board xG23-PK6068A
2022-10-26 19:18:30 +02:00
Joshua DeWeese
4e2c63ce8c cpu/stm32/periph/dma: make dma_prepare() generic
This patch makes dma_prepare() handle register names a bit more
generically.
2022-10-26 09:36:45 -04:00
Joshua DeWeese
c888c103c2 cpu/stm32/periph/dma: fix dma_resume
As implmented, dma_resume assumed that transfers widths were 1 byte and
that the memory address incrmenting was always on and periphial address
incrementing always off. This resulted in memory corruption anytime
these assumptions were not true and a dma was resumed. The DMA module
allows intitiating transfers that did not meet these assumption.

This patch adds proper handling inside dma_resume to safely resume any
transfer. Clearifications and errors are added/fixed in the module's
header file. Also, a few constants are removed from the gobal namespace.
2022-10-26 09:36:45 -04:00
Joshua DeWeese
264a7c8ef9 cpu/stm32/periph/dma: fix DMA2 on STMF3 families
As it was, the calculation of DMA2's IRQ number was inccrorect for some
STM families. The implmentation alocates streams numbers 0 to 7 for the
first DMA controller and 8 and up for the second DMA controller. This
offset of +8 was not accounted for when IRQ's of the second DMA
controller was calculated. This patch corrects this.
2022-10-26 09:36:44 -04:00
Martine Lenders
669e21c7f5
Merge pull request #18735 from Teufelchen1/chore/native_macos
boards/native: Remove macOS as native target
2022-10-26 12:48:00 +02:00
Teufelchen1
35a06c4806 boards/native: Remove macOS as native target 2022-10-25 19:11:23 +02:00
Jue
ee2f5e981c cpu/efm32: add efr32zg23 family
Generated with the EFM2RIOT tool: https://github.com/basilfx/EFM2RIOT
2022-10-24 23:16:39 +02:00
Jue
2ce1df5cd6 cpu/efm32/wdt: add series 2 support 2022-10-24 23:16:39 +02:00
Jue
ccf327a32b cpu/efm32/hwrng: add series 2 periph driver 2022-10-24 23:16:39 +02:00
Jue
53e444ebc7 cpu/efm32/i2c: add series 2 support 2022-10-24 23:16:39 +02:00
Jue
2c2790dde2 cpu/efm32/spi: add series 2 support 2022-10-24 23:16:39 +02:00
Jue
568448f68c cpu/efm32/timer: add series 2 periph driver 2022-10-24 23:16:39 +02:00
Jue
42c9a3c9f1 cpu/efm32/uart: add series 2 periph driver 2022-10-24 23:16:38 +02:00
Jue
2b1a260c43 cpu/efm32/gpio: fix clock enable sequence for series 2 2022-10-24 23:16:38 +02:00
Jue
1c60c95733 cpu/efm32: setup EM4 mode for series 2 CPUs 2022-10-24 23:16:38 +02:00
Jue
775861510c cpu/efm32: allow series 2 boards to setup clock trees flexibly 2022-10-24 23:16:38 +02:00
benpicco
21956db2fd
Merge pull request #18776 from gschorcht/pkg/tinyusb_otg_hs_ulpi
pkg/tinyusb: add ULPI and UTMI+ HS PHY support for STM32 USB OTG HS ports
2022-10-21 20:19:23 +02:00
Gunar Schorcht
9c8ec851ce cpu/stm32: define CFG_TUSB_RHPORT{0,1}_MODE dependent on used USB ports 2022-10-21 11:43:55 +02:00
benpicco
f02113081b
Merge pull request #18779 from benpicco/socket_zep-crc16_ccitt
socket_zep: make use of crc16_ccitt_false_update()
2022-10-21 11:01:56 +02:00
Benjamin Valentin
2bb657c72c socket_zep: make use of crc16_ccitt 2022-10-20 13:08:30 +02:00
Juergen Fitschen
67b380034a cpu/efm32/pm: add debug output 2022-10-19 18:17:43 +02:00
Juergen Fitschen
360b36af16 cpu/efm32/pm: allow blocking EM1
Aligns pm logic to #17883
2022-10-19 17:51:12 +02:00