Francisco Molina
36baec4512
cpu/samd5x: add unified rtt configuration
2020-06-19 09:16:23 +02:00
Francisco Molina
f41b43e263
cpu/saml21: add unified rtt configuration
2020-06-19 09:16:23 +02:00
Francisco Molina
bcfe4bac0b
cpu/saml1x: add unified rtt configuration
2020-06-19 09:16:22 +02:00
Francisco Molina
eefb3fa555
cpu/samd21: add unified rtt configuration
2020-06-19 09:16:22 +02:00
Benjamin Valentin
5c3ae77df9
cpu/sam0_common: UART: allow RX only configuration
2020-06-19 00:33:50 +02:00
Leandro Lanzieri
8cc1fa4ce1
cpu/efm32: Add Kconfig symbols
2020-06-18 16:39:54 +02:00
Leandro Lanzieri
bb021f9e8e
cpu/efm32/efr32mg1p: Add Kconfig symbols
2020-06-18 16:39:53 +02:00
Leandro Lanzieri
d578adf845
cpu/efm32/efr32mg12p: Add Kconfig symbols
2020-06-18 16:39:53 +02:00
Leandro Lanzieri
89342b3aa8
cpu/efm32/efm32pg1b: Add Kconfig symbols
2020-06-18 16:39:53 +02:00
Leandro Lanzieri
777571a9e9
cpu/efm32/efm32pg12b: Add Kconfig symbols
2020-06-18 16:39:52 +02:00
Leandro Lanzieri
45c6d27cb5
cpu/efm32/efm32lg: Add Kconfig symbols
2020-06-18 16:39:52 +02:00
Leandro Lanzieri
4f3ec84c42
cpu/efm32/efm32gg: Add Kconfig symbols
2020-06-18 16:39:49 +02:00
Dylan Laduranty
00b14cce27
Merge pull request #14106 from benpicco/cpu/saml1x/pm_deep_flag
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cpu/saml1x: pm: set deep flag
2020-06-17 22:02:34 +02:00
Dylan Laduranty
6bf0a41399
Merge pull request #13600 from benpicco/sam0-gpio
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cpu/sam0_common: GPIO IRQ optimizations
2020-06-17 21:23:19 +02:00
Leandro Lanzieri
67ab640caf
cpu/atmega2560: Add Kconfig symbols
2020-06-17 12:44:30 +02:00
Francisco
112ff81f3e
Merge pull request #14176 from leandrolanzieri/pr/kconfig/atmega_boards_symbols
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boards/atmega328p-based: Model features in Kconfig
2020-06-17 12:22:31 +02:00
07c78efc83
Merge pull request #14285 from fjmolinas/pr_uart_nb_race
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sam0/stm32: fix possible uart_nonblocking deadlock
2020-06-17 12:14:25 +02:00
Francisco
4c05c0207f
Merge pull request #14300 from benpicco/cpu/sam0_common/uart_txinv
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cpu/sam0_common: UART: implement inverted RX & TX
2020-06-17 11:44:46 +02:00
Leandro Lanzieri
981aecf9cc
cpu/atmega328p: Add Kconfig symbols
2020-06-17 10:52:24 +02:00
Leandro Lanzieri
19bdb11548
cpu/atmega_common: Add Kconfig symbols
2020-06-17 10:52:23 +02:00
Francisco
5bb8c4b303
Merge pull request #14296 from leandrolanzieri/pr/cpu/adapt_kconfig_classification
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cpu/kconfig: Rename CPU classification symbols
2020-06-17 10:26:20 +02:00
Bas Stottelaar
219f631d20
Merge pull request #14233 from benemorius/pr/efm32-lfrco-jitter
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cpu/efm32: disable default LFRCO options that break LEUART > 1800 baud
2020-06-17 10:23:49 +02:00
Francisco Molina
80d682becd
cpu/sam0: avoid deadlock on nonblocking write
...
If a write to a full tsrb is attempted with disabled interrupts
or in a interrupt then a deadlock will occure. To avoid this make
space in the ringbuffer by synchronously writing to uart.
2020-06-17 10:01:21 +02:00
Francisco Molina
09f0fd4526
cpu/stm32: avoid deadlock on nonblocking write
...
If a write to a full tsrb is attempted with disabled interrupts
or in a interrupt then a deadlock will occure. To avoid this make
space in the ringbuffer by synchrnously writing to uart.
2020-06-17 10:01:21 +02:00
Francisco Molina
0b8adb2d27
cpu/sam0-stm32/uart: rename tx buf size to UART_TXBUF_SIZE
2020-06-17 10:01:20 +02:00
Francisco Molina
dd331c91d3
cpu/stm32/uart: enable irq for non blocking uart
2020-06-17 10:01:19 +02:00
Thomas Stilwell
e987abe9fc
cpu/efm32: disable default LFRCO options that break LEUART > 1800 baud
2020-06-17 01:47:29 -05:00
Benjamin Valentin
585dc15f99
cpu/sam0_common: UART: implement inverted RX & TX
...
The UART TX and TX lines on SAMD5x and SAML1x can be inverted.
However, the flags don't do exactly what one would expect.
See errata 2.18.5: SERCOM-UART: TXINV and RXINV Bits Reference:
> The TXINV and RXINV bits in the CTRLA register have inverted functionality.
>
> Workaround:
> In software interpret the TXINV bit as a functionality of RXINV, and conversely,
> interpret the RXINV bit as a functionality of TXINV.
2020-06-16 22:55:37 +02:00
Dylan Laduranty
5e625adcf5
Merge pull request #12132 from ant9000/pr/saml21_usbdev_48mhz_clock
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cpu/saml21: enable 48mhz clock for usbdev
2020-06-16 21:02:41 +02:00
Leandro Lanzieri
d87f0cc66b
cpu/kconfig: Rename CPU classification symbols
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This removes the `CPU_FAMILY` and `CPU_SERIES` common CPU symbols and
adds `CPU_FAM` instead.
2020-06-16 14:27:27 +02:00
Leandro Lanzieri
2c4c04d11b
cpu/cortexm_common: Unify Kconfig and Makefile arch identifiers
2020-06-16 12:05:41 +02:00
Leandro Lanzieri
5dc29886b3
cpu/kinetis: Include CPU information in Makefile.features
2020-06-16 12:05:41 +02:00
Leandro Lanzieri
649017f0b2
cpu/cortexm_common: Rename arch_cortexm feature to cpu_core_cortexm
2020-06-16 12:05:41 +02:00
Leandro Lanzieri
4d65bc8e0a
cpu: Rename CPU_ARCH to CPU_CORE
2020-06-16 12:05:40 +02:00
Francisco
b041221905
Merge pull request #13825 from kaspar030/cortexm_free_svc
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cpu/cortexm: "free" SVC
2020-06-16 10:31:09 +02:00
Antonio Galea
3076ee837d
cpu/saml21: add clock configuration for usbdev
...
Co-authored-by: dylad <dylan.laduranty@mesotic.com>
2020-06-15 11:52:13 +02:00
benpicco
1992f57765
Merge pull request #14261 from bergzand/pr/sam0_common/spi_dma
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sam0_common: Make SPI peripheral DMA compatible
2020-06-14 18:25:37 +02:00
60f4502e6c
cpu/sam0_common: Make SPI peripheral DMA compatible
2020-06-14 14:56:20 +02:00
22c8788b58
sam0_common/dma: Rename len to num
2020-06-14 11:51:36 +02:00
02b2b58358
sam0_common: Add additional documentation on DMA usage
2020-06-14 11:48:43 +02:00
7a8566c391
sam0_common/dma: Mark src parameter as const
2020-06-13 21:02:04 +02:00
benpicco
74299a2b03
Merge pull request #14260 from bergzand/pr/sam0_common/dma_periph
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sam0_common: Add DMA peripheral driver
2020-06-12 21:18:31 +02:00
ec1d575e7c
cpu/saml1x: Add DMA peripheral to init
2020-06-12 20:04:05 +02:00
4ef0b85495
cpu/saml21: Add DMA peripheral to init
2020-06-12 20:04:05 +02:00
73c8911e62
cpu/samd5x: Add DMA peripheral to init
2020-06-12 20:04:05 +02:00
5dc1d87f74
cpu/samd21: add DMA peripheral to init
2020-06-12 20:04:05 +02:00
6be1b27bbb
sam0_common: Add DMA peripheral driver
2020-06-12 20:04:05 +02:00
benpicco
8ed8775c8e
Merge pull request #14269 from benpicco/cpu/sam0_common/timer_drop_prescaler
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cpu/sam0_common: drop prescaler from timer config
2020-06-12 14:16:59 +02:00
ac8e27aab6
Merge pull request #14247 from fjmolinas/pr_stm32f1_nb
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cpu/stm32: add non blocking uart
2020-06-11 21:40:27 +02:00
Benjamin Valentin
54b57bd97f
cpu/sam0_common: drop prescaler from timer config
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since c05984b341
2020-06-11 19:29:43 +02:00
Akshai M
6450d9989e
gnrc/pktbuf : Set Kconfig defaults and conditions
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Set Kconfig defaults for CPU and conditions to avoid
conflict with CFLAGS
Co-authored-by: Leandro Lanzieri <leandro.lanzieri@haw-hamburg.de>
2020-06-11 14:47:27 +05:30
Akshai M
5523d119b6
gnrc/pktbuf : Move 'GNRC_PKTBUF_SIZE' to 'CONFIG_'
2020-06-11 14:46:36 +05:30
Francisco Molina
3107993434
cpu/stm32: add non blocking uart
...
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2020-06-11 09:51:41 +02:00
Benjamin Valentin
b46ddebc81
cpu/cc26x2_cc13x2: rename aux.c to restore Windows compatibility
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AUX.* is a reserved file name on Windows.
https://docs.microsoft.com/de-de/windows/win32/fileio/naming-a-file
fixes #14253
2020-06-10 23:24:09 +02:00
benpicco
f75c971297
Merge pull request #14119 from benpicco/cpu/stm32_usb_bootloader
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cpu/stm32: implement reset to bootloader
2020-06-10 23:13:50 +02:00
8466946ea1
cpu/cortexm_common/Kconfig: add cortexm_svc feature
2020-06-10 23:13:43 +02:00
dbe7331d10
cpu/cortexm: "free" SVC
2020-06-10 23:12:58 +02:00
Leandro Lanzieri
58cd126517
Merge pull request #14210 from btcven/2020_06_04-cc26xx_cc13xx_kconfig
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boards/cc26xx_cc13xx-based: model features in Kconfig
2020-06-10 11:27:31 +02:00
Francisco
6c65fa72d7
Merge pull request #14204 from kaspar030/rename_native_trace
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cpu/native: rename trace -> backtrace
2020-06-09 16:37:26 +02:00
Jean Pierre Dudey
132d936df7
cpu/cc26x0: model features in Kconfig
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-06-09 07:55:41 -05:00
89b5778381
Merge pull request #14097 from bergzand/pr/stm32_common/spi/optimize_hot_path
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STM32_common/SPI: Reduce the overhead in the DMA hot path
2020-06-09 11:10:04 +02:00
29739be13a
stm32/spi: Use new DMA setup/prepare functions
2020-06-09 10:20:50 +02:00
b7d0cbcd57
stm32/spi: Remove superfluous DMA stop call
...
The DMA stream will automatically disable itself as soon as the transfer
is finished. No need to do this an additional time after the transfer is
finished
2020-06-09 10:20:49 +02:00
fddf0897e8
stm32/spi: Acquire/release the DMA during the SPI acquire/release
2020-06-09 10:20:49 +02:00
3a8dd32265
stm32/spi: Reduce register writes in hot path
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This combines a number of register writes in the SPI
acquire and transfer code. The DMA enable for SPI is moved to the
acquire function, switching between DMA and regular transfer between
acquires is not possible.
2020-06-09 10:20:49 +02:00
Jean Pierre Dudey
e9a2dcd1e0
cpu/cc26x2_cc13x2: model features in Kconfig
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-06-08 08:23:45 -05:00
Jean Pierre Dudey
d9580514a3
cpu/cc26xx_cc13xx: model features in Kconfig
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-06-08 08:23:45 -05:00
Toon Stegen
ac9afbe4f5
cpu/stm32_common: disable i2c in release
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the hardware peripheral should be disabled before stopping the
peripheral clock.
2020-06-08 12:27:03 +02:00
Benjamin Valentin
824f7aa82b
cpu/sam0_common: move PWM to common code
2020-06-07 16:50:17 +02:00
Benjamin Valentin
0819f0eb39
cpu/stm32: implement reset to bootloader
...
The STM32 line of microcontrollers comes with a bootloader in the ROM.
It provides the option to flash the device firmware in DFU mode (USB)
or via UART or SPI.
To enter the bootloader we have to jump to a specific address in memory,
but before reset the CPU to make sure the system is in a known state.
This enables us to use the usb_board_reset module on all STM32 platforms.
2020-06-05 18:41:06 +02:00
Jean Pierre Dudey
fea44e8b35
cpu/cortexm_common: add HAS_CORTEX_MPU feature
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-06-04 22:16:43 -05:00
49375e1e10
cpu/native: rename trace -> backtrace
2020-06-04 14:37:01 +02:00
Leandro Lanzieri
67a43e0ada
drivers/wdt/kconfig: Rename HAS_WDT_WARNING_PERIOD
...
The symbol now is HAS_PERIPH_WDT_WARNING_PERIOD.
2020-06-02 17:43:19 +02:00
Leandro Lanzieri
004162060e
cpu/samd21: Add CPU series specific Kconfig symbols
2020-06-02 17:42:16 +02:00
Leandro Lanzieri
079a7ee1e5
cpu/sam0_common: Add family specific Kconfig symbols
2020-06-02 17:42:10 +02:00
José Alamos
892032907f
Merge pull request #14187 from leandrolanzieri/pr/periph/wdt_add_warning_period_feature
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drivers/wdt: Add feature to indicate a configurable warning period
2020-06-02 17:18:40 +02:00
460c396101
stm32/spi: Add define for default CR2 settings
2020-06-02 16:04:02 +02:00
c28477a4f0
Merge pull request #14096 from bergzand/pr/stm32_common/dma/optimize_hot_path
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STM32_common/dma: Optimize the latency in the hot path
2020-06-02 16:01:27 +02:00
2f6cc5fe56
Merge pull request #14165 from bergzand/pr/nrf52/i2c_mutex_irq
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nrf52/i2c: Use mutex and IRQ for blocking
2020-06-02 15:36:04 +02:00
a3f8a381ab
Merge pull request #14183 from benpicco/cpu/stm32/Makefile.features-HWRNG
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cpu/stm32/Makefile.features: capture whole family
2020-06-02 14:26:23 +02:00
Leandro Lanzieri
48759eccdc
drivers/wdt: Add feature to indicate a configurable warning period
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This adds the feature `periph_wdt_warning_period` that indicates that a
platform WDT driver implementation supports a configurable
CONFIG_WDT_WARNING_PERIOD.
2020-06-02 12:54:25 +02:00
f583f388be
stm32/dma: Cache DMA stream base address
2020-06-02 11:52:11 +02:00
9ab7e7ef33
stm32/dma: add setup and prepare functions
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This commit adds two new functions to the DMA peripheral code for the
stm32. The setup function allows for a one-time setup of peripheral
config. The prepare function does the per-transfer setup. This allows
for a single setup call during the peripheral lock step and a
per-transfer call to the prepare function.
2020-06-02 11:52:11 +02:00
bdeec688f5
Merge pull request #14174 from benpicco/cpu/stm32_usb_includes
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cpu/stm32: don't include usbdev_stm32.h in periph_cpu_common.h
2020-06-02 11:42:19 +02:00
83a6ad182d
nrf52/i2c: Use mutex and IRQ for blocking
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This commit enhances the I2C code of the nRF52 family to block on a
mutex while the I2C transfer is busy. The mutex is unlocked in the ISR
when it is trigger by either a stop condition or an error condition.
2020-06-02 10:24:40 +02:00
Benjamin Valentin
2c346387f6
cpu/stm32/Makefile.features: capture whole family
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All members of the stm32f401* family (etc) don't have the HWRNG
peripheral.
Apply a broader wildcard so we don't have to touch this file when
adding new boards with slightly different MCUs.
2020-06-01 16:25:37 +02:00
benpicco
7286c32b5d
Merge pull request #14144 from aabadie/pr/cpu/stm32_cleanup_tim_ccr
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cpu/stm32: cleanup timer structure in vendor headers
2020-06-01 16:18:57 +02:00
benpicco
1ac9e70f57
Merge pull request #14177 from GabrielDai/blxxxpill-qdec
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cpu/stm32: add qdec support for CPU_FAM_STM32F1
2020-06-01 16:17:45 +02:00
a858c980c4
cpu/stm32: fix remaining occurence of stm32f1 cpu family
2020-05-30 18:59:36 +02:00
2448b26a8b
cpu/stm32: fix issue with cpu feature name
2020-05-30 18:59:01 +02:00
Gabriel Moyano
52ddeeedb0
cpu/stm32: add qdec support for CPU_FAM_STM32F1
2020-05-29 21:11:54 +02:00
e35914612e
cpu/stm32: restore timer structure in vendor headers
2020-05-29 18:22:00 +02:00
2dc0ec00a1
cpu/stm32: adapt timer driver to common CMSIS timer structure
2020-05-29 18:22:00 +02:00
Benjamin Valentin
7c8f44a368
cpu/stm32: filter availability of RNG by CPU not by board.
...
The old limitation is not valid anymore, we can evaluate $(CPU_MODEL)
here directly.
The output of
make -C tests/periph_hwrng info-boards-supported | wc -w
remains the same.
2020-05-29 18:01:12 +02:00
Benjamin Valentin
e957f339d3
cpu/stm32: don't include usbdev_stm32.h in periph_cpu_common.h
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`usbdev_stm32.h` will pull in `usb.h` which causes an error if
`USB_H_USER_IS_RIOT_INTERNAL` is not set.
Turns out this include is not needed, so just drop it.
2020-05-29 17:42:19 +02:00
benpicco
d0a5e0527b
Merge pull request #14168 from leandrolanzieri/pr/dist/buildsystem_check_features_provided
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sam0_common: Move feature to Makefile.features and add buildsystem check
2020-05-29 17:27:07 +02:00
Leandro Lanzieri
106ab65d7b
cpu/saml21: Check CPU_MODEL to provide periph_hwrng
2020-05-29 16:19:00 +02:00
Leandro Lanzieri
12470f0ed2
cpu/sam0_common: Move periph_timer_periodic feature to Makefile.features
2020-05-29 11:13:59 +02:00
benpicco
49aef1b678
Merge pull request #13902 from benpicco/periph_timer_periodic
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periph/timer: add timer_set_periodic()
2020-05-28 18:03:32 +02:00
Benjamin Valentin
c000a77658
cpu/atmega_common: implement timer_set_periodic()
2020-05-28 17:37:42 +02:00
Benjamin Valentin
8486e8c6d1
cpu/sam0_common: implement timer_set_periodic()
2020-05-28 17:37:42 +02:00
Benjamin Valentin
41a961be22
cpu/lpc2387: timer: implement timer_set_periodic()
2020-05-28 17:37:41 +02:00
benpicco
2183fb9273
Merge pull request #14155 from maribu/atmega_timer_cleanup
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cpu/atmega*: Clean up timer configs
2020-05-28 17:33:31 +02:00
Marian Buschsieweke
fb722b1be7
cpu/atmega_common/periph_timer: Fix style
2020-05-28 16:27:08 +02:00
Marian Buschsieweke
dfa6863275
cpu/atmega{1281,2560}: Relocate default timer config
2020-05-28 16:27:08 +02:00
Marian Buschsieweke
044a3f9a4c
cpu/atmega1284p: Relocate default timer config
2020-05-28 16:27:07 +02:00
Marian Buschsieweke
200afc46fa
cpu/atmega328p: Relocate default timer config
2020-05-28 16:27:07 +02:00
Marian Buschsieweke
a950d6bbb6
cpu/atmega{128rfa1,256rfr2}: Relocate default timer config
2020-05-28 16:27:07 +02:00
Marian Buschsieweke
9138e48746
cpu/atmega32u4: Relocate default timer config
2020-05-28 16:27:06 +02:00
José Alamos
917cc66e48
Merge pull request #14162 from jia200x/pr/kconfig/cortex
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Kconfig/armv7_m/cortexm: declare CPU_ARCH and CPU_CORE symbols
2020-05-28 14:59:37 +02:00
Leandro Lanzieri
be8289bd8d
cpu/cortexm_common: Add Kconfig symbols
...
This declares the architecture and core specific Kconfig symbols and the
features provided by it are selected.
2020-05-28 14:11:21 +02:00
Benjamin Valentin
7c11ae9dcc
cpu/lpc2387: use TIMER_CHANNELS for consistency
2020-05-28 13:24:06 +02:00
Benjamin Valentin
ec7ae668e2
cpu/sam0_common: define TIMER_CHANNELS
2020-05-28 13:24:06 +02:00
benpicco
8a2b089cd5
Merge pull request #14098 from maribu/atmega-timer
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cpu/atmega_common: Fix periph_timer
2020-05-28 13:23:22 +02:00
Marian Buschsieweke
99bd1c318c
cpu/atmega_common/periph_timer: Add timer_set
...
Added a low level implementation of timer_set() that allows setting relative
timeouts as short as 0. This results in tests/periph_timer_short_relative_set
no passing.
2020-05-28 11:46:02 +02:00
Leandro Lanzieri
9d4582547f
cpu/Kconfig: Add a common symbol for the CPU Core
2020-05-28 10:08:34 +02:00
3244b26ab4
Merge pull request #14141 from aabadie/pr/cpu/stm32_fam_short
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cpu/stm32: use shorten name in CPU_FAM variable
2020-05-27 08:40:01 +02:00
8593176e29
Merge pull request #14140 from aabadie/pr/cpu/stm32_uid_base
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cpu/stm32: get the cpuid address from the UID_BASE constant defined in CMSIS
2020-05-27 08:39:35 +02:00
af8c4a32f6
Merge pull request #14147 from aabadie/pr/cpu/stm32f1_gpio_cleanup
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cpu/stm32f1: restore default gpio struct in CMSIS + adapt driver
2020-05-27 08:39:17 +02:00
31c6a225b2
Merge pull request #14145 from aabadie/pr/cpu/stm32_cleanup_exti
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cpu/stm32: restore default attribute names in exti structure for l4 and wb
2020-05-26 18:34:36 +02:00
cc9219c96e
cpu/stm32f1: adapt gpio driver and usage to CMSIS struct
2020-05-26 18:10:04 +02:00
Peter Kietzmann
4831300a6a
Merge pull request #14111 from leandrolanzieri/pr/cpu/kinetis/cleanup_dependencies
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cpu/kinetis: Move dependencies to Makefile.dep
2020-05-26 17:31:09 +02:00
c40f0a79bf
cpu/stm32: adapt rtc driver to default CMSIS exti structure
2020-05-26 17:29:37 +02:00
09c1afe9c5
cpu/stm32l4/wb: restore exti structure in vendor headers
2020-05-26 17:24:59 +02:00
97942ddbe6
cpu/stm32: adapt gpio driver to default CMSIS exti structure
2020-05-26 17:24:58 +02:00
Francisco
3ef40f3321
Merge pull request #14085 from maribu/atmega_irq
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cpu/atmega_common: Update to inlineable IRQ API
2020-05-26 16:33:07 +02:00
1a8f4d4f25
cpu/stm32f1: restore gpio struct to default in CMSIS header
2020-05-26 16:26:20 +02:00
61d3afcb63
cpu/stm32: remove hardcoded cpuid addr for f1
2020-05-26 15:44:50 +02:00
d78c955e50
cpu/stm32: remove hardcoded cpuid addr for f0
2020-05-26 15:44:50 +02:00
98a30ddadf
cpu/stm32: remove not needed periph_cpu.h for f3
2020-05-26 15:44:50 +02:00
4e33cebb3d
cpu/stm32: remove not needed periph_cpu.h for f7
2020-05-26 15:44:50 +02:00
bf01940ec7
cpu/stm32: use UID_BASE when possible
2020-05-26 15:44:50 +02:00
2313b85a8d
cpu/stm32: use UID_BASE from CMSIS when not defined
2020-05-26 15:44:50 +02:00
Marian Buschsieweke
9e566370bf
cpu/atmega_common: Fixed irq_arch implementation
...
The inline assembly implementation was badly in need of improvement.
- irq_disable() took 2 CPU cycles more than needed
- The current interrupt state was stored in a temporary register and
afterwards copied to the target register, rather than storing it in the
target register right away
- The lower bits of the state were cleared (as they have no meaning for the
interrupt status), but the API purposely never required such things from
implementations.
- irq_restore() took 5 CPU cycles. This was reduced to 3 CPU cycles (or 2 CPU
cycles in the best case)
2020-05-26 15:19:14 +02:00
7bfdd7718f
cpu/stm32: introduce CPU_FAM_SHORT variable
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This variable contains the short cpu family name: f1, f2, etc.
2020-05-26 12:27:12 +02:00
8959274165
cpu/stm32: update vendor headers for f1
2020-05-26 11:43:45 +02:00
1e4da87aad
cpu/stm32: update vendor headers for f0
2020-05-26 11:43:44 +02:00
4f96cdbfcd
cpu/stm32: update stm32f334 vendor header
2020-05-26 11:43:44 +02:00
8a5ea2638b
cpu/stm32: update stm32f2 vendor headers
2020-05-26 11:43:44 +02:00
4f30f27e9d
cpu/stm32: update stm32f72x vendor headers
2020-05-26 11:43:37 +02:00
benpicco
3a30db4029
Merge pull request #13895 from gschorcht/cpu/esp32/fix_i2c_gpio_32_33
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cpu/esp32: fix GPIO32 and GPIO 33 as I2C pins
2020-05-25 22:37:35 +02:00
benpicco
a5836a6b27
Merge pull request #14128 from btcven/2020_05_24-cc13x2-i2c
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cc26xx_cc13xx: add periph_i2c implementation
2020-05-25 22:35:55 +02:00
benpicco
4f295a439b
Merge pull request #14131 from aabadie/pr/cpu/stmclk_cleanup
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cpu/stm32: move stmclk in its own module, remove useless ifdefs
2020-05-25 20:42:11 +02:00
46c4803eba
cpu/stm32: remove useless ifdef around DMA definitions
2020-05-25 13:23:20 +02:00
Jean Pierre Dudey
0f3393d61a
cpu/cc26x0: move i2c code to cc26xx_cc13xx
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-05-24 12:44:09 -05:00
Juergen Fitschen
df90176b1f
cpu/sam0_common/spi: move clk pin muxing into spi_acquire / spi_release
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When the SPI peripheral is disabled, the output lines will become HIGH-Z.
If the clk pin is not pulled HIGH or LOW, connected SPI slaves will start drawing current expectedly.
2020-05-23 13:54:39 +02:00
63a79ae6e4
cpu/stm32: move stmclk in its own module, remove useless ifdefs
2020-05-22 21:21:08 +02:00
Benjamin Valentin
7803cc053c
cpu/stm32: rtc_f1.c: remove executable bit
2020-05-21 11:43:25 +02:00
138c0c2a54
stm32/dma: Remove superfluous asserts from DMA hot path
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This commit removes a number of assert statements that should already
have been hit before. This is the reason that the assert in the
acquire function is left.
2020-05-21 11:34:54 +02:00
6793e7473b
stm32/dma: Move clear flags to acquire
2020-05-21 11:34:53 +02:00
977d227213
stm32/dma: Move FCR configuration to acquire function
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The FCR register content might change during mem-to-mem DMA transfers,
Forcing it back in the acquire should be sufficient to ensure proper
operations.
2020-05-21 11:34:52 +02:00
d7b1b7fc7c
stm32/dma: Move one-time config to init function
2020-05-21 11:34:46 +02:00
767329ef25
Merge pull request #14021 from aabadie/pr/cpu/stm32_unique
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cpu/stm32: refactor to use a single directory
2020-05-21 11:05:38 +02:00
Leandro Lanzieri
2ad14e4242
cpu/kinetis: Move dependencies to Makefile.dep
2020-05-20 19:46:13 +02:00
Leandro Lanzieri
9f41acaac6
cpu/native: Move dependencies to Makefile.dep
2020-05-20 18:24:39 +02:00
Benjamin Valentin
e1ca9102d5
cpu/saml1x: pm: set deep flag
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STANDBY mode is considered Deep Sleep on all other sam0 platforms.
Set it here too to be consistent.
2020-05-20 17:17:11 +02:00
b6d2231d6d
cpu/stm32: adapt Doxygen documentation
2020-05-20 13:39:11 +02:00
c50afaaf1b
cpu/stm32: remove redundant variables computations
2020-05-20 13:39:10 +02:00
36f6de3ce6
cpu/stm32: unify riotboot specific configuration
2020-05-20 13:39:10 +02:00
81e3e46fc5
cpu/stm32: remove old stm32xx_line.mk
2020-05-20 13:39:10 +02:00
5870e5d647
cpu/stm32: unify stm32_line.mk files
2020-05-20 13:39:10 +02:00
7d4b29530a
cpu/stm32*: remove old and unused stm32 dirs
2020-05-20 13:39:10 +02:00
5c810d8535
cpu/stm32: introduce unique directory for stm32 cpus
2020-05-20 13:39:10 +02:00
Vincent Dupont
8d9cc3f7e6
Merge pull request #14100 from OTAkeys/fix/exti_pr_clear_issue_upstream
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cpu/stm32_common: fix issue while clearing EXTI->PR reg
2020-05-19 15:08:52 +02:00
b15c4ef418
Merge pull request #14069 from benpicco/cpu/nrf52-cleanup
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cpu/nrf52: update & fix vendor files, derive flash settings
2020-05-19 10:55:50 +02:00
Marian Buschsieweke
067a9c38ae
cpu/atmega_common: Fix race in periph_timer
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As AVR is an 8 bit platform, special care needs to be taken when accessing 16
bit registers in an atomic fashion. This commit as just this care.
2020-05-18 21:22:31 +02:00
benpicco
9f707bf121
Merge pull request #14057 from bergzand/pr/nrf52/dma_spi
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nrf52: Implement EasyDMA-based SPI peripheral implemenation
2020-05-18 19:42:33 +02:00
16ff94b4fe
nrf5x: remove common nrf5x spi peripheral driver
2020-05-18 19:18:28 +02:00
99a59c5dbd
nrf5x: Extend gpio with exti channel retrieval
2020-05-18 19:17:29 +02:00
720ccad7dd
nrf52: Add EasyDMA-based SPI periph driver
2020-05-18 19:16:17 +02:00
1139c0737f
nrf52: add common SPI/I2C IRQ code
2020-05-18 19:14:56 +02:00
Abdulkerim Altuntas
578bd31908
cpu/stm32_common: fix issue while clearing EXTI->PR reg
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Since the "EXTI->PR" is an "rc_w1" type of register, we need to be
careful when clearing our interrupt flag in the register. When there
are multiple interrupt flags set in the register, the "|=" operation
will mistakenly clear all pending interrupts instead of just ours.
2020-05-18 18:36:27 +02:00
Marian Buschsieweke
ba5844098d
cpu/atmega_common: Make irq_arch inline-able
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- Moved irq_arch.c to irq_arch.h and marked all functions as
`__attribute__((always_inline)) static inline`
2020-05-17 18:41:11 +02:00
benpicco
cc44992abe
Merge pull request #12827 from maribu/atmega_pwm
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cpu/atmega_common/periph/pwm: Minor fix & cleanup
2020-05-16 22:26:58 +02:00
Marian Buschsieweke
506288791d
cpu/atmega_common/periph/pwm: Minor fix & cleanup
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- On pwm_poweron, the PWM resolution was not restored. (A custom resolution was
only usable if, PWM channel 0 is not used. That configuration is not common,
so this bug was likely never triggered)
- Disabled a work around to prevent flickering:
- Previously, PWM was disconnected on level 0% and 100%
- This increases the run time of `pwm_set()`
- It prevents using the PWM for wave form generation via DDS, as the wave
noticeably jumps when reaching 0% or 100%
- Slightly reduces memory requirements: 2 Bytes of RAM, 112 Bytes of ROM
- Tested with avr-gcc 9.2.0 and LTO enabled
2020-05-16 20:43:31 +02:00
Benjamin Valentin
bdf40d5ffa
cpu/nrf52: fix NRF52811 vendor file
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That `system_nrf52811.h` include must be removed.
2020-05-16 19:22:14 +02:00
Benjamin Valentin
d8a5f87aee
cpu/nrf52: update vendor files
2020-05-16 19:21:56 +02:00
benpicco
22b2f3664f
Merge pull request #14089 from maribu/atmega_cpu_cleanup
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cpu/atmega{_common,32u4}: Cleanup
2020-05-16 19:17:29 +02:00
Benjamin Valentin
e26ed32cd6
cpu/arm7_common: simplify irq_restore()
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We do not manipulate the CPSR register outside of irq_%, so we can just
restore it's previous value and don't have to fiddle with the IRQ MASK bit.
See https://www.keil.com/pack/doc/CMSIS/Core_A/html/group__CMSIS__CPSR.html
2020-05-15 13:43:04 +02:00
Benjamin Valentin
8d0e902d38
cpu/arm7_common: add inlined header only def for irq_%
2020-05-15 13:43:04 +02:00
Marian Buschsieweke
2f3961690e
cpu/atmega_common: Add feature PUF_SRAM
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The feature is implemented in `cpu/atmega_common`, so we can just enable it for
all ATmega boards.
2020-05-15 11:31:23 +02:00
Marian Buschsieweke
355b01ce98
cpu/atmega_common: Moved atmega_state to cpu.c
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The global state flags should never have bin in irq_arch.c but in cpu.c. This
is not fixed.
2020-05-15 11:24:29 +02:00
Marian Buschsieweke
4d1a5b9256
cpu/atmega_common: Drop legacy include
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Drop `#include "irq.h"` in `cpu.h`, which was there for a legacy work around.
A bunch of missing includes of `irq.h` materialized due to this and were
fixed.
2020-05-15 11:24:28 +02:00
Marian Buschsieweke
70f24edd03
cpu/atmega32u4: Clean up
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- Drop duplicated `cpu.c` and `cpu_conf.h`: Those are already provided by
`cpu/atmega_common`.
- The higher values for default stack size of `cpu_conf.h` in
`cpu/atmega_common` results in three tests no longer fitting the available RAM
==> Updated the Makefile.ci to skip linking of those tests for the Arduino
Leonardo
2020-05-15 11:23:05 +02:00
3b0510f9bc
Merge pull request #14077 from maribu/esp32-external-board
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cpu/esp*: Allow compilation with external boards
2020-05-14 21:16:54 +02:00
Francisco
1f9d299492
Merge pull request #13196 from HendrikVE/shell-readline-refactor
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sys/shell: refactor readline function
2020-05-14 15:32:45 +02:00
Marian Buschsieweke
fc28ba5c08
cpu/esp8266: Allow compilation with external boards
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Replace `$(RIOTBOARD)/$(BOARD)` with `$(BOARDDIR)`, which also works for
external boards.
2020-05-14 13:35:51 +02:00
Marian Buschsieweke
1dbcdd3d4b
cpu/esp32: Allow compilation with external boards
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Replace `$(RIOTBOARD)/$(BOARD)` with `$(BOARDDIR)`, which also works for
external boards.
2020-05-14 13:32:19 +02:00
Kees Bakker
5ef4b1843a
Merge pull request #14032 from benpicco/cpu/sam0_common-rtc_cleanup
2020-05-13 22:54:31 +02:00
da2230df48
Merge pull request #13999 from fjmolinas/pr_cortexm_inline_irq
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cpu/cortexm_common: add inlined header only def for irq_%
2020-05-12 21:15:57 +02:00
8761c47e43
nrf51: move common SPI implementation
2020-05-12 19:15:25 +02:00
Benjamin Valentin
d34551e8da
cpu/nrf52: use vendor defines for flash size
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We don't need to define FLASHPAGE_SIZE and FLASHPAGE_NUMOF ourself if
the BPROT peripheral is present.
Now why nrf52840 doesn't have it, I don't know, but for nrf52832 and
nrf23811 the values in BPROT_REGIONS_SIZE and BPROT_REGIONS_NUM match
the values manually provided here before.
2020-05-12 18:10:15 +02:00
Gunar Schorcht
fef3c101b7
Revert "cpu/esp_common: fix dependency of flash target on ELF file"
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This reverts commit d0cc955394
2020-05-12 18:07:48 +02:00
Francisco Molina
b5e4224a6f
cpu/cortexm_common: remove special cortexm_sleep handle for stm32l152re
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__set_PRIMASK(state) had been directly inlined to avoid a hardfault that
occured when branching after waking up from sleep with DBG_STANDBY,
DBG_STOP or DBG_SLEEP set in DBG_CR.
The hardfault occured when returning from the branch to irq_restore,
since the function is now inlined the branch does not happen either.
Refer to #14015 for more details.
2020-05-12 16:37:34 +02:00
Francisco Molina
4ad3164599
cpu/cortexm_common/irq_arch: fix irq_enable return type
2020-05-12 16:37:34 +02:00
Francisco Molina
cb5cbe7431
cpu/cortexm_common: add inlined header only def for irq_%
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irq_% are not inlined by the compiler which leads to it branching
to a function that actually implement a single machine instruction.
Inlining these functions makes the call more efficient as well as
saving some bytes in ROM.
2020-05-12 16:37:34 +02:00
Benjamin Valentin
20a044c956
cpu/nrf52: fix nrf52811 interrupt vector table
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SPI1 and TWI0 share the same IRQ, not SPI1 and TWI1
2020-05-12 15:10:06 +02:00
Benjamin Valentin
d53bc7bf73
cpu/nrf52: add peripherals.h vendor files
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Those make our lives much easier.
2020-05-12 14:52:06 +02:00
Benjamin Valentin
fb2f2c456f
cpu/nrf52: add nrf52811 vendor files
2020-05-12 14:49:26 +02:00
Philipp Blum
35dcf637f2
cpu/nrf52: add support for nrf52811
2020-05-10 17:10:33 +02:00
benpicco
0bbc86a379
Merge pull request #14041 from gschorcht/cpu/esp/fix_make_flash_dependency
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cpu/esp_common: fix the dependency of the flash image on the ELF file
2020-05-08 11:55:14 +02:00
Gunar Schorcht
d0cc955394
cpu/esp_common: fix dependency of flash target on ELF file
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Flashing an ESP board first requires the creation of a flash image from the ELF file. This is realized in the `preflash` target. However, the `preflash` target only depends on the variable `BUILD_BEFORE_FLASH` but on the ELF file. Therefore, the variable `BUILD_BEFORE_FLASH` must be set to the ELF file to ensure that when using multiple make processes, the compilation of the ELF file is completed before the flash image is created.
2020-05-08 11:03:39 +02:00
Marian Buschsieweke
0fe24e1c8b
Merge pull request #13903 from benpicco/cpu/lpc2387/timer_pclk_scale
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cpu/lpc2387: timer: use lpc2387_pclk_scale()
2020-05-07 22:04:14 +02:00
fabian18
a3a1c160ee
mtd: Change API to return 0 on success
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Returning the number of bytes written/read could return a negative integer
because a uint32_t is expected for the length in read()/write() operations.
2020-05-06 20:24:27 +02:00
Francisco Molina
bd3eff3537
cpu/esp32: switch from O2 to Os
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In #12955 optimization was switched to O2 because with the '-Os'
option, the ESP32 hangs sporadically in 'tests/bench*' if
interrupts where disabled too early by benchmark tests.
Since it hasn't been reproduced since and in #13196 O2 was causing
un-explained hardfaults, since the aforementioned issue could not
be reproduced we switch back to Os by removing O2, as Os will be
used by default.
2020-05-06 18:46:43 +02:00
Benjamin Valentin
5481d8c73a
cpu/sam0_common: clean up formatting
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Make the code nicer to read.
2020-05-06 14:11:47 +02:00
Benjamin Valentin
e93c9a82f1
cpu/sam0_common: RTC INTFLAG are clear on write
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Writing a 1 bit clears the interrupt flag, writing with |= is thus
uneccecary (and actually an error as this would clear *all* flags).
This cleanup was already done for rtt.c, but rtc.c missed out.
2020-05-06 14:05:12 +02:00
Francisco
cea0d1c532
Merge pull request #13421 from benpicco/cpu/sam0_common/i2c-deinit
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drivers/periph/i2c: add periph_i2c_reconfigure feature & implementation for sam0
2020-05-05 19:09:47 +02:00
5773db93f8
Merge pull request #14025 from fjmolinas/pr_nrf5x_rtt_conf
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boards/common/nrf5x: add configurable RTT_FREQUENCY
2020-05-05 17:46:05 +02:00
Benjamin Valentin
8c502322f4
cpu/sam0_common: i2c: implement the periph_i2c_reconfigure feature
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This adds sam0 implementations for
- i2c_init_pins()
- i2c_deinit_pins()
- i2c_pin_sda()
- i2c_pin_scl()
2020-05-05 16:12:19 +02:00
Francisco Molina
409185c5ce
boards/common/nrf5x: add configurable RTT_FREQUENCY
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Adds: RTT_MAX_FREQUENCY, RTT_MIN_FREQUENCY & RTT_CLOCK_FREQUENCY
2020-05-05 14:52:55 +02:00
cab264a056
cpu/lm4f120: fix invalid doxygen group name
2020-05-05 14:08:32 +02:00
Semjon Kerner
cb228a44f2
Merge pull request #14002 from PeterKietzmann/pr_nrf5x_hwrng_biascorr
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cpu/nrf5x_common: enable bias correction in hwrng
2020-05-05 13:40:15 +02:00
benpicco
3c03394e1e
Merge pull request #13820 from francois-berder/pic32-gpio-irq
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cpu: mips_pic32_common: Implement GPIO IRQ
2020-05-04 18:36:48 +02:00
Marian Buschsieweke
ac246cfd10
cpu/msp430_common: Fix missing include
2020-05-04 10:58:36 +02:00
benpicco
fbae0a1117
Merge pull request #13901 from benpicco/cpu/sam0_common/timer_flex_freq
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cpu/sam0_common: timer: don't ignore frequency in timer_init()
2020-05-04 02:56:01 +02:00
benpicco
fab87d903c
Merge pull request #13991 from btcven/2020_04_30-osc
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cc26x2_cc13x2: add oscillator switching functions
2020-05-02 22:46:03 +02:00
Dylan Laduranty
57c1a49a82
Merge pull request #13957 from benpicco/cpu/samd21-pwm_flex
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cpu/samd21: PWM don't hard-code number of channels to 3
2020-05-02 20:52:56 +02:00
Martine Lenders
ad89680c40
Merge pull request #14004 from gschorcht/cpu/esp32/fix_newlib_nano_printf_float
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cpu/esp32: fix printf for float with newlib-nano
2020-05-02 20:43:00 +02:00
Dylan Laduranty
76870721fe
Merge pull request #13965 from benpicco/cpu/sam0_common/periph/dac
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cpu/sam0_common: implement periph/dac
2020-05-02 20:34:40 +02:00
Jean Pierre Dudey
4bf6a4db04
cc26x2_cc13x2: separate arrays with newline
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-05-02 13:25:41 -05:00
Jean Pierre Dudey
a66c693ad5
cc26x2_cc13x2: add oscillator switching functions
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-05-02 13:25:41 -05:00
Jean Pierre Dudey
0aeed80eb0
cc26xx_cc13xx: add ROM Hard-API
...
This is needed to switch the SCLK_HF source clock safely.
Note: these functions work on cc26x2_cc13x2 and cc26x0, but special care
needs to be taken when calling on cc26x0 some of these functions, as
ADDI_SEM needs to be taken.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-05-02 13:25:41 -05:00
Francois Berder
8db01ab9a0
cpu: mips_pic32_common: Implement GPIO IRQ
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Signed-off-by: Francois Berder <18538310+francois-berder@users.noreply.github.com>
2020-05-02 17:59:17 +01:00
Benjamin Valentin
bfb3d52a63
cpu/sam0_common: implement periph/dac
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The sam0 MCUs all have a DAC peripheral.
The DAC has a resulution of 10 or 12 bits and can have one or two
output channels.
The output pins are always hard-wired to PA2 for DAC0 and PA5 for DAC1
if it exists.
On the same54-xpro I would only get a max value of ~1V when using the
internal reference, so I configured it to use an external voltage reference.
The external reference pin is hard-wired to PA3, so you'll have to connect
that to 3.3V to get results.
2020-05-02 18:31:55 +02:00
Gunar Schorcht
5fbf74b203
cpu/esp32: fix printf for float with newlib-nano
2020-05-02 16:56:29 +02:00
PeterKietzmann
dd2d6b174e
cpu/nrf5x_common: enable bias correction in hwrng
2020-05-01 17:04:36 +02:00
Benjamin Valentin
c05984b341
cpu/sam0_common: timer: don't ignore frequency in timer_init()
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Now that we can query the GCLK frequency at run-time, there is no need
to implicitely hard-code the timer frequency in the config struct anymore.
2020-05-01 16:44:06 +02:00
benpicco
99e8b04921
Merge pull request #13812 from gschorcht/cpu/esp32/fix_newlib_nano
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cpu/esp32: use module newlib_nano
2020-05-01 14:40:02 +02:00
benpicco
4150afea00
Merge pull request #13749 from gschorcht/cpu/esp32/periph_rtt
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cpu/esp32: replace RTC implementation by RTT implementation
2020-05-01 14:14:01 +02:00
benpicco
c95e4c3b9e
Merge pull request #13816 from btcven/2020_04_02-setup-trim-device
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cc26x2_cc13x2: trim device registers on `cpu_init`.
2020-05-01 14:09:08 +02:00
Benjamin Valentin
89a145ab0c
cpu/lpc2387: clocks: minor style fix
2020-04-30 20:43:41 +02:00
Benjamin Valentin
c262c91561
cpu/lpc2387: PM: enable SLEEP & POWERDOWN mode
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We have to re-init PLL (and Flash) after wake from those modes.
2020-04-30 20:43:41 +02:00
Benjamin Valentin
3b257f9a5a
cpu/lpc2387: export functions to init PLL & MAM
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Those functions are needed after wake from lower sleep modes.
2020-04-30 20:43:41 +02:00
Jean Pierre Dudey
951a99dba3
cc26x2_cc13x2: add setup_trim_device function
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This function trims the necessary registers for the device to operate
normally.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:32:58 -05:00
Jean Pierre Dudey
dc1d2ace42
cc26xx_cc13xx: add ADI3 and masked access
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- Added ADI instruction offsets
- Added register banks and address bases for masked access (writes).
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:32:58 -05:00
Jean Pierre Dudey
92589c2129
cc26x2_cc13x2: update AON_PMCTL register bank
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- Updated documentation.
- Fixed offset of JTAGUSERCODE.
- Added necessary register values to perform startup trims.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
e2489ced97
cc26xx_cc13xx: add register values
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Add some register values needed to trim registers.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
e514266186
cc26x2_cc13x2: add FCFG->DAC_BIAS_CNF values
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These are necessary to trim some registers at startup.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
6829dfdf1b
cc26xx_cc13xx: fix FLASH->CFG offset, update VIMS
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- Changed "meh" to "Reserved".
- Renamed CTL to CFG to match SDK/TRM name.
- Added constants for VIMS and FLASH necessary to trim registers.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
1733e62217
cc26xx_cc13xx: update AON_IOC register bank
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- Updated documentation
- Fixed register bank name
- Added missing field
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
cdf2e88804
cc26x2_cc13x2: add 16-bit masked access to DDI_0_OSC
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
1586c89f1a
cc26x2_cc13x2: update DDI_0_OSC register bank
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- Fixes padding.
- Updates documentation.
- Removes documentation longer than 80-chars for the registers values.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 10:17:20 -05:00
Jean Pierre Dudey
2921944c66
cc26x2_cc13x2: add function to change AUX opmode
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This function is needed to setup the AUX operational mode at startup,
also used for managing low-power states.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 09:38:36 -05:00
5a9f01d91a
native: pass eeprom file path via command line
2020-04-29 08:56:33 +02:00
cbdda3c990
cpu/native: read/persist EEPROM data at startup/reboot/exit
2020-04-29 08:55:10 +02:00
4e1d7abddc
cpu/native: implement eeprom peripheral driver
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The driver simply manages an internal buffer in memory that can be filled/dumped from/to a file
2020-04-29 08:55:08 +02:00
benpicco
4bb8fab1dc
Merge pull request #13971 from bergzand/pr/sam0_common/cpuid_clarify
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sam0_common: clarify memcpy in cpuid_get
2020-04-28 18:31:27 +02:00
benpicco
96c638f2d1
Merge pull request #13949 from benpicco/MAKEFILEDIR-doc
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Makefile.include: update the documentation of $(MAKEFILEDIR)
2020-04-28 18:30:44 +02:00
Benjamin Valentin
d5dce87e1b
Makefile.include: rename MAKEFILEDIR to LAST_MAKEFILEDIR
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Rename the variable to make it clearer that it refers to the last Makefile
included.
Usually this is the current file, but when another Makefile is included this
changes.
2020-04-28 15:45:27 +02:00
