If the same callback function is used for multiple interfaces
(`NETDEV_INDEX_ANY`), it is necessary to also provide the index of
the interface to hand out and address.
The DAC can have some start-up delay.
If we try to write to it before it's ready, it will get stuck.
This happens now that `tests/driver_dac_dds` immediately sets a DAC
value after init.
The samd2x class of MCUs doesn't have this bit, but a quick test on
samd10 shows that it might not be nececary there - the DAC does not
get stuck when writing to it immediately after init.
Add periph_uart_nonblocking. Since cc2538 has a transmit FIFO write
to the FIFO first and to a tsrb buffer only when the transmit FIFO
is full.
Rely on the FIFO TXIFLSEL condition to fill up FIFO as space becomes
available.
The bit access functions are not tied to Cortex-M CPUs, here they only
provide optimisations via bit-banding.
But the functions are generally useful - so move them to an arch independent
location.
This patch implements the real time clock module for the QN908X cpus.
This module is very straightforward with only the one notable drawback
that it doesn't have a match register like the CTIMER block to implement
the alarm function. Instead, this driver can only use the interrupt
generated ever 1 second to implement the alarm match comparison in
software.
The IRQ for each GPIO port needs to be enabled in the NVIC on top of
enabling the corresponding bit in the GPIO port.
This was not caught in tests before because I was testing with a larger
stack of commits (including UART and timers) which also had this fix.
Manually poking the GPIOs while using tests/periph_gpio now properly
fires the interrupts.
The QN908x CPU has several timer modules: one RTC (Real-Time Clock) that
can count from the 32kHz internal clock or 32.768 kHz external clock,
four CTIMER that use the APB clock and have four channels each and one
SCT timer with up to 10 channels running on the AHB clock.
This patch implements a timer driver for the CTIMER blocks only, which
is enough to make the xtimer module work. Future patches should improve
on this module to support using the RTC CNT2 32-bit free-running
counter unit and/or the SCT timer.
GPIO_BOTH gpio_flank_t; UART_PARTY_MARK and UART_PARTY_SPACE in
uart_parity_t; and UART_DATA_BITS_5 and UART_DATA_BITS_6
uart_data_bits_t enum values where missing from the periph_cpu.h header
since they are not supported by the CPU. This was causing some tests to
fail to compile, but only after adding the periph_timer module.
This patch adds those missing macros and makes the corresponding
functions fail when trying to use them.
A minor fix to the NWDT_TIME_LOWER_LIMIT value setting it to 1U to avoid
a -Werror=type-limits error in the tests/periph_wdt test. In theory 0
is a totally valid value although a bit useless since it will trigger
the WDT right away.
The QN908x has four FLEXCOMM interfaces that support a subset of UART,
SPI or I2C each one. This patch adds generic support for dealing with
the FLEXCOMM initialization and interrupts and adds a driver for
RX/TX support in UART.
With this patch is now possible to use a shell on the device over UART.
The NXP QN908x CPU family is a Cortex-M4F CPU with integrated USB,
Bluetooth Low Energy and in some variants NFC. This patch implements the
first steps for having support for this CPU.
While the QN908x can be considered the successor of similar chips from
NXP like the KW41Z when looking at the feature set, the internal
architecture, boot image format and CPU peripherals don't match those
in the Kinetis line. Therefore, this patch creates a new directory for
just the QN908x chip under cpu/qn908x.
The minimal set of peripherals are implemented in this patch to allow
the device to boot and enable a GPIO: the gpio and wdt peripheral
modules only.
The wdt driver is required to boot and disable the wdt. On reset, the
wdt is disabled by the chip, however the QN908x bootloader stored in
the internal ROM enables the wdt and sets a timer to reboot after 10
seconds, therefore it is needed to disable the wdt in RIOT OS soon
after booting. This patch sets it up such that when no periph_wdt module
is used the Watchdog is disabled, but if the periph_wdt is used it must
be configured (initialized) within the first 10 seconds.
Tests performed:
Defined a custom board for this CPU and compiled a simple application
that blinks some LEDs. Manually tested with periph_wdt and with
periph_wdt_cb as well.
In preparation for adding support for the QN908x cpus, this patch adds
a pristine copy of the vendor SDK files needed for initial support.
The only modification to these files is to add '#ifdef __cplusplus'
guards to all the header files, even if not needed or already
present as '#if defined(__cplusplus)', to make sure
./dist/tools/externc/check.sh check passes.
These files are located under vendor/ directories (both
cpu/qn908x/include/vendor/ and cpu/qn908x/vendor/) and are part of NXP's
SDK for the QN908x family available for download from:
https://mcuxpresso.nxp.com/en/builder
The files included in these vendor/ directories are released by NXP
under an Open Source license as described in each file, but only the
files used by the next patch are included here.
The basic nrf802154 driver lacks ACK handling and retransmissions,
which degrades it's usefulness.
The 802.15.4 Sub-MAC fixes all those issues.
Enable it by default for this driver to make it better behaved.
This commits adds a common type for the block writes to the flash of the
stm32. Depending on the family, the type has a different size. This
allows the removal of a number of ifdefs to track the differences
between families, simplifying the flashpage code
- Add `WORD_ALIGNED` attribute to potentially unaligned allocations
- Use intermediate cast to `uintptr_t` to silence false positives of
`-Wcast-align`
`flashpage_write_raw()` got renamed to `flashpage_write()`.
Now `sam0_flashpage_aux_write_raw()` is the only remaining 'raw'
function, even though it behaves just like `flashpage_write()`.
So let's also rename that for consistency.
Flash Customer Configuration Area (CCA) is never written when the
riotboot module is used. This required a riot application to have
been previously flashed. riotboot will completely ignore this
section, neither writing or erasing it.
Slot flashing is currenly only supported with Jlink.
Co-authored-by: Brenton Chetty <brent7984@gmail.com>
Note that Kconfig.models was not generated with gen_kconfig.py tool
due to lack of ProductsList.xlsx file for STM32MP1 family.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
In STM32MP1 family, independant watchdogs (IWDG1 and IWDG2) are
dedicated to the MPU (Cortex-A7). Thus simply disable the feature
for STM32MP1 family.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
