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cpu/cc2538: add riotboot

Flash Customer Configuration Area (CCA) is never written when the
riotboot module is used. This required a riot application to have
been previously flashed. riotboot will completely ignore this
section, neither writing or erasing it.

Slot flashing is currenly only supported with Jlink.

Co-authored-by: Brenton Chetty <brent7984@gmail.com>
This commit is contained in:
Francisco Molina 2020-11-06 10:56:26 +01:00
parent 0031b14601
commit ab9abf2f51
No known key found for this signature in database
GPG Key ID: 3E94EAC3DBDEEDA8
8 changed files with 35 additions and 127 deletions

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@ -8,6 +8,7 @@
config CPU_FAM_CC2538
bool
select CPU_CORE_CORTEX_M3
select HAS_CORTEXM_MPU
select HAS_CPU_CC2538
select HAS_PERIPH_CPUID
select HAS_PERIPH_FLASHPAGE
@ -17,7 +18,7 @@ config CPU_FAM_CC2538
select HAS_PERIPH_HWRNG
select HAS_PERIPH_UART_MODECFG
select HAS_PERIPH_WDT
select HAS_CORTEXM_MPU
select HAS_RIOTBOOT
## CPU Models
config CPU_MODEL_CC2538NF53

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@ -10,5 +10,6 @@ FEATURES_PROVIDED += periph_uart_modecfg
FEATURES_PROVIDED += periph_wdt
FEATURES_PROVIDED += cortexm_mpu
FEATURES_PROVIDED += riotboot
include $(RIOTCPU)/cortexm_common/Makefile.features

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@ -1,4 +1,7 @@
# Strip 'K' from ROM_LEN definition
_rom_len_k = $(shell echo $1 | sed 's/K//')
# Set ROM and RAM lengths according to CPU model
ifneq (,$(filter cc2538nf11,$(CPU_MODEL)))
ROM_LEN ?= 128K
@ -13,14 +16,31 @@ ifneq (,$(filter cc2538nf53 cc2538sf53,$(CPU_MODEL)))
RAM_LEN ?= 32K
endif
# If using riotboot subtract 2 pages (2 * 2K) to not write over CCA
# section and keep page parity (so slots are split evenly among pages)
ifneq (,$(filter riotboot,$(FEATURES_USED)))
ROM_LEN := $(shell echo $$(( $(call _rom_len_k,$(ROM_LEN)) - 4 )) )K
endif
# Set ROM and RAM start address
ROM_START_ADDR ?= 0x00200000
RAM_START_ADDR ?= 0x20000000
KB := 1024
ROM_LEN_K := $(shell echo $(ROM_LEN) | sed 's/K//')
FLASHSIZE := $(shell echo $$(( $(ROM_LEN_K) * $(KB) )) )
# Set CFLAGS
KB := 1024
FLASHSIZE := $(shell echo $$(( $(call _rom_len_k,$(ROM_LEN)) * $(KB))) )
CFLAGS += -DCC2538_FLASHSIZE=$(FLASHSIZE)U
# Use common ld script
LINKER_SCRIPT ?= cc2538.ld
# The entry point `cortex_vector_base` is defined in the cca field.
# If the cca field is updated when flashing a slot then the entry
# point will never be the bootloader but the respective slot. This
# ensures it never happens, the last page will never be touched when
# using riotboot.
ifneq (,$(filter riotboot,$(FEATURES_USED)))
CFLAGS += -DUPDATE_CCA=0
endif
include $(RIOTMAKE)/arch/cortexm.inc.mk

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@ -19,6 +19,7 @@
#ifndef CPU_CONF_H
#define CPU_CONF_H
#include "kernel_defines.h"
#include "cpu_conf_common.h"
#include "cc2538.h"
#include "cc2538_gpio.h"
@ -56,7 +57,7 @@ extern "C" {
#ifndef FLASHPAGE_CC2538_USE_CCA_PAGE
#define FLASHPAGE_CC2538_USE_CCA_PAGE (0)
#endif
#if FLASHPAGE_CC2538_USE_CCA_PAGE
#if (IS_ACTIVE(MODULE_RIOTBOOT) || FLASHPAGE_CC2538_USE_CCA_PAGE)
#define FLASHPAGE_NUMOF ((CC2538_FLASHSIZE / FLASHPAGE_SIZE))
#else
#define FLASHPAGE_NUMOF ((CC2538_FLASHSIZE / FLASHPAGE_SIZE) -1)

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@ -16,12 +16,16 @@
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*/
INCLUDE cortexm_rom_offset.ld
/* Memory Space Definitions: */
MEMORY
{
rom (rx) : ORIGIN = 0x00200000, LENGTH = 512K - 44
rom (rx) : ORIGIN = _rom_start_addr + _rom_offset, LENGTH = _fw_rom_length
cca : ORIGIN = 0x0027ffd4, LENGTH = 44
ram (w!rx) : ORIGIN = 0x20000000, LENGTH = 32K
sram0 : ORIGIN = 0x20000000, LENGTH = 16K /* Lost in PM2 and PM3 */
sram1 : ORIGIN = 0x20004000, LENGTH = 16K
ram (w!rx) : ORIGIN = _ram_start_addr, LENGTH = _ram_length
}
/* MCU Specific Section Definitions */

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@ -1,39 +0,0 @@
/*
* Copyright (C) 2014 Loci Controls Inc.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_cc2538
* @{
*
* @file
* @brief Linker script for the CC2538NF11 model MCU
*
* @author Ian Martin <ian@locicontrols.com>
*/
/* Memory Space Definitions: */
MEMORY
{
rom (rx) : ORIGIN = 0x00200000, LENGTH = 128K - 44
cca : ORIGIN = 0x0027ffd4, LENGTH = 44
sram1 : ORIGIN = 0x20004000, LENGTH = 16K
ram (w!rx) : ORIGIN = 0x20004000, LENGTH = 16K
}
/* MCU Specific Section Definitions */
SECTIONS
{
.flashcca :
{
KEEP(*(.flashcca))
} > cca
}
INCLUDE cortexm_base.ld
/* @} */

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@ -1,40 +0,0 @@
/*
* Copyright (C) 2014 Loci Controls Inc.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_cc2538
* @{
*
* @file
* @brief Linker script for the CC2538NF23 and CC2538SF23 model MCUs
*
* @author Ian Martin <ian@locicontrols.com>
*/
/* Memory Space Definitions: */
MEMORY
{
rom (rx) : ORIGIN = 0x00200000, LENGTH = 256K - 44
cca : ORIGIN = 0x0027ffd4, LENGTH = 44
sram0 : ORIGIN = 0x20000000, LENGTH = 16K /* Lost in PM2 and PM3 */
sram1 : ORIGIN = 0x20004000, LENGTH = 16K
ram (w!rx) : ORIGIN = 0x20000000, LENGTH = 32K
}
/* MCU Specific Section Definitions */
SECTIONS
{
.flashcca :
{
KEEP(*(.flashcca))
} > cca
}
INCLUDE cortexm_base.ld
/* @} */

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@ -1,40 +0,0 @@
/*
* Copyright (C) 2014 Loci Controls Inc.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_cc2538
* @{
*
* @file
* @brief Linker script for the CC2538NF53 and CC2538SF53 model MCUs
*
* @author Ian Martin <ian@locicontrols.com>
*/
/* Memory Space Definitions: */
MEMORY
{
rom (rx) : ORIGIN = 0x00200000, LENGTH = 512K - 44
cca : ORIGIN = 0x0027ffd4, LENGTH = 44
sram0 : ORIGIN = 0x20000000, LENGTH = 16K /* Lost in PM2 and PM3 */
sram1 : ORIGIN = 0x20004000, LENGTH = 16K
ram (w!rx) : ORIGIN = 0x20000000, LENGTH = 32K
}
/* MCU Specific Section Definitions */
SECTIONS
{
.flashcca :
{
KEEP(*(.flashcca))
} > cca
}
INCLUDE cortexm_base.ld
/* @} */