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Merge pull request #15392 from fjmolinas/pr_cc2538_riotboot
boards/cc2538: add riotboot feature
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f626758aaf
@ -18,3 +18,4 @@ config BOARD_CC2538DK
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select HAS_PERIPH_TIMER
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select HAS_PERIPH_UART
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select HAS_EMULATOR_RENODE
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select HAS_RIOTBOOT
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@ -11,3 +11,4 @@ FEATURES_PROVIDED += periph_uart
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# Various other features (if any)
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FEATURES_PROVIDED += emulator_renode
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FEATURES_PROVIDED += riotboot
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@ -15,3 +15,4 @@ config BOARD_COMMON_REMOTE
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select HAS_PERIPH_SPI
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select HAS_PERIPH_TIMER
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select HAS_PERIPH_UART
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select HAS_RIOTBOOT
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@ -8,3 +8,6 @@ FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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# Put other features for this board (in alphabetical order)
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FEATURES_PROVIDED += riotboot
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@ -17,3 +17,4 @@ config BOARD_OMOTE
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select HAS_PERIPH_SPI
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select HAS_PERIPH_TIMER
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select HAS_PERIPH_UART
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select HAS_RIOTBOOT
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@ -8,3 +8,6 @@ FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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# Put other features for this board (in alphabetical order)
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FEATURES_PROVIDED += riotboot
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@ -17,3 +17,4 @@ config BOARD_OPENMOTE_B
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select HAS_PERIPH_SPI
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select HAS_PERIPH_TIMER
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select HAS_PERIPH_UART
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select HAS_RIOTBOOT
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@ -8,3 +8,6 @@ FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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# Put other features for this board (in alphabetical order)
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FEATURES_PROVIDED += riotboot
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@ -16,3 +16,4 @@ config BOARD_OPENMOTE_CC2538
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select HAS_PERIPH_SPI
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select HAS_PERIPH_TIMER
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select HAS_PERIPH_UART
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select HAS_RIOTBOOT
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@ -7,3 +7,6 @@ FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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# Put other features for this board (in alphabetical order)
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FEATURES_PROVIDED += riotboot
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@ -8,6 +8,7 @@
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config CPU_FAM_CC2538
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bool
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select CPU_CORE_CORTEX_M3
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select HAS_CORTEXM_MPU
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select HAS_CPU_CC2538
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select HAS_PERIPH_CPUID
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select HAS_PERIPH_FLASHPAGE
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@ -17,7 +18,6 @@ config CPU_FAM_CC2538
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select HAS_PERIPH_HWRNG
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select HAS_PERIPH_UART_MODECFG
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select HAS_PERIPH_WDT
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select HAS_CORTEXM_MPU
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## CPU Models
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config CPU_MODEL_CC2538NF53
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@ -1,4 +1,7 @@
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# Strip 'K' from ROM_LEN definition
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_rom_len_k = $(shell echo $1 | sed 's/K//')
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# Set ROM and RAM lengths according to CPU model
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ifneq (,$(filter cc2538nf11,$(CPU_MODEL)))
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ROM_LEN ?= 128K
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@ -13,14 +16,31 @@ ifneq (,$(filter cc2538nf53 cc2538sf53,$(CPU_MODEL)))
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RAM_LEN ?= 32K
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endif
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# If using riotboot subtract 2 pages (2 * 2K) to not write over CCA
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# section and keep page parity (so slots are split evenly among pages)
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ifneq (,$(filter riotboot,$(FEATURES_USED)))
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ROM_LEN := $(shell echo $$(( $(call _rom_len_k,$(ROM_LEN)) - 4 )) )K
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endif
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# Set ROM and RAM start address
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ROM_START_ADDR ?= 0x00200000
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RAM_START_ADDR ?= 0x20000000
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KB := 1024
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ROM_LEN_K := $(shell echo $(ROM_LEN) | sed 's/K//')
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FLASHSIZE := $(shell echo $$(( $(ROM_LEN_K) * $(KB) )) )
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# Set CFLAGS
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KB := 1024
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FLASHSIZE := $(shell echo $$(( $(call _rom_len_k,$(ROM_LEN)) * $(KB))) )
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CFLAGS += -DCC2538_FLASHSIZE=$(FLASHSIZE)U
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# Use common ld script
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LINKER_SCRIPT ?= cc2538.ld
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# The entry point `cortex_vector_base` is defined in the cca field.
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# If the cca field is updated when flashing a slot then the entry
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# point will never be the bootloader but the respective slot. This
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# ensures it never happens, the last page will never be touched when
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# using riotboot.
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ifneq (,$(filter riotboot,$(FEATURES_USED)))
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CFLAGS += -DUPDATE_CCA=0
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endif
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include $(RIOTMAKE)/arch/cortexm.inc.mk
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@ -19,6 +19,7 @@
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#ifndef CPU_CONF_H
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#define CPU_CONF_H
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#include "kernel_defines.h"
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#include "cpu_conf_common.h"
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#include "cc2538.h"
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#include "cc2538_gpio.h"
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@ -55,7 +56,7 @@ extern "C" {
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#ifndef FLASHPAGE_CC2538_USE_CCA_PAGE
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#define FLASHPAGE_CC2538_USE_CCA_PAGE (0)
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#endif
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#if FLASHPAGE_CC2538_USE_CCA_PAGE
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#if (IS_ACTIVE(MODULE_RIOTBOOT) || FLASHPAGE_CC2538_USE_CCA_PAGE)
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#define FLASHPAGE_NUMOF ((CC2538_FLASHSIZE / FLASHPAGE_SIZE))
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#else
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#define FLASHPAGE_NUMOF ((CC2538_FLASHSIZE / FLASHPAGE_SIZE) -1)
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@ -16,12 +16,16 @@
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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INCLUDE cortexm_rom_offset.ld
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/* Memory Space Definitions: */
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MEMORY
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{
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rom (rx) : ORIGIN = 0x00200000, LENGTH = 512K - 44
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rom (rx) : ORIGIN = _rom_start_addr + _rom_offset, LENGTH = _fw_rom_length
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cca : ORIGIN = 0x0027ffd4, LENGTH = 44
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ram (w!rx) : ORIGIN = 0x20000000, LENGTH = 32K
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sram0 : ORIGIN = 0x20000000, LENGTH = 16K /* Lost in PM2 and PM3 */
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sram1 : ORIGIN = 0x20004000, LENGTH = 16K
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ram (w!rx) : ORIGIN = _ram_start_addr, LENGTH = _ram_length
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}
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/* MCU Specific Section Definitions */
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@ -1,39 +0,0 @@
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/*
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* Copyright (C) 2014 Loci Controls Inc.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @addtogroup cpu_cc2538
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* @{
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*
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* @file
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* @brief Linker script for the CC2538NF11 model MCU
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*
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* @author Ian Martin <ian@locicontrols.com>
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*/
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/* Memory Space Definitions: */
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MEMORY
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{
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rom (rx) : ORIGIN = 0x00200000, LENGTH = 128K - 44
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cca : ORIGIN = 0x0027ffd4, LENGTH = 44
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sram1 : ORIGIN = 0x20004000, LENGTH = 16K
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ram (w!rx) : ORIGIN = 0x20004000, LENGTH = 16K
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}
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/* MCU Specific Section Definitions */
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SECTIONS
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{
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.flashcca :
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{
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KEEP(*(.flashcca))
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} > cca
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}
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INCLUDE cortexm_base.ld
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/* @} */
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@ -1,40 +0,0 @@
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/*
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* Copyright (C) 2014 Loci Controls Inc.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @addtogroup cpu_cc2538
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* @{
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*
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* @file
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* @brief Linker script for the CC2538NF23 and CC2538SF23 model MCUs
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*
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* @author Ian Martin <ian@locicontrols.com>
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*/
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/* Memory Space Definitions: */
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MEMORY
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{
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rom (rx) : ORIGIN = 0x00200000, LENGTH = 256K - 44
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cca : ORIGIN = 0x0027ffd4, LENGTH = 44
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sram0 : ORIGIN = 0x20000000, LENGTH = 16K /* Lost in PM2 and PM3 */
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sram1 : ORIGIN = 0x20004000, LENGTH = 16K
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ram (w!rx) : ORIGIN = 0x20000000, LENGTH = 32K
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}
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/* MCU Specific Section Definitions */
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SECTIONS
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{
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.flashcca :
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{
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KEEP(*(.flashcca))
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} > cca
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}
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INCLUDE cortexm_base.ld
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/* @} */
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@ -1,40 +0,0 @@
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/*
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* Copyright (C) 2014 Loci Controls Inc.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @addtogroup cpu_cc2538
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* @{
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*
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* @file
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* @brief Linker script for the CC2538NF53 and CC2538SF53 model MCUs
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*
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* @author Ian Martin <ian@locicontrols.com>
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*/
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/* Memory Space Definitions: */
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MEMORY
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{
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rom (rx) : ORIGIN = 0x00200000, LENGTH = 512K - 44
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cca : ORIGIN = 0x0027ffd4, LENGTH = 44
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sram0 : ORIGIN = 0x20000000, LENGTH = 16K /* Lost in PM2 and PM3 */
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sram1 : ORIGIN = 0x20004000, LENGTH = 16K
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ram (w!rx) : ORIGIN = 0x20000000, LENGTH = 32K
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}
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/* MCU Specific Section Definitions */
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SECTIONS
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{
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.flashcca :
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{
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KEEP(*(.flashcca))
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} > cca
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}
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INCLUDE cortexm_base.ld
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/* @} */
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