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Commit Graph

8220 Commits

Author SHA1 Message Date
3989cd79ff
treewide: fix path to shell related tests in doc 2023-05-13 18:27:58 +02:00
bors[bot]
cf8c1391d9
Merge #19573 #19579 #19583 #19584
19573: cpu/stm32/periph_dac: small improvements r=maribu a=gschorcht

### Contribution description

This PR provides the following improvements for `periph_dac` on STM32

- Support for `RCC_APB1ENR1_DAC1EN` symbol added.
- For boards that have not connected the V_REF+ pin to an external reference voltage, the VREFBUF peripheral can be used as V_REF+ (if supported) by setting `VREFBUF_ENABLE=1`.
- If the DAC peripheral has a mode register (`DAC_MCR`), it is set to normal mode with buffer enabled and connected to external pin and on-chip peripherals. This allows to measure the current value of a DAC channel with an ADC channel or to use the DAC channel also for other on-chip peripherals.

### Testing procedure

- Green CI
- `tests/periph_dac` should still work for any board supporting the `periph_dac` feature.

### Issues/PRs references



19579: doc/doxygen/src/flashing.md: work around Doxygen bug r=maribu a=maribu

### Contribution description

Doxygen fails to render inline code in headers correctly in the version the CI uses. So, work around the issue by not typestetting `stm32flash` as inline code but as regular text.


19583: tests: move cpu related applications to tests/cpu r=maribu a=aabadie



19584: tests/build_system/external_board_dirs: fix broken symlinks r=maribu a=aabadie



Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
2023-05-12 09:17:22 +00:00
bors[bot]
d362a8d697
Merge #19565 #19568 #19574
19565: tests: move core related applications to their own tests/core/ folder r=maribu a=aabadie



19568: tests: move remaining driver related applications to tests/drivers r=maribu a=aabadie



19574: cpu/stm32/periph_gpio: reset PU/PD for ADC channels r=maribu a=gschorcht

### Contribution description

This PR provides a small fix that is relevant when a GPIO has been used as input/output with a pull resistor before it is initialized as an ADC channel.

The PU/PD configuration has to be `0b00` for analog outputs which is corresponds to the reset state. However, if the GPIO is not in the reset state but was used digital input/output with any pull resistor, the PU/PD configuration has also to be reset to use it as ADC channel.

### Testing procedure

- Green CI
- The `periph_adc` test application should still work for any board that supports the `periph_adc` feature.

### Issues/PRs references



Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2023-05-11 10:11:37 +00:00
Gunar Schorcht
85f7d8b244 cpu/esp32: fix compilation of esp_can 2023-05-11 07:22:52 +02:00
Gunar Schorcht
61bfa5372a cpu/esp32: fix compilation of esp_hw_counter 2023-05-11 06:56:36 +02:00
Gunar Schorcht
f2a18a7663 cpu/esp32: fix compilation of esp_eth 2023-05-11 06:56:36 +02:00
bors[bot]
f4fa6bb809
Merge #19484
19484: makefiles/arch/msp430.inc.mk: Fix compilation issues with GCC 12 r=maribu a=maribu

### Contribution description

This fixes the following compilation issues:

    /home/maribu/Repos/software/RIOT/cpu/msp430fxyz/periph/gpio.c: In function 'gpio_periph_mode':
    /home/maribu/Repos/software/RIOT/cpu/msp430fxyz/periph/gpio.c:95:15: error: array subscript 0 is outside array bounds of 'msp_port_isr_t[0]' [-Werror=array-bounds]
       95 |         sel = &(isrport->SEL);
          |               ^~~~~~~~~~~~~~~
    cc1: all warnings being treated as errors

by adding `CFLAGS += --param-min-pagesize=0` for GCC 12 (same issue as already fixed for AVR).

and:

    /usr/lib/gcc/msp430-elf/12.2.0/../../../../msp430-elf/bin/ld: warning: /home/maribu/Repos/software/RIOT/cpu/msp430_common/ldscripts/xfa.ld contains output sections; did you forget -T?

by adding the missing `-T`.

### Testing procedure

The following should still work:

- `make BOARD=msb-430 -C examples/hello-world`
- `make BOARD=msb-430 -C tests/xfa flash test`

### Issues/PRs references

None

Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-05-10 17:52:04 +00:00
Marian Buschsieweke
64f4f9a9be
cpu/esp32/periph/pwm.c: fix format specifier
Use %u to print `unsigned`.
2023-05-10 13:02:47 +02:00
Gunar Schorcht
2a210c157b cpu/stm32/periph_dac: support of DAC mode register
If the DAC peripheral has a mode register (DAC_MCR), it is set to normal mode with buffer enabled and connected to external pin and on-chip peripherals. This allows to measure the current value of a DAC channel or to use the DAC channel also for other on-chip peripherals.
2023-05-10 12:12:53 +02:00
Gunar Schorcht
fb0a139eb9 cpu/stm32/periph_dac: support for internal V_REF+
For boards that have not connected the V_REF+ pin to an external reference voltage, the VREFBUF peripheral can be used as V_REF+ if supported by setting `VREFBUF_ENABLE=1`.
2023-05-10 12:12:47 +02:00
Gunar Schorcht
63b4da3e1f cpu/stm32/periph_dac: support for RCC_APB1ENR1_DAC1EN 2023-05-10 12:12:40 +02:00
Gunar Schorcht
ddb95e7648 cpu/stm32/periph_gpio: reset PU/PD for ADC channels
PU/PD configuration has to be `0b00` for analog outputs which is corresponds to the reset state. However, if the GPIO is not in reset state but was used digital input/output with any pull resistor, the PU/PD configuration has also to be reset to work as ADC channel.
2023-05-10 12:11:14 +02:00
Marian Buschsieweke
b123f1071a
cpu/msp430_common: Fix linking with binutils 2.40
An `INSERT AFTER` directive no longer can refer to a different linker
script included with `-T path/to/script.ld`. Instead, this adds wrapper
linker scripts that just `INCLUDE` the three individual linker scripts.
This way, the xfa.ld can safely refer back to sections defined in
the vendor linker script.

For some reason, this approach cause the exact issue it fixes for
binutils 2.40 with the binutils in the CI. We stick with the old
linker flags with binutils prior 2.40 to be compatible with both
conflicting behaviors.

The best approach would be to come up with something that works across
different versions of binutils; but no such solution materialized.
2023-05-08 15:40:26 +02:00
da95d2c56c
treewide: replace occurrences of tests/periph_ with new path 2023-05-06 15:33:03 +02:00
bors[bot]
718a4513b5
Merge #19368 #19529 #19531
19368: debug: add DEBUG_BREAKPOINT() macro, set breakpoint on failed assertion r=benpicco a=benpicco



19529: cpu/stm32/periph/dac: optimize setting DAC r=benpicco a=Enoch247

### Contribution description

The current implmentation right shifted the 16 bit value passed into `dac_set()` down to the 12 bits that the DAC is actually capable of. This patch drops the shift and instead writes the 16 bit value to the DAC's left aligned 12 bit wide data holding register.


### Testing procedure

do something like:
``` c
#include "perip/dac.h"

int main(void)
{
    dac_set(DAC_LINE(0), 0xffff/2);
    return 0;
}
```
- observe DAC's output is half of vref


### Issues/PRs references

- none known


19531: tests/unittests: allow passing `UNIT_TESTS` via env r=benpicco a=kaspar030



Co-authored-by: Benjamin Valentin <benpicco@beuth-hochschule.de>
Co-authored-by: Joshua DeWeese <jdeweese@primecontrols.com>
Co-authored-by: Kaspar Schleiser <kaspar@schleiser.de>
2023-05-02 18:08:42 +00:00
bors[bot]
33489daba7
Merge #19440
19440: cpu/rpx0xx: implement periph_spi r=dylad a=fengelhardt

 


Co-authored-by: Frank Engelhardt <fengelha@ovgu.de>
2023-05-02 11:03:21 +00:00
Marian Buschsieweke
c3500eb6e0
tree wide: fix typos in comments found by codespell
This will not change generated binaries, only the Doxygen output and
source code will have less typos.
2023-05-02 09:52:06 +02:00
Joshua DeWeese
11344241b8 cpu/stm32/periph/dac: optimize setting DAC
The current implmentation right shifted the 16 bit value passed into
`dac_set()` down to the 12 bits that the DAC is actually capable of.
This patch drops the shift and instead writes the 16 bit value to the
DAC's left aligned 12 bit wide data holding register.
2023-05-01 16:17:25 -04:00
Frank Engelhardt
6353181c74 cpu/rpx0xx: add spi functionality 2023-05-01 12:13:15 +02:00
Benjamin Valentin
fe4cc9169d cpu/native: define ARCHITECTURE_BREAKPOINT() 2023-04-27 13:19:17 +02:00
Benjamin Valentin
e850dcd921 cpu/cortexm_common: define ARCHITECTURE_BREAKPOINT() 2023-04-27 13:19:17 +02:00
bors[bot]
ffdc1df807
Merge #19516
19516: cpu/rpx0xx: add initial ADC support r=dylad a=dylad

### Contribution description

This PR adds initial support for RP2040 ADC peripheral.
It is rather minimalist, and only use oneshot trigger to perform a single acquisition.

I've tested this PR using a potentiometer connected between GND and 3V3.
GP26, GP27, GP28 has been tested.

### Testing procedure
Select `ADC_RES_12BIT` and flash `tests/periph_adc`
`make BOARD=rpi-pico -C tests/periph_adc`

### Issues/PRs references
None.


Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-27 10:35:10 +00:00
Dylan Laduranty
aaecb5419e cpu/rpx0xx: add minimal ADC support
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-27 12:15:19 +02:00
bors[bot]
429de92251
Merge #19346 #19512 #19513 #19514
19346: pkg/tinydtls: allow build for AVR r=benpicco a=benpicco



19512: SUBSYSTEMS.md: add jia200x to subsystems r=benpicco a=jia200x



19513: boards/nrf52840dongle/doc: Update nrfutil pointers r=benpicco a=chrysn

### Contribution description

Nordic changed its nrfutil; this change adjust to it.

I'm not fully happy with recommending that tool at all due to its bad quality (see rambling in https://github.com/RIOT-OS/RIOT/issues/19511), but short of soldering on a debug header or touch-probing it with wires it's the only way in to the device. I may later add follow-up recommendations to switch to riotboot, but this now at least fixes the immediate issue.

### Testing procedure

* Look at the updated documentation.

### Issues/PRs references

Closes: https://github.com/RIOT-OS/RIOT/issues/19511

19514: dist/testbed-support: remove obsolete boards from iotlab archi r=benpicco a=aabadie



Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Co-authored-by: Benjamin Valentin <benjamin.valentin@bht-berlin.de>
Co-authored-by: Jose Alamos <jose@alamos.cc>
Co-authored-by: chrysn <chrysn@fsfe.org>
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
2023-04-26 15:40:08 +00:00
bors[bot]
dadfa88911
Merge #19507
19507: cpu/cc26x0_cc13x0: Drop feature cortexm_mpu r=maribu a=maribu

### Contribution description

At least the CC2650 doesn't have an MPU, I assume this is also true for the rest of the family.

The CC2652 does have an MPU according to the datasheet. So I keep the feature there in place.

### Testing procedure

E.g.

```
make BOARD=cc2650-launchpad -C tests/mpu_noexec_ram flash test
```

fails. (Note: A successful test run would also crash but with a mem manage handler rather than a hardfault due to an invalid instruction on the stack being executed.)

It would be nice to also test the same for a `cc2652-launchpad`, for which the MPU should work.

### Issues/PRs references

None

Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-04-26 09:20:01 +00:00
Marian Buschsieweke
5c8e3c7c93
cpu/cc26x0_cc13x0: Drop feature cortexm_mpu
At least the CC2650 doesn't have an MPU, I assume this is also true
for the rest of the family.

The CC2652 does have an MPU according to the datasheet. So I keep the
feature there in place.
2023-04-26 10:51:52 +02:00
Benjamin Valentin
5274e30178 cpu/avr8_common: implement perror() 2023-04-26 10:31:09 +02:00
bors[bot]
23f7087845
Merge #19315
19315: cpu/native: add host fs access via VFS r=benpicco a=benpicco



Co-authored-by: Benjamin Valentin <benpicco@beuth-hochschule.de>
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2023-04-25 23:14:45 +00:00
Benjamin Valentin
6fe5d85e11 cpu/native: unmount fs on exit 2023-04-26 00:53:14 +02:00
Benjamin Valentin
c438c80548 cpu/native: add host fs access via VFS 2023-04-26 00:53:14 +02:00
Dylan Laduranty
9c5e508d2f cpu/rpx0xx: initialize USB PLL and ADC clock
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-25 21:12:42 +02:00
Dylan Laduranty
80e3f57205 cpu/rpx0xx: fix doc error in periph_cpu.h
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-25 21:02:54 +02:00
Marian Buschsieweke
d6499fa8fd
cpu/cc26xx_cc13xx: Fix bogus array-bound warning
GCC 12 create a bogus array out of bounds warning as it assumes that
because there is special handling for `uart == 0` and `uart == 1`,
`uart` can indeed be `1`. There is an `assert(uart < UART_NUMOF)` above
that would blow up prior to any out of bounds access.

In any case, optimizing out the special handling of `uart == 1` for
when `UART_NUMOF == 1` likely improves the generated code and fixes
the warning.

    /home/maribu/Repos/software/RIOT/cc2650/cpu/cc26xx_cc13xx/periph/uart.c:88:8: error: array subscript 1 is above array bounds of 'uart_isr_ctx_t[1]' [-Werror=array-bounds]
       88 |     ctx[uart].rx_cb = rx_cb;
          |     ~~~^~~~~~
    /home/maribu/Repos/software/RIOT/cc2650/cpu/cc26xx_cc13xx/periph/uart.c:52:23: note: while referencing 'ctx'
       52 | static uart_isr_ctx_t ctx[UART_NUMOF];
          |                       ^~~
    /home/maribu/Repos/software/RIOT/cc2650/cpu/cc26xx_cc13xx/periph/uart.c:89:8: error: array subscript 1 is above array bounds of 'uart_isr_ctx_t[1]' [-Werror=array-bounds]
       89 |     ctx[uart].arg = arg;
          |     ~~~^~~~~~
    /home/maribu/Repos/software/RIOT/cc2650/cpu/cc26xx_cc13xx/periph/uart.c:52:23: note: while referencing 'ctx'
       52 | static uart_isr_ctx_t ctx[UART_NUMOF];
          |                       ^~~
2023-04-25 15:31:27 +02:00
Benjamin Valentin
006ad81c0c cpu/native: wire up more fs related syscalls 2023-04-25 13:28:20 +02:00
Benjamin Valentin
8ec1934226 cpu/native: add braces to condition 2023-04-25 13:27:39 +02:00
Gunar Schorcht
06426c41b0 sys/riotboot: common default NUM_SLOT, SLOT_* config 2023-04-18 06:20:14 +02:00
Gunar Schorcht
9be2421890 cpu/gd32v: allow reconfig PLL multiplier in clock config
To be able to reconfigure the PLL multiplier in clock configuration, the existing value has to be reset first. This becomes necessary when changing the core clock, e.g. when booting with riotboot an application that uses USB.
2023-04-18 06:20:14 +02:00
Gunar Schorcht
dc45b7bfbf cpu/gd32c: cleanup in clock configuration 2023-04-18 06:20:14 +02:00
Gunar Schorcht
f6cb8b99e6 cpu/gd32v: add riotboot support 2023-04-18 06:20:14 +02:00
Gunar Schorcht
1ad397ff59 cpu/riscv_common: add riotboot linker support 2023-04-18 06:20:14 +02:00
Gunar Schorcht
2ae7566a89 cpu/riscv_common: rename cpu.h to cpu_common.h
To allow CPU specific definitions in `cpu.h`, `riscv_common/cpu.h` is renamed to ``riscv_common/cpu_common.h` and included in new `cpu.h` files for FE310 and GD32V.
2023-04-18 06:20:14 +02:00
bors[bot]
812c216f0c
Merge #19450 #19476
19450: cpu/esp32: fix compilation issues with GCC 12.2 r=benpicco a=gschorcht

### Contribution description

This PR provides the changes in `cpu/esp32` and `cpu/esp_common` to fix the compilation issues with GCC v12.2.  It is required as the first step in the preparation of the upgrade to ESP-IDF version 5.1.

**Please note**: Insead of fixing the ESP-IDF 4.4 code itself by a big bunch of patches to fix the compilation problems with GCC v12.2, it temporarily disables some warnings. The reason is that the ESP-IDF 5.1 requires GCC v12.2 and should be fixed for this compiler version by the vendor.

### Testing procedure

Green CI

The change were already tested with all ESP-specific modules like `esp_now`, `esp_wifi`, `esp_spi`  and `esp_ble` for all supported ESP platforms.

### Issues/PRs references

Prerequisite for https://github.com/RIOT-OS/riotdocker/pull/227
Fixes issue #19421

19476: native/syscalls: rename real_clock_gettime to clock_gettime r=benpicco a=Teufelchen1

### Contribution description

When compiling RIOT for native using a recent LLVM and enabling ASAN, one might encounter "Duplicated symbol".

This is due to a name clash with `real_clock_gettime()` in compiler-rt from [LLVM](f50246da65), I renamed RIOTs `real_clock_gettime` and just default to the posix function `clock_gettime`. The wrapper existed, most likely, for consistency only.

(The best solution would probably to convince the LLVM folks to declare their symbol as `static` and refactor a bit)

### Testing procedure

Passing CI should be enough.


Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Teufelchen1 <bennet.blischke@haw-hamburg.de>
2023-04-17 20:18:02 +00:00
Teufelchen1
10cada1b8d native/syscalls: rename real_clock_gettime to clock_gettime 2023-04-17 15:21:52 +02:00
Gunar Schorcht
d8d9a9bdc4 cpu/esp32: disable warnings in ESP-IDF for gcc 12.2 2023-04-17 07:32:48 +02:00
Gunar Schorcht
0de2570802 cpu/esp32: fix compilation with gcc 12.2 2023-04-17 07:32:48 +02:00
Gunar Schorcht
81cf8a5eec cpu/gd32v: add periph_usbdev support 2023-04-16 23:24:23 +02:00
Gunar Schorcht
5b93c18414 cpu/stm32: clarify units in USB FIFO size definitions
Since the USB OTG FIFO sizes are partly defined in 32-bit words and partly in bytes, the documentation of the of the USB OTG FIFO size definitions is extended by the respective unit.
2023-04-16 22:59:11 +02:00
Gunar Schorcht
9f894bc1ac cpu/efm32: clarify units in USB FIFO size definitions
Since the USB OTG FIFO sizes are partly defined in 32-bit words and partly in bytes, the documentation of the of the USB OTG FIFO size definitions is extended by the respective unit.
2023-04-16 22:59:11 +02:00
Gunar Schorcht
0c9eb535eb cpu/esp32: clarify units in USB FIFO size definitions
Since the USB OTG FIFO sizes are partly defined in 32-bit words and partly in bytes, the documentation of the of the USB OTG FIFO size definitions is extended by the respective unit.
2023-04-16 22:59:11 +02:00
Gunar Schorcht
9528733a99 cpu/efm32: remove USB OTG HS definitions in vendor definitions
EFM32 MCUs do not support USB OTG HS mode. The according definitions are therefore removed from vendor definitions.
2023-04-16 22:59:11 +02:00