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cpu/stm32/periph/dac: optimize setting DAC

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The current implmentation right shifted the 16 bit value passed into
`dac_set()` down to the 12 bits that the DAC is actually capable of.
This patch drops the shift and instead writes the 16 bit value to the
DAC's left aligned 12 bit wide data holding register.
This commit is contained in:
Joshua DeWeese 2023-05-01 16:17:25 -04:00
parent 7213c0ad3e
commit 11344241b8
1 changed files with 4 additions and 7 deletions
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11
cpu/stm32/periph/dac.c
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@ -73,18 +73,15 @@ void dac_set(dac_t line, uint16_t value)
{
assert(line < DAC_NUMOF);
/* scale set value to 12-bit */
value = (value >> 4);
#ifdef DAC_DHR12R2_DACC2DHR
#ifdef DAC_DHR12L2_DACC2DHR
if (dac_config[line].chan & 0x01) {
dev(line)->DHR12R2 = value;
dev(line)->DHR12L2 = value;
}
else {
dev(line)->DHR12R1 = value;
dev(line)->DHR12L1 = value;
}
#else
dev(line)->DHR12R1 = value;
dev(line)->DHR12L1 = value;
#endif
}