Merge #19573 #19579 #19583 #19584

19573: cpu/stm32/periph_dac: small improvements r=maribu a=gschorcht

### Contribution description

This PR provides the following improvements for `periph_dac` on STM32

- Support for `RCC_APB1ENR1_DAC1EN` symbol added.
- For boards that have not connected the V_REF+ pin to an external reference voltage, the VREFBUF peripheral can be used as V_REF+ (if supported) by setting `VREFBUF_ENABLE=1`.
- If the DAC peripheral has a mode register (`DAC_MCR`), it is set to normal mode with buffer enabled and connected to external pin and on-chip peripherals. This allows to measure the current value of a DAC channel with an ADC channel or to use the DAC channel also for other on-chip peripherals.

### Testing procedure

- Green CI
- `tests/periph_dac` should still work for any board supporting the `periph_dac` feature.

### Issues/PRs references



19579: doc/doxygen/src/flashing.md: work around Doxygen bug r=maribu a=maribu

### Contribution description

Doxygen fails to render inline code in headers correctly in the version the CI uses. So, work around the issue by not typestetting `stm32flash` as inline code but as regular text.


19583: tests: move cpu related applications to tests/cpu r=maribu a=aabadie



19584: tests/build_system/external_board_dirs: fix broken symlinks r=maribu a=aabadie



Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>

cpu/stm32/periph/dac.c

@@ -33,8 +33,10 @@
 #endif
 
 /* get RCC bit */
-#ifdef RCC_APB1ENR_DAC1EN
+#if defined(RCC_APB1ENR_DAC1EN)
 #define RCC_BIT             (RCC_APB1ENR_DAC1EN)
+#elif defined(RCC_APB1ENR1_DAC1EN)
+#define RCC_BIT             (RCC_APB1ENR1_DAC1EN)
 #else
 #define RCC_BIT             (RCC_APB1ENR_DACEN)
 #endif
@@ -97,8 +99,24 @@ void dac_poweron(dac_t line)
     periph_clk_en(APB1, RCC_BIT);
 #endif
 
+#if VREFBUF_ENABLE && defined(VREFBUF_CSR_ENVR)
+    /* enable VREFBUF if needed and available (for example if the board doesn't
+     * have an external reference voltage connected to V_REF+), wait until
+     * it is ready */
+    RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
+    VREFBUF->CSR &= ~VREFBUF_CSR_HIZ;
+    VREFBUF->CSR |= VREFBUF_CSR_ENVR;
+    while (!(VREFBUF->CSR & VREFBUF_CSR_VRR)) { }
+#endif
+
+#ifdef DAC_MCR_MODE1
+    /* Normal mode with Buffer enabled and connected to external pin and on-chip
+     * peripherals */
+    dev(line)->MCR |= (DAC_MCR_MODE1_0 << (16 * (dac_config[line].chan & 0x01)));
+#endif
+
     /* enable corresponding DAC channel */
-    dev(line)->CR |= (1 << (16 * (dac_config[line].chan & 0x01)));
+    dev(line)->CR |= (DAC_CR_EN1 << (16 * (dac_config[line].chan & 0x01)));
 }
 
 void dac_poweroff(dac_t line)
@@ -106,7 +124,7 @@ void dac_poweroff(dac_t line)
     assert(line < DAC_NUMOF);
 
     /* disable corresponding channel */
-    dev(line)->CR &= ~(1 << (16 * (dac_config[line].chan & 0x01)));
+    dev(line)->CR &= ~(DAC_CR_EN1 << (16 * (dac_config[line].chan & 0x01)));
 
     /* disable the DAC's clock in case no channel is active anymore */
     if (!(dev(line)->CR & EN_MASK)) {

doc/doxygen/src/flashing.md

@@ -196,8 +196,8 @@ JTAG. Also JTAG requires more signal lines to be connected compared to SWD and
 some internal programmers only have the SWD signal lines connected, so that
 JTAG will not be possible.
 
-`stm32flash` Configuration                  {#flashing-configuration-stm32flash}
---------------------------
+stm32flash Configuration                  {#flashing-configuration-stm32flash}
+------------------------
 
 It is possible to automatically boot the STM32 board into the in-ROM bootloader
 that `stm32flash` communicates with for flashing by connecting the RST pin to

makefiles/app_dirs.inc.mk

@@ -17,6 +17,7 @@ APPLICATION_DIRS :=                   \
     tests/bench                       \
     tests/build_system                \
     tests/core                        \
+    tests/cpu                         \
     tests/drivers                     \
     tests/periph                      \
     tests/pkg                         \

tests/build_system/external_board_dirs/external_board_dir_1/native1

@@ -1 +1 @@
-../../../boards/native/
+../../../../boards/native/

tests/build_system/external_board_dirs/external_board_dir_2/native2

@@ -1 +1 @@
-../../../boards/native/
+../../../../boards/native/

tests/cpu/Makefile.cpu_common

@@ -0,0 +1,2 @@
+RIOTBASE ?= $(CURDIR)/../../..
+include $(CURDIR)/../../Makefile.tests_common

tests/cpu/avr8_xmega_drivers/Makefile

@@ -1,6 +1,6 @@
 BOARD ?= atxmega-a1u-xpro
 
-include ../Makefile.tests_common
+include ../Makefile.cpu_common
 
 # list of ATxmega boards
 BOARD_WHITELIST = \

tests/cpu/cortexm_address_check/Makefile

@@ -1,6 +1,6 @@
 BOARD ?= samr21-xpro
 
-include ../Makefile.tests_common
+include ../Makefile.cpu_common
 
 FEATURES_REQUIRED += cpu_check_address
 

tests/cpu/efm32_drivers/Makefile

@@ -1,5 +1,5 @@
 BOARD ?= sltb001a
-include ../Makefile.tests_common
+include ../Makefile.cpu_common
 
 FEATURES_REQUIRED += efm32_coretemp
 

tests/cpu/efm32_features/Makefile

@@ -1,5 +1,5 @@
 BOARD ?= sltb001a
-include ../Makefile.tests_common
+include ../Makefile.cpu_common
 
 BOARD_WHITELIST := ikea-tradfri \
                    slstk3401a \

tests/cpu/mpu_noexec_ram/Makefile

@@ -1,6 +1,6 @@
 BOARD ?= nucleo-f767zi
 
-include ../Makefile.tests_common
+include ../Makefile.cpu_common
 
 USEMODULE += mpu_noexec_ram
 

tests/cpu/mpu_stack_guard/Makefile

@@ -1,6 +1,6 @@
 BOARD ?= nucleo-f767zi
 
-include ../Makefile.tests_common
+include ../Makefile.cpu_common
 
 USEMODULE += mpu_stack_guard
 

tests/cpu/native_backtrace/Makefile

@@ -1,4 +1,4 @@
-include ../Makefile.tests_common
+include ../Makefile.cpu_common
 
 USEMODULE += backtrace
 

tests/cpu/stm32_bootloader/Makefile

@@ -1,5 +1,5 @@
 BOARD ?= nucleo-f411re
-include ../Makefile.tests_common
+include ../Makefile.cpu_common
 
 FEATURES_REQUIRED = bootloader_stm32