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Commit Graph

5410 Commits

Author SHA1 Message Date
Benjamin Valentin
c05984b341 cpu/sam0_common: timer: don't ignore frequency in timer_init()
Now that we can query the GCLK frequency at run-time, there is no need
to implicitely hard-code the timer frequency in the config struct anymore.
2020-05-01 16:44:06 +02:00
benpicco
99e8b04921
Merge pull request #13812 from gschorcht/cpu/esp32/fix_newlib_nano
cpu/esp32: use module newlib_nano
2020-05-01 14:40:02 +02:00
benpicco
4150afea00
Merge pull request #13749 from gschorcht/cpu/esp32/periph_rtt
cpu/esp32: replace RTC implementation by RTT implementation
2020-05-01 14:14:01 +02:00
benpicco
c95e4c3b9e
Merge pull request #13816 from btcven/2020_04_02-setup-trim-device
cc26x2_cc13x2: trim device registers on `cpu_init`.
2020-05-01 14:09:08 +02:00
Benjamin Valentin
89a145ab0c cpu/lpc2387: clocks: minor style fix 2020-04-30 20:43:41 +02:00
Benjamin Valentin
c262c91561 cpu/lpc2387: PM: enable SLEEP & POWERDOWN mode
We have to re-init PLL (and Flash) after wake from those modes.
2020-04-30 20:43:41 +02:00
Benjamin Valentin
3b257f9a5a cpu/lpc2387: export functions to init PLL & MAM
Those functions are needed after wake from lower sleep modes.
2020-04-30 20:43:41 +02:00
Jean Pierre Dudey
951a99dba3
cc26x2_cc13x2: add setup_trim_device function
This function trims the necessary registers for the device to operate
normally.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:32:58 -05:00
Jean Pierre Dudey
dc1d2ace42
cc26xx_cc13xx: add ADI3 and masked access
- Added ADI instruction offsets
- Added register banks and address bases for masked access (writes).

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:32:58 -05:00
Jean Pierre Dudey
92589c2129
cc26x2_cc13x2: update AON_PMCTL register bank
- Updated documentation.
- Fixed offset of JTAGUSERCODE.
- Added necessary register values to perform startup trims.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
e2489ced97
cc26xx_cc13xx: add register values
Add some register values needed to trim registers.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
e514266186
cc26x2_cc13x2: add FCFG->DAC_BIAS_CNF values
These are necessary to trim some registers at startup.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
6829dfdf1b
cc26xx_cc13xx: fix FLASH->CFG offset, update VIMS
- Changed "meh" to "Reserved".
- Renamed CTL to CFG to match SDK/TRM name.
- Added constants for VIMS and FLASH necessary to trim registers.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
1733e62217
cc26xx_cc13xx: update AON_IOC register bank
- Updated documentation
- Fixed register bank name
- Added missing field

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
cdf2e88804
cc26x2_cc13x2: add 16-bit masked access to DDI_0_OSC
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
1586c89f1a
cc26x2_cc13x2: update DDI_0_OSC register bank
- Fixes padding.
- Updates documentation.
- Removes documentation longer than 80-chars for the registers values.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 10:17:20 -05:00
Jean Pierre Dudey
2921944c66
cc26x2_cc13x2: add function to change AUX opmode
This function is needed to setup the AUX operational mode at startup,
also used for managing low-power states.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 09:38:36 -05:00
5a9f01d91a
native: pass eeprom file path via command line 2020-04-29 08:56:33 +02:00
cbdda3c990
cpu/native: read/persist EEPROM data at startup/reboot/exit 2020-04-29 08:55:10 +02:00
4e1d7abddc
cpu/native: implement eeprom peripheral driver
The driver simply manages an internal buffer in memory that can be filled/dumped from/to a file
2020-04-29 08:55:08 +02:00
benpicco
4bb8fab1dc
Merge pull request #13971 from bergzand/pr/sam0_common/cpuid_clarify
sam0_common: clarify memcpy in cpuid_get
2020-04-28 18:31:27 +02:00
benpicco
96c638f2d1
Merge pull request #13949 from benpicco/MAKEFILEDIR-doc
Makefile.include: update the documentation of $(MAKEFILEDIR)
2020-04-28 18:30:44 +02:00
Benjamin Valentin
d5dce87e1b Makefile.include: rename MAKEFILEDIR to LAST_MAKEFILEDIR
Rename the variable to make it clearer that it refers to the last Makefile
included.
Usually this is the current file, but when another Makefile is included this
changes.
2020-04-28 15:45:27 +02:00
fe299138aa
sam0_common: clarify memcpy in cpuid_get 2020-04-28 14:56:19 +02:00
Francisco Molina
b78e4efb56
cpu/stm32f1: dont provide periph_rtc at cpu level
stm32f1 periph_rtc implementation gets a 1s resolution by dividing
CLOCK_LSx by 32768. This only make sense if CLOCK_LSE is set,
otherwise CLOCK_LSI=~40000, which will lead to an imprecise rtc.
2020-04-27 08:59:21 +02:00
benpicco
4ceff67ca0
Merge pull request #13127 from francois-berder/remove-objcopy-warning
cpu: mips_pic32*: Fix unused .gcc_except_table section warning
2020-04-26 23:27:30 +02:00
Benjamin Valentin
da89f6ac5f cpu/samd21: don't hard-code number of channels
Each TCC can have 8 PWM channels, so don't hard-code
3 channels/TCC.
2020-04-26 22:26:01 +02:00
Marian Buschsieweke
70a558059e
Merge pull request #13955 from benpicco/cpu/lpc2387-pm_num_modes
cpu/lpc2387: PM_NUM_MODES must only count non-idle modes
2020-04-26 21:46:40 +02:00
benpicco
bbe1e723df
Merge pull request #13936 from btcven/2020_04_23-aux
cc26x2_cc13x2: fix AUX_* register domain documentation
2020-04-26 20:41:40 +02:00
Benjamin Valentin
c21b5d6f55 cpu/lpc2387: PM_NUM_MODES must only count non-idle modes
lpc23xx has 3 sleep modes and one idle mode.
`PM_NUM_MODES` must only count the idle modes.

In practise, this makes no difference since `mode 3` (IDLE) is
the `default` case in `pm_set()` anyway.
2020-04-26 19:45:43 +02:00
benpicco
5ca030b311
Merge pull request #13937 from btcven/2020_04_23-flash-aux
cc26xx_cc13xx: update VIMS/FLASH documentation
2020-04-26 17:23:51 +02:00
Jean Pierre Dudey
81d0d7c1f8
cc26x2_cc13x2: update AUX domain documentation
The following registers were updated:

- AIO_AIODIOx documentation
- AUX_TDC documentation
- AUX_EVCTL documentation
- AUX_SYSIF documentation
  - Fixed a copy/paste error in AUX_SYSIF definition.
  - Registers now match original names.
- AUX_TIMER01 documentation
- AUX_TIMER2 documentation
- AUX_SMPH documentation
- AUX_ANAIF documentation
- update ADI_4_AUX documentation
  - Added missing LPMBIAS register
- ADDI_SEM documentation

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-26 09:35:26 -05:00
Francisco Molina
4d398ab09e
cpu/stm32f1: add unified rtt configuration 2020-04-24 08:57:04 +02:00
Jean Pierre Dudey
0aba7556d0
cc26xx_cc13xx: update VIMS/FLASH documentation
Also i've fixed the register bank offsets, 0x4 was being added without
need.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-23 17:10:18 -05:00
Marian Buschsieweke
fdf955cfb2
Merge pull request #13899 from Hoernchen20/stm32f1_adc
boards/blxxxpill: improve adc
2020-04-22 23:07:26 +02:00
Hoernchen20
11618d32c0 cpu/stm32f1/periph_adc: Reduce power consumption 2020-04-22 21:08:20 +02:00
Hoernchen20
4e87682ba1 boards/common/blxxxpill: Add internal ADC lines 2020-04-22 21:08:20 +02:00
Leandro Lanzieri
db316c14a7
Merge pull request #13919 from benpicco/cpu/lpc2387-fix_rtc
cpu/lpc2387: fix RTC leap year calculation
2020-04-22 11:10:37 +02:00
Benjamin Valentin
4ee8d3f4d2 cpu/lpc2387: enable full rtc_normalize() for RTC
The RTC actually makes use of the day of year / day of week fields,
so enable the calculation of those fields in rtc_normalize().
2020-04-22 10:39:33 +02:00
3e922f878a
Merge pull request #13875 from fjmolinas/pr_core_macros
core/includes: add common macros file
2020-04-21 15:32:51 +02:00
Francisco Molina
da90407572
cpu/esp_common/include: include common xtstr header 2020-04-21 15:10:55 +02:00
Francisco
3d8f71768c
Merge pull request #13846 from benpicco/Makefile-THISDIR
Makefile.include: add $(MAKEFILEDIR) helper and use it
2020-04-21 11:00:52 +02:00
Matthew Bradbury
ba51e90228 cpu/cc2538: Flush the RX FIFO (if overflowed) after a receive 2020-04-20 18:19:23 +01:00
Matthew Bradbury
bcfb437746 cpu/cc2538: Do not check XREG_RSSISTATbits for RSSI_VALID 2020-04-20 18:18:56 +01:00
Matthew Bradbury
ecfe4a4e8f cpu/cc2538: Check CRC of received message after reading message contents 2020-04-20 18:18:56 +01:00
Matthew Bradbury
fc0581056a cpu/cc2538: Check for a minimum length to read from a received frame 2020-04-20 18:18:56 +01:00
Matthew Bradbury
f0e48f0741 cpu/cc2538: Prevent underflow of the RX FIFO 2020-04-20 18:18:53 +01:00
Benjamin Valentin
370fff90a8 cpu/lpc2387: timer: use lpc2387_pclk_scale() 2020-04-19 15:32:42 +02:00
Martine Lenders
55a7010a0a
Merge pull request #13157 from nmeum/pr/fuzzing_tcp_only
Add AFL-based fuzzing setup for network modules
2020-04-18 10:54:14 +02:00
benpicco
91200aa6ea
Merge pull request #13867 from btcven/2020_04_14-ccfg-fcfg1
cc26xx_cc13xx: fix CCFG/FCFG1 register offsets
2020-04-15 17:33:12 +02:00
benpicco
7aa62006e7
Merge pull request #13840 from btcven/2020_04_06-uart1
cc26xx_cc13xx: fix UART1 initialization
2020-04-15 17:15:24 +02:00
Benjamin Valentin
c1d05f07a5 cpu/kinetis: use $(MAKEFILEDIR) 2020-04-15 11:51:11 +02:00
Jean Pierre Dudey
e944638d3d
cc26x2_cc13x2: fix FCFG1 register offsets
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-14 17:22:02 -05:00
Jean Pierre Dudey
cbcd7d58e7
cc26xx_cc13xx: fix CCFG offset on x2 variants
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-14 17:15:56 -05:00
benpicco
b9fda5630e
Merge pull request #13851 from iosabi/vectors_cortexm
Allow to define reserved fields in CortexM vector table.
2020-04-14 23:18:29 +02:00
Akshai M
642fe16807 cpu/nrf52/include/nrf802154.h : Add Group
Add CT Params to netdev group in Config for Doxygen
2020-04-14 20:52:16 +05:30
Benjamin Valentin
cfe606b601 cpu/lpc2387: gpio: Don't discriminate between rising & falling pins
The `test_irq()` function does not discriminate between rising and
falling pins, so there is no need to handle them separately.
2020-04-12 21:31:42 +02:00
Benjamin Valentin
6233175f16 cpu/lpc2387: gpio: Fix interrupts on PORT2
The calculation of `_state_index` is broken for `port = 2`

    _gpio_isr_map[n + (port<<1)];

Will not yield the right result. As a consequence, IRQs on Port 2
are not working.
The right thing here would be

    _gpio_isr_map[n + (port ? 32 : 0)];

But we might just re-using the `_isr_map_entry()` function.
Also only iterate as many times as there are set interrupt bits.
2020-04-12 21:31:42 +02:00
iosabi
7e7b6e1cfe Allow to define reserved fields in CortexM vector table.
The ARM CortexM vector table has some reserved fields which are used by
some manufacturers to store their custom image information. In
particular, NXP QN908X stores the checksum, Code Read Protection, image
type and boot block pointer in this region.

This patch allows the cpu and board modules to define the value of these
fields at build time by defining a macro.
2020-04-10 10:37:41 +00:00
Leandro Lanzieri
a06d9bbb66
Merge pull request #13315 from jia200x/pr/kconfig/ieee802154
ieee802154: Expose configurations to Kconfig
2020-04-08 19:34:55 +02:00
Jean Pierre Dudey
d4084d6df9
cc26xx_cc13xx: fix UART1 initialization
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-08 12:24:02 -05:00
Jose Alamos
77325b4cde ieee802154: add CONFIG_ prefix to config macros 2020-04-08 19:08:25 +02:00
Leandro Lanzieri
c36f2ee077
cpu/Kconfig: Declare common CPU symbols
The symbols used to define a CPU are:
- CPU
- CPU_MODEL
- CPU_FAMILY
- CPU_ARCH
2020-04-08 17:37:06 +02:00
Dylan Laduranty
f9a4c509b1
Merge pull request #13797 from benpicco/cpu/samd21-pwm
cpu/samd21: pwm: allow to use channels > 3
2020-04-08 15:45:22 +02:00
Benjamin Valentin
4d90a9c6b5 cpu/samd21: pwm: fix GCLK_ID & APBCMASK calculation
GCLK_ID and APBCMASK entries are not always uniform.
The previous hack would already break for TCC3.

Just explosively write down the cases, there are only 5 at most.
2020-04-08 15:24:05 +02:00
ee3fc27e96
cpu/fe310: implement driver for watchdog 2020-04-07 14:37:55 +02:00
Sören Tempel
d7104e4992 makefiles/toolchain: add support for afl 2020-04-07 14:24:10 +02:00
Leandro Lanzieri
d60295db3c
Merge pull request #13720 from aabadie/pr/native_no_export
native: only export NATIVEINCLUDES in vars.inc.mk
2020-04-07 12:55:45 +02:00
Gunar Schorcht
ce431b2343 cpu/esp32: use RTT based RTC implementation 2020-04-07 09:12:44 +02:00
Gunar Schorcht
0e7eb48d6a cpu/esp32: use RTT instead of RTC in pm_layered 2020-04-07 09:12:44 +02:00
Gunar Schorcht
f67cb48f6d cpu/esp32: add RTT counter implementation
fixup! cpu/esp32: add RTT counter implementation
2020-04-07 09:12:44 +02:00
Benjamin Valentin
4451765952 cpu/lpc2387: fix check for max number of timers
The CPU has 4 hardware timers.
Configuration for all 4 timers exists, but the compile-time range
check has an off-by-one error, causing the last timer to remain
inaccessible.
2020-04-05 01:56:55 +02:00
Gunar Schorcht
f2e776bd3f cpu/esp32: use module newlib_nano 2020-04-04 13:37:22 +02:00
benpicco
b87be4bd6e
Merge pull request #13786 from benpicco/cpu/saml21/buck_converter
cpu/saml21: enable buck voltage regulator when possible
2020-04-03 18:12:05 +02:00
Gunar Schorcht
6cd9896ac0 cpu/esp: move BACKUP* attributes to esp_common 2020-04-03 18:07:12 +02:00
Gunar Schorcht
a0b77de3dc cpu/esp8266: move RTC_BSS_ATTR to cpu/esp_common
Since the attribute is required by EPS8266 as well as ESP32, it is moved to cpu/esp_common.
2020-04-03 18:07:12 +02:00
Pekka Nikander
4534e9b773
cpu/cortexm_common: add irq sub-priorities
This commit enables Cortex-M CPU interrupt sub-priorities
and allows the PendSV interrupt to have a priority different
from the default one.  Together these two preprocessor
defines can be used to have PendSV always run as the last interrupt
before returning from the interrupt stack back to the user space.

Running PendSV as the last interrupt before returning to the
user space is recommended by ARM, as it increases efficiency.
Furthermore, that change enhances stability a lot with the
new nRF52 SoftDevice support, currently being worked in
PR #9473.

This commit merely enables sub-priorities and a separate
PendSV priority to be used without changing the default
RIOT behaviour.
2020-04-03 17:49:31 +02:00
Benjamin Valentin
01c573c612 cpu/samd21: pwm: allow to use channels > 3
Channels 4…7 are on the CCB register.
2020-04-03 01:02:38 +02:00
Benjamin Valentin
49fda3e900 cpu/samd5x: don't run DFLL on-demand
The DFLL on samd5x has a hardware bug that requires a special
re-enabling sequence when it is disabled and then re-enabled again.

When running the clock on-demand, the hardware handles the disabling
and re-enabling so that sequence does not get executed.

To reproduce, run `tests/periph_uart` on `same54-xpro`.

Without this patch the test will get seemingly stuck on `sleep_test()`.
(In fact it keeps running, but the DFLL has the wrong frequency so the
UART baudrate is wrong).

In this test, on `same54-xpro` only UART0 is sourced from DFLL.
So if the UART is disabled the DFLL will be turned off as well.
2020-04-02 20:11:41 +02:00
Benjamin Valentin
f037e06b13 cpu/saml21: enable buck voltage regulator when possible
Switch from the on-chip LDO to the on-chip buck voltage regulator
when not fast internal oscillators are used.

On `saml21-xpro` with `examples/default` this gives

**before:** 750 µA
** after:** 385 µA
2020-04-02 17:25:16 +02:00
Benjamin Valentin
3f95d3d2e3 cpu/saml21: pm: set deep flag
Set the deep flag for consistency with other family members.
2020-04-02 17:25:13 +02:00
Benjamin Valentin
7e156dd2e5 cpu/saml1x, saml2x: PM_NUM_MODES is a valid mode
The mode PM_NUM_MODES is the IDLE mode, so do not skip it.
2020-04-01 18:10:23 +02:00
Benjamin Valentin
5d123cbb22 cpu/sam0_common: distribute PM_NUM_MODES among siblings
Also adapt the defines to the documentation

 - CPUs define up to 4 power modes (from zero, the lowest power mode,
   to PM_NUM_MODES-1, the highest)
 - >> there is an implicit extra idle mode (which has the number PM_NUM_MODES) <<

Previously on saml21 this would always generate pm_set(3) which is an illegal state.
Now pm_layered will correctly generate pm_set(2) for IDLE modes.

Idle power consumption dropped from 750µA to 368µA and wake-up from standby is also
possible. (Before it would just enter STANDBY again as the mode register was never
written with the illegal value.)
2020-04-01 18:10:23 +02:00
Benjamin Valentin
f6139ae346 cpu/samd5x: work around errata when (re-)initializing DFLL
When a previously disabled DFLL gets enabled again, the frequency will
be incorrect. Follow the procedure outlined in the errata sheet, section 2.8.3
to work around the issue.

This fixes wake from standby.
2020-04-01 15:41:20 +02:00
Dylan Laduranty
6bba4188fc
Merge pull request #13764 from benpicco/cpu/saml11/use_buck_converter
cpu/saml1x: select buck voltage regulator when possible
2020-04-01 14:47:47 +02:00
Leandro Lanzieri
ea2f963302
cpu/cortexm: Add 'cortexm_fpu' as a DEFAULT_MODULE if possible
This adds cortexm_fpu to the DEFAULT_MODULE list when the feature
cortexm_fpu is provided by the architecture. It also moves the
dependency resolution of this module to the architecture-specific
Makefile.dep file.
2020-04-01 09:46:29 +02:00
Leandro Lanzieri
64552a3b9a
cpu/cortexm_common: Move common modules to Makefile.dep
This moves the following modules to a architecture-specific Makefile.dep
file:
- cortexm_common
- cortexm_common_periph
- newlib
- newlib_nano
- periph
2020-04-01 09:46:21 +02:00
benpicco
e5562a89a3
Merge pull request #13765 from gschorcht/cpu/esp/fix_netopt_link_type
cpu/esp: fix type for NETOPT_LINK for esp_wifi/esp_eth
2020-03-31 21:51:08 +02:00
Gunar Schorcht
579de1a1e7 cpu/esp: deprecated NETOPT_LINK_CONNECTED renamed 2020-03-31 18:11:47 +02:00
Gunar Schorcht
aa3de05601 cpu/esp: fix netopt_enabled_t handling in esp_wifi/esp_eth 2020-03-31 18:11:36 +02:00
Dylan Laduranty
6a788b3c02
Merge pull request #13761 from RIOT-OS/cpu/samd5x/rtc_workaround
cpu/samd5x: disable RTC on init to prevent undefined RTC state
2020-03-31 17:25:25 +02:00
Benjamin Valentin
895eb943d8 cpu/sam0_common: add cpu_pm_cb_enter()/leave()
This allows to implement needed work-arounds surrounding sleep on
a per-MCU basis.
2020-03-31 17:18:58 +02:00
Benjamin Valentin
005de7024b cpu/saml1x: enable buck voltage regulator
Switch from the on-chip LDO to the on-chip buck voltage regulator.
2020-03-31 17:18:58 +02:00
Benjamin Valentin
9b90fd478a cpu/sam0_common: provide function to switch voltage regulator
Add a fucntion to switch between LDO and Buck concerter to provide the
internal CPU voltage.
The Buck Converter is not compatible with internal fast oscillators (DFLL, DPLL)
and requires an inductivity to be present on the board.
2020-03-31 17:18:20 +02:00
Francisco
1a8b35f54b
Merge pull request #13377 from leandrolanzieri/pr/kconfig_migrate/drivers/periph_wdt
drivers/periph/wdt: Expose configurations to Kconfig
2020-03-31 16:36:36 +02:00
Dylan Laduranty
783ffdc28a
Merge pull request #13607 from benpicco/cpu/sam0_common/generic_RAM_ROM
cpu/sam0_common: derive ROM_LEN & RAM_LEN from part number
2020-03-31 15:55:04 +02:00
Benjamin Valentin
d12abe6a2b cpu/samd5x: disable RTC on init to prevent undefined RTC state
When changing the clock configuration while the RTC is running, the
RTC may end up in an undefined state that leaves it unresponsive.

The RTC is not reset to stay persistent across reboots/hibernate, so
it will not be reset on init.
Instead, disable the RTC while configuring the clocks, rtc_init() will
take care of re-enabling it.

@dylad introduced this workaround for saml21, samd5x needs it too.

To reproduce, set the CLOCK_CORECLOCK of a samd5x board (e.g. same54-xpro)
to 48 MHz.
Run any RTC application. The CPU will be stuck in _wait_syncbusy() after
a reboot.
This patch will fix this. (You will need to power-cycle the board if the
RTC has entered the stuck state as it will never be reset.)
2020-03-31 15:34:55 +02:00
benpicco
97acdd94c5
Merge pull request #13677 from gschorcht/cpu/esp/esp_wifi/modem_sleep
cpu/esp_common: allow WiFi modem sleep mode
2020-03-31 14:15:06 +02:00
Leandro Lanzieri
f69427fcf7
cpu/saml1x: Add Kconfig file 2020-03-31 13:39:41 +02:00
Leandro Lanzieri
218f7bfe0c
cpu/saml21: Add Kconfig file 2020-03-31 13:39:41 +02:00