The toolchain provides POSIX type definitions for pthread which conflicts with that in RIOT. With the CFLAGS/CXXFLAGS skip the inclusion of the types shipped by the toolchain.
Module `esp_idf_nvs_flash` uses C++ code. Since `esp_idf_nvs_flash` module is always enabled on ESP8266, the permanent dependency on `cpp` is correct. But on ESP32, the `esp_idf_nvs_flash` module is only enabled if `esp_wifi_any` is used. Only in that case the compilation should depend on module `cpp`.
The vendor binary libraries of ESP-IDF are provided as a separate GIT repository. These libraries are defined as separate package for two reasons: 1. RIOT packages don't support to clone GIT repositories recursively; 2. ESP-IDF pulls a lot of other GIT repositories that are not needed when it is cloned recursively.
The vendor binary libraries of ESP-IDF are provided as a separate GIT repository. These libraries are defined as separate package for two reasons: 1. RIOT packages don't support to clone GIT repositories recursively; 2. ESP-IDF pulls a lot of other GIT repositories that are not needed when it is cloned recursively.
The former correction factors were determined by measuring the resulting clocks without a device connected to the bus.
However, when testing the changes for low CPU clock frequencies, it was figured out that the clocks not only depend on configured register values
_i2c_hw[dev].regs->scl_low_period.period
_i2c_hw[dev].regs->scl_high_period.period
but also on the bus capacity. Obviously, the register values are not absolute times in APB clock cycles, but rather times that start as soon as the corresponding level is reached. In this case, the higher the bus capacity, the longer the period would be.
This means that the clock speed cannot be precisely controlled via the correction factors anyway. For this reason, and because the I2C implementation in ESP-IDF also does not use correction factors, they were removed.
The semantics of defining an SSID prefix that overrides the already defined SSID exactly when and only when it is set, and then enabling dynamic SSID generation with that prefix, made handling the parameter definition unnecessarily difficult and hard to understand.
Defining a boolean option that enables dynamic SSID generation, which then simply reuses the defined SSID as a prefix, makes it much more understandable and easier to handle, especially with respect to Kconfig.
With the change from using archive files to using object files in PR #14754, the module `esp_wifi_enterprise` was no longer compilable. The reason for this was that the file `bignum.c` was present in two different vendor sub-directories and created two identical object files, which then led to a symbol conflict when linking. This commit removes one of these identical files. The one that is used in all `esp_wifi` variants is kept, the one that is only used in `esp_wifi_enterprise` is dropped.
The IRAM is much faster, while the IROM is much slower and can only be accessed via a cache, which is also sometimes disabled, e.g. by the WiFi module or when writing to the flash. Therefore, time-critical code as well as code that has to work even when the cache is disabled must be placed in the IRAM.
Checksumming flash is not supported on xtensa platform:
Warn : not implemented yet
make: *** [.../RIOT/examples/saul/../../Makefile.include:796: flash] Error 1
https://github.com/espressif/openocd-esp32 is needed.
Example config (when compiled from source):
export OPENOCD="~/esp/openocd-esp32/src/openocd -s ~/esp/openocd-esp32/tcl"
If esp_idf_heap is not used, implement calloc through a custom wrapper
function on top of malloc to add overflow detection, which is not
present in the newlib forks with xtensa support yet.
The RTT overflow callback is not available on all RTT implementations.
This means it is either a no-op or `rtt_set_overflow_cb()` is a no-op
or it will overwrite the alarm set with `rtt_set_alarm()`.
This adds a feature to indicate that proper overflow reporting is available.
Some periph_rtt implementations do not provide `rtt_set_counter()`. This
adds `periph_rtt_set_counter` as feature to allow testing for its
availability. The feature is provided at CPU level if periph_rtt is
provided by the board for all CPUs implementing `rtt_set_counter()`.
Some periph_rtt implementations do not provide `rtt_set_counter()`. This
adds `periph_rtt_set_counter` as feature to allow testing for its
availability. The feature is provided at CPU level if periph_rtt is
provided by the board for all CPUs implementing `rtt_set_counter()`.
If there is an event to be handled by _esp_eth_isr(), don't
overwrite it if a new packet has been received.
In my testing, all SYSTEM_EVENT_ETH_CONNECTED events except the first
are immediately followed by at least one SYSTEM_EVENT_ETH_RX_DONE event.
This causes the SYSTEM_EVENT_ETH_CONNECTED to not get handled, and the
IP stack will not be notified of the new link state.
Protect the other events by dropping the packet instead. If an earlier
unhandled SYSTEM_EVENT_ETH_RX_DONE event exists, overwrite it with the
newer packet.
I only saw this happen with lwIP and not with GNRC - I am not sure why.
But it still is a race waiting to happen. The nice long term solution
is probably to have a queue of unhandled events, allowing them all to
be processed once there is time.
This is an implementation of the ESP32 SoftAP mode using the
`esp_wifi_ap` pseudomodule.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Add `TARGET_ARCH_<ARCH>` for each architecture (e.g. `TARGET_ARCH_CORTEX` for
Cortex M) to allow users to overwrite the target triple for a specific arch
from ~/.profile or ~/.bashrc (or the like) without overwriting it for all others
as well.
Since former ESP32 toolchain versions used POSIX threads, module `pthread` was required. The built-in `cxa_ctor_guards` had to be replaced since they used the `pthread_once` function for singleton objects initialization where the parameter `once` was of incompatible type with that provided by RIOT's `pthread` module. The current ESP32 toolchain version no longer uses POSIX threads. The dependency on module `pthread` as well as according C++ hacks can be removed.
In #12955 optimization was switched to O2 because with the '-Os'
option, the ESP32 hangs sporadically in 'tests/bench*' if
interrupts where disabled too early by benchmark tests.
Since it hasn't been reproduced since and in #13196 O2 was causing
un-explained hardfaults, since the aforementioned issue could not
be reproduced we switch back to Os by removing O2, as Os will be
used by default.
GPIO32 and GPIO33 are used during boot to start an 32.768 kHz XTAL if it is connected to these GPIOs. If the 32.768 kHz XTAL is not connected, these pins can be used digital IO. However, the 32.678 kHz XTAL has to be disabled explicitly in this case. Furthermore, the handling of GPIOs greater than GPIO31 had to be fixed in I2C software implementation.
When entering a sleep mode, all wake-up sources should first be disabled before the wake-up sources required for the sleep mode are then stepwise enabled again. Otherwise, an wake-up configuration of one sleep mode may affect the wake-up within another sleep mode.
The WiFi interface should be stopped before reboot or sleep. But stopping the WiFi interface disconnects an existing connection. Usually, esp_wifi_netdev tries to reconnect on an disconnect event. However, trying reconnect with a stopped WiFi interface may lead to a crash. Therefore, the stop event has to be handled.
Now, where the vendor files for light/deep sleep mode are added, function `pm_off` does not need to implement this mode by itself. Instead the existing deep sleep with disabled wakeup sources is used for pm_off.
`rtc_init` is used after light sleep to update the system time from RTC timer. The fix corrects a small difference of about 230 ms which would sum up with each wakeup from light sleep.
By using a custom EPOCH for the RTC implementation, we can extend the
range of the 32 bit counter based RTC by 118 years.
It also reduces the code size compared to the stdlib based POSIX functions.
To be able to define common configurations for all ESP CPUs, the CPU specific configuration cpu_conf.h has to include a common configuration. For that purpose cpu_conf.h in cpu/esp_common is renamed to cpu_conf_common.h and included in CPU specific configurations.
During the write access to the SPI flash, the IROM cache is not available and only code from the IRAM can be executed. Therefore, the code of file system implementations which access the SPI flash must reside in IRAM.
The same tool 'gen_esp32part.py' is used for the generation of partition tables on ESP8266 as well as n ESP32. The tool is therefore added to 'dist/tools/esptool'
With the new toolchain version required to fix issue #13133, the compilation of `examples/posix_socket` fails due to a C linkage error in `atomic_base.h`. The reason is that including `drivers/include/mtd.h` in `boards/esp32/board_common.h` inside the `extern C` block finally leads to including `atomic_base.h` inside the `extern C` block which in turn to the C linkage error for the template definitions in this file.
ESP32 can be clocked with either a 40 MHz or 26 MHz crystal. Since most boards use a 40 MHz crystal, the configuration was previously fixed to a 40 MHz crystal. This commit changes the crystal from 40 MHz to automatic detection, allowing boards with a 26 MHz crystal like the Sparkfun ESP32 Thing DEV to be used.
- Unecessary definitions are removed.
- Since the 48-bit RTC hardware timer uses a RC oscillator as clock, it is pretty inaccurate and leads to a RTC time deviation of up to 3 seconds per minute. Therefore, a calibration during the boot time determines a correction factor for the 48-bit RTC hardware timer. Function _rtc_time_to_us uses now this correction factor and converts a raw 48-bit RTC time to a corrected time in microseconds. Thus, the 48-bit RTC timer becomes much more accurate, but it can't still reach the accuracy of the PLL driven 64-bit system timer. The Advantage of using RTC over 64-bit sydtem timer is that it also continues in deep sleep mode and after software reset.
- If the 64-bit system timer is used to emulate the RTC timer, it uses the RTC hardware timer to continue its operation after software .
It is possible to use different timers as RTC timer for the periph_rtc module. Either the 48-bit RTC hardware timer is used directly or the PLL driven 64-bit system timer emulates a RTC timer. The latter one is much more accurate. Pseudomodule esp_rtc_timer controlls which timer is used. Only if esp_rtc_timer is enabled explicitly, the 48-bit RTC hardware timer is used. Otherwise the 64-bit sytstem timer is used to emulate the RTC timer.
The explicit call of rtc_init during the CPU start was removed because rtc_init is called within the function periph_init. The display of the system time at startup had to be placed after the call to periph_init.
There is an existing function that returns the system time in us as a 64 bit value. Converting this 64 value in us to a 32 bit value in ms is more easier and uses the complete 32 bit range. Using only the low part of the 64 bit system time in us and dividing it by 1e3 cuts the 32 bit range.
To control the log level and the format of the log output of SDK libraries, a bunch of library-specific printf functions are realized which map the log output from SDK libraries to RIOT's log macros.
The buffer[EHTHERNET_MAX_LEN] used in _esp_wifi_send to convert the iolist of the given packet to a plain buffer for the WiFi interface should not be on the stack to prevent the sending thread's stack from overflowing.
To avoid that murdock times out before tests/pkg_spiffs and tests/pkg_littlefs time out, the configured test timeouts for these tests is reduced to 200 seconds which should be enough. An ESP32 needs an average of 60 seconds for these tests, while an ESP8266 needs in average 100 seconds.
ESP32 nodes can crash during SPI Flash write operations if required parts of the code are not in the IRAM but in the cached SPI Flash memory, which is disabled during the SPI Flash write operations. Therefore, the code of the SPIFFS package and the VFS module are now stored in the IRAM.
To reduce the information that are printed at the console during the startup, special bootloaders are required that suppress the outputs which are only informational. The according bootloader has to be selected during the make process.
Startup information, including board configuration, is only printed when module esp_log_startup is used. This reduces the amount of information that is printed by default to the console during the startup. The user can enable module esp_log_startup to get the additional startup information.
The UART peripheral clock seems to be sporadically set to wrong value when the CPU clock is changed. In this case, the UART clock is not set to 115.200 kbps but to 96 kbps, so that the output in the console seems like garbage. This can also cause automatic tests to fail. Therefore, the CPU clock is only changed if CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ defines a different default CPU clock than the one already used at boot time.
