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cpu/esp32: fix compilation problems with ESP-IDF v4.4

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This commit is contained in:
Gunar Schorcht 2022-02-01 22:09:50 +01:00
parent 443f3b87df
commit d7382ab063
8 changed files with 81 additions and 70 deletions
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2
cpu/esp32/include/periph_cpu.h
View File

@ -20,7 +20,7 @@
#define PERIPH_CPU_H
#include <stdint.h>
#include "sdk_conf.h"
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {

5
cpu/esp32/periph/i2c_hw.c
View File

@ -47,13 +47,13 @@
#include "cpu.h"
#include "log.h"
#include "mutex.h"
#include "macros/units.h"
#include "periph_conf.h"
#include "periph/gpio.h"
#include "periph/i2c.h"
#include "thread_flags.h"
#include "esp_common.h"
#include "esp_attr.h"
#include "gpio_arch.h"
#include "driver/periph_ctrl.h"
#include "irq_arch.h"
@ -68,6 +68,9 @@
#include "syscalls.h"
#include "xtensa/xtensa_api.h"
#undef MHZ
#include "macros/units.h"
#if defined(I2C0_SPEED) || defined(I2C1_SPEED)
/* operation codes used for commands */

14
cpu/esp32/periph/pm.c
View File

@ -18,21 +18,23 @@
* @}
*/
#define ENABLE_DEBUG 0
#include "debug.h"
/* RIOT headers have to be included before ESP-IDF headers! */
#include "esp_attr.h"
#include "esp_sleep.h"
#include "gpio_arch.h"
#include "periph/rtc.h"
#include "rtt_arch.h"
#include "syscalls.h"
#include "periph/rtc.h"
/* ESP-IDF headers */
#include "esp_sleep.h"
#include "rom/rtc.h"
#include "rom/uart.h"
#include "soc/rtc.h"
#include "soc/rtc_cntl_reg.h"
#define ENABLE_DEBUG 0
#include "debug.h"
extern void rtt_save_counter(void);
extern void rtt_restore_counter(void);
@ -101,7 +103,7 @@ void pm_reboot(void)
software_reset();
}
#ifndef MODULE_PM_LAYERED
#if !IS_USED(MODULE_PM_LAYERED)
void pm_set_lowest(void)
{

63
cpu/esp32/periph/pwm.c
View File

@ -99,8 +99,8 @@ static const struct _pwm_hw_t _pwm_hw[] =
.mod = PERIPH_PWM0_MODULE,
.int_src = ETS_PWM0_INTR_SOURCE,
.signal_group = PWM0_OUT0A_IDX,
.gpio_num = ARRAY_SIZE(pwm0_channels),
.gpios = pwm0_channels,
.gpio_num = ARRAY_SIZE(_pwm_channel_gpios_0),
.gpios = _pwm_channel_gpios_0,
},
#endif
#ifdef PWM1_GPIOS
@ -109,8 +109,8 @@ static const struct _pwm_hw_t _pwm_hw[] =
.mod = PERIPH_PWM1_MODULE,
.int_src = ETS_PWM1_INTR_SOURCE,
.signal_group = PWM1_OUT0A_IDX,
.gpio_num = ARRAY_SIZE(pwm1_channels),
.gpios = pwm1_channels,
.gpio_num = ARRAY_SIZE(_pwm_channel_gpios_1),
.gpios = _pwm_channel_gpios_1,
},
#endif
};
@ -227,13 +227,13 @@ void pwm_set(pwm_t pwm, uint8_t channel, uint16_t value)
break;
case PWM_RIGHT: cmp = value - 1;
break;
case PWM_CENTER: cmp = _pwm_hw[pwm].regs->timer[0].period.period - value;
case PWM_CENTER: cmp = _pwm_hw[pwm].regs->timer[0].timer_cfg0.timer_period - value;
break;
}
_pwm_hw[pwm].regs->channel[op_idx].cmpr_value[op_out].cmpr_val = cmp;
_pwm_hw[pwm].regs->operators[op_idx].timestamp[op_out].gen = cmp;
/* set actions for timing events (reset all first) */
_pwm_hw[pwm].regs->channel[op_idx].generator[op_out].val = 0;
_pwm_hw[pwm].regs->operators[op_idx].generator[op_out].val = 0;
if (op_out == 0)
{
@ -241,18 +241,18 @@ void pwm_set(pwm_t pwm, uint8_t channel, uint16_t value)
switch (_pwm_dev[pwm].mode)
{
case PWM_LEFT:
_pwm_hw[pwm].regs->channel[op_idx].generator[op_out].utez = PWM_OP_ACTION_HIGH;
_pwm_hw[pwm].regs->channel[op_idx].generator[op_out].utea = PWM_OP_ACTION_LOW;
_pwm_hw[pwm].regs->operators[op_idx].generator[op_out].gen_utez = PWM_OP_ACTION_HIGH;
_pwm_hw[pwm].regs->operators[op_idx].generator[op_out].gen_utea = PWM_OP_ACTION_LOW;
break;
case PWM_RIGHT:
_pwm_hw[pwm].regs->channel[op_idx].generator[op_out].dtea = PWM_OP_ACTION_HIGH;
_pwm_hw[pwm].regs->channel[op_idx].generator[op_out].dtep = PWM_OP_ACTION_LOW;
_pwm_hw[pwm].regs->operators[op_idx].generator[op_out].gen_dtea = PWM_OP_ACTION_HIGH;
_pwm_hw[pwm].regs->operators[op_idx].generator[op_out].gen_dtep = PWM_OP_ACTION_LOW;
break;
case PWM_CENTER:
_pwm_hw[pwm].regs->channel[op_idx].generator[op_out].utea = PWM_OP_ACTION_HIGH;
_pwm_hw[pwm].regs->channel[op_idx].generator[op_out].dtea = PWM_OP_ACTION_LOW;
_pwm_hw[pwm].regs->operators[op_idx].generator[op_out].gen_utea = PWM_OP_ACTION_HIGH;
_pwm_hw[pwm].regs->operators[op_idx].generator[op_out].gen_dtea = PWM_OP_ACTION_LOW;
break;
}
}
@ -261,18 +261,18 @@ void pwm_set(pwm_t pwm, uint8_t channel, uint16_t value)
switch (_pwm_dev[pwm].mode)
{
case PWM_LEFT:
_pwm_hw[pwm].regs->channel[op_idx].generator[op_out].utez = PWM_OP_ACTION_HIGH;
_pwm_hw[pwm].regs->channel[op_idx].generator[op_out].uteb = PWM_OP_ACTION_LOW;
_pwm_hw[pwm].regs->operators[op_idx].generator[op_out].gen_utez = PWM_OP_ACTION_HIGH;
_pwm_hw[pwm].regs->operators[op_idx].generator[op_out].gen_uteb = PWM_OP_ACTION_LOW;
break;
case PWM_RIGHT:
_pwm_hw[pwm].regs->channel[op_idx].generator[op_out].dteb = PWM_OP_ACTION_HIGH;
_pwm_hw[pwm].regs->channel[op_idx].generator[op_out].dtep = PWM_OP_ACTION_LOW;
_pwm_hw[pwm].regs->operators[op_idx].generator[op_out].gen_dteb = PWM_OP_ACTION_HIGH;
_pwm_hw[pwm].regs->operators[op_idx].generator[op_out].gen_dtep = PWM_OP_ACTION_LOW;
break;
case PWM_CENTER:
_pwm_hw[pwm].regs->channel[op_idx].generator[op_out].uteb = PWM_OP_ACTION_HIGH;
_pwm_hw[pwm].regs->channel[op_idx].generator[op_out].dteb = PWM_OP_ACTION_LOW;
_pwm_hw[pwm].regs->operators[op_idx].generator[op_out].gen_uteb = PWM_OP_ACTION_HIGH;
_pwm_hw[pwm].regs->operators[op_idx].generator[op_out].gen_dteb = PWM_OP_ACTION_LOW;
break;
}
}
@ -305,15 +305,15 @@ static void _pwm_start(pwm_t pwm)
switch (mode) {
case PWM_LEFT:
period = res;
_pwm_hw[pwm].regs->timer[0].mode.mode = PWM_TIMER_MOD_UP;
_pwm_hw[pwm].regs->timer[0].timer_cfg1.timer_mod = PWM_TIMER_MOD_UP;
break;
case PWM_RIGHT:
period = res;
_pwm_hw[pwm].regs->timer[0].mode.mode = PWM_TIMER_MOD_DOWN;
_pwm_hw[pwm].regs->timer[0].timer_cfg1.timer_mod = PWM_TIMER_MOD_DOWN;
break;
case PWM_CENTER:
period = res * 2;
_pwm_hw[pwm].regs->timer[0].mode.mode = PWM_TIMER_MOD_UP_DOWN;
_pwm_hw[pwm].regs->timer[0].timer_cfg1.timer_mod = PWM_TIMER_MOD_UP_DOWN;
break;
}
@ -359,19 +359,19 @@ static void _pwm_start(pwm_t pwm)
8 bit timer prescaler can scale down timer clock to 2,5 kHz */
prescale = 250;
}
_pwm_hw[pwm].regs->clk_cfg.prescale = prescale - 1;
_pwm_hw[pwm].regs->clk_cfg.clk_prescale = prescale - 1;
/* set timing parameters (only timer0 is used) */
_pwm_hw[pwm].regs->timer[0].period.prescale = (PWM_CLK / prescale / cps) - 1;
_pwm_hw[pwm].regs->timer[0].period.period = (mode == PWM_CENTER) ? res : res - 1;
_pwm_hw[pwm].regs->timer[0].period.upmethod = PWM_TIMER_UPDATE_IMMIDIATE;
_pwm_hw[pwm].regs->timer[0].timer_cfg0.timer_prescale = (PWM_CLK / prescale / cps) - 1;
_pwm_hw[pwm].regs->timer[0].timer_cfg0.timer_period = (mode == PWM_CENTER) ? res : res - 1;
_pwm_hw[pwm].regs->timer[0].timer_cfg0.timer_period_upmethod = PWM_TIMER_UPDATE_IMMIDIATE;
/* start the timer */
_pwm_hw[pwm].regs->timer[0].mode.start = PWM_TIMER_RUNS_ON;
_pwm_hw[pwm].regs->timer[0].timer_cfg1.timer_start = PWM_TIMER_RUNS_ON;
/* set timer sync phase and enable timer sync input */
_pwm_hw[pwm].regs->timer[0].sync.timer_phase = 0;
_pwm_hw[pwm].regs->timer[0].sync.in_en = 1;
_pwm_hw[pwm].regs->timer[0].timer_sync.timer_phase = 0;
_pwm_hw[pwm].regs->timer[0].timer_sync.timer_synci_en = 1;
/* set the duty for all channels to start them */
for (int i = 0; i < _pwm_dev[pwm].chn_num; i++) {
@ -381,14 +381,15 @@ static void _pwm_start(pwm_t pwm)
/* sync all timers */
for (unsigned i = 0; i < PWM_NUMOF; i++) {
_pwm_hw[i].regs->timer[0].sync.sync_sw = ~_pwm_hw[i].regs->timer[0].sync.sync_sw;
_pwm_hw[i].regs->timer[0].timer_sync.timer_sync_sw =
~_pwm_hw[i].regs->timer[0].timer_sync.timer_sync_sw;
}
}
static void _pwm_stop(pwm_t pwm)
{
/* disable the timer */
_pwm_hw[pwm].regs->timer[0].mode.mode = PWM_TIMER_MOD_FREEZE;
_pwm_hw[pwm].regs->timer[0].timer_cfg1.timer_mod = PWM_TIMER_MOD_FREEZE;
}
/* do some static initialization and configuration checks */

7
cpu/esp32/periph/rtt.c
View File

@ -19,15 +19,18 @@
* @}
*/
/* RIOT headers have to be included before ESP-IDF headers! */
#include "cpu.h"
#include "esp_attr.h"
#include "esp_sleep.h"
#include "irq_arch.h"
#include "log.h"
#include "periph/rtt.h"
#include "rtt_arch.h"
#include "syscalls.h"
/* ESP-IDF headers */
#include "esp_attr.h"
#include "esp_sleep.h"
#define ENABLE_DEBUG 0
#include "debug.h"

13
cpu/esp32/periph/rtt_hw_rtc.c
View File

@ -19,20 +19,25 @@
* @}
*/
/* RIOT headers have to be included before ESP-IDF headers! */
#include "cpu.h"
#include "esp_attr.h"
#include "esp/common_macros.h"
#include "esp_common.h"
#include "esp_sleep.h"
#include "irq_arch.h"
#include "log.h"
#include "periph/rtt.h"
#include "rtt_arch.h"
#include "soc/dport_reg.h"
#include "soc/rtc_cntl_struct.h"
#include "syscalls.h"
#include "timex.h"
/* ESP-IDF headers */
#include "esp_attr.h"
#include "esp_sleep.h"
#include "rom/ets_sys.h"
#include "soc/dport_reg.h"
#include "soc/rtc_cntl_struct.h"
#include "xtensa/xtensa_api.h"
#define ENABLE_DEBUG 0
#include "debug.h"

11
cpu/esp32/periph/rtt_hw_sys.c
View File

@ -19,18 +19,23 @@
* @}
*/
/* RIOT headers have to be included before ESP-IDF headers! */
#include "cpu.h"
#include "esp_attr.h"
#include "esp/common_macros.h"
#include "esp_sleep.h"
#include "irq_arch.h"
#include "log.h"
#include "periph/rtt.h"
#include "rtt_arch.h"
#include "soc/timer_group_struct.h"
#include "syscalls.h"
#include "timex.h"
/* ESP-IDF headers */
#include "esp_attr.h"
#include "esp_sleep.h"
#include "rom/ets_sys.h"
#include "soc/timer_group_struct.h"
#include "xtensa/xtensa_api.h"
#define ENABLE_DEBUG 0
#include "debug.h"

36
cpu/esp32/syscalls.c
View File

@ -17,9 +17,7 @@
*
* @}
*/
#include <stdlib.h>
#include <sys/lock.h>
#include <stdint.h>
#include <sys/unistd.h>
#include <sys/time.h>
@ -29,16 +27,16 @@
#include "periph_cpu.h"
#include "periph/pm.h"
#include "syscalls.h"
#include "sys/lock.h"
#include "timex.h"
#include "macros/units.h"
#include "rom/ets_sys.h"
#include "rom/libc_stubs.h"
#include "soc/rtc.h"
#include "soc/rtc_cntl_struct.h"
#include "soc/timer_group_reg.h"
#include "soc/timer_group_struct.h"
#include "sdk_conf.h"
#include "sdkconfig.h"
#include "xtensa/xtensa_api.h"
#ifdef MODULE_ESP_IDF_HEAP
@ -48,7 +46,7 @@
#define ENABLE_DEBUG 0
#include "debug.h"
#ifdef MODULE_ESP_IDF_HEAP
#if IS_USED(MODULE_ESP_IDF_HEAP)
/* if module esp_idf_heap is used, this function has to be defined for ESP32 */
unsigned int get_free_heap_size(void)
@ -56,9 +54,6 @@ unsigned int get_free_heap_size(void)
return heap_caps_get_free_size(MALLOC_CAP_DEFAULT);
}
/* alias for compatibility with espressif/wifi_libs */
uint32_t esp_get_free_heap_size( void ) __attribute__((alias("get_free_heap_size")));
/* this function is platform specific if module esp_idf_heap is used */
void heap_stats(void)
{
@ -76,7 +71,7 @@ void heap_stats(void)
_alloc + _free, _alloc, _free);
}
#endif /* MODULE_ESP_IDF_HEAP */
#endif /* IS_USED(MODULE_ESP_IDF_HEAP) */
/**
* @name Other system functions
@ -154,7 +149,7 @@ extern int _printf_float(struct _reent *rptr,
void *pdata,
FILE * fp,
int (*pfunc) (struct _reent *, FILE *,
_CONST char *, size_t len),
const char *, size_t len),
va_list * ap);
extern int _scanf_float(struct _reent *rptr,
@ -172,8 +167,8 @@ static struct syscall_stub_table s_stub_table =
._calloc_r = &_calloc_r,
._sbrk_r = &_sbrk_r,
._system_r = (void *)&_no_sys_func,
._raise_r = (void *)&_no_sys_func,
._system_r = (void*)&_no_sys_func,
._raise_r = (void*)&_no_sys_func,
._abort = &_abort,
._exit_r = &_exit_r,
._getpid_r = &_getpid_r,
@ -190,8 +185,8 @@ static struct syscall_stub_table s_stub_table =
._write_r = (int (*)(struct _reent *r, int, const void *, int))&_write_r,
._read_r = (int (*)(struct _reent *r, int, void *, int))&_read_r,
._unlink_r = &_unlink_r,
._link_r = (void *)&_no_sys_func,
._rename_r = (void *)&_no_sys_func,
._link_r = (void*)&_no_sys_func,
._rename_r = (void*)&_no_sys_func,
._lock_init = &_lock_init,
._lock_init_recursive = &_lock_init_recursive,
@ -204,19 +199,19 @@ static struct syscall_stub_table s_stub_table =
._lock_release = &_lock_release,
._lock_release_recursive = &_lock_release_recursive,
#if CONFIG_NEWLIB_NANO_FORMAT
#if CONFIG_NEWLIB_NANO_FORMAT
._printf_float = &_printf_float,
._scanf_float = &_scanf_float,
#else /* CONFIG_NEWLIB_NANO_FORMAT */
#else /* CONFIG_NEWLIB_NANO_FORMAT */
._printf_float = NULL,
._scanf_float = NULL,
#endif /* CONFIG_NEWLIB_NANO_FORMAT */
#endif /* CONFIG_NEWLIB_NANO_FORMAT */
};
void IRAM syscalls_init_arch(void)
{
/* enable the system timer in us (TMG0 is enabled by default) */
TIMER_SYSTEM.config.divider = rtc_clk_apb_freq_get() / MHZ(1);
TIMER_SYSTEM.config.divider = rtc_clk_apb_freq_get() / MHZ;
TIMER_SYSTEM.config.autoreload = 0;
TIMER_SYSTEM.config.enable = 1;
@ -248,9 +243,6 @@ int64_t system_get_time_64(void)
return ret;
}
/* alias for compatibility with espressif/wifi_libs */
int64_t esp_timer_get_time(void) __attribute__((alias("system_get_time_64")));
static IRAM void system_wdt_int_handler(void *arg)
{
TIMERG0.int_clr_timers.wdt=1; /* clear interrupt */