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cpu/esp*: move some vendor/esp code to cpu/esp_common
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Gunar Schorcht
parent
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4
cpu/esp32/vendor/README.md
vendored
4
cpu/esp32/vendor/README.md
vendored
@ -1,9 +1,5 @@
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The subdirectories here contain third-party software components used by the RIOT port for ESP32.
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### esp
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The files that are part of [esp-open-rtos](https://github.com/SuperHouse/esp-open-rtos.git). The files in this directory are under the copyright of their respective owners. Please note the copyright notice in these files. All of these files are BSD Licensed as described in the file [LICENSE](https://github.com/SuperHouse/esp-open-rtos/blob/master/LICENSE).
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### esp-idf
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The files in this directory and all subdirectories are from the Espressif IoT Development Framework[ESP-IDF](https://github.com/espressif/esp-idf.git), the official development framework for ESP32. All of these files are copyright of Espressif Systems (Shanghai) PTE LTD or their respective owners and licensed under the Apache License, Version 2.0. Please refer the copyright notice in these files for details.
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141
cpu/esp32/vendor/esp/common_macros.h
vendored
141
cpu/esp32/vendor/esp/common_macros.h
vendored
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/* Some common compiler macros
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*
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* Not esp8266-specific.
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*
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* Part of esp-open-rtos
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* Copyright (C) 2015 Superhouse Automation Pty Ltd
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* BSD Licensed as described in the file LICENSE
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*/
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/*
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Copyright (c) 2015, SuperHouse Automation Pty Ltd
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef COMMON_MACROS_H
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#define COMMON_MACROS_H
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#include <sys/cdefs.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define UNUSED __attributed((unused))
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/* These macros convert values to/from bitfields specified by *_M and *_S (mask
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* and shift) constants. Used primarily with ESP8266 register access.
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*/
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#define VAL2FIELD(fieldname, value) ((value) << fieldname##_S)
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#define FIELD2VAL(fieldname, regbits) (((regbits) >> fieldname##_S) & fieldname##_M)
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#define FIELD_MASK(fieldname) (fieldname##_M << fieldname##_S)
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#define SET_FIELD(regbits, fieldname, value) (((regbits) & ~FIELD_MASK(fieldname)) | VAL2FIELD(fieldname, value))
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/* VAL2FIELD/SET_FIELD do not normally check to make sure that the passed value
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* will fit in the specified field (without clobbering other bits). This makes
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* them faster and is usually fine. If you do need to make sure that the value
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* will not overflow the field, use VAL2FIELD_M or SET_FIELD_M (which will
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* first mask the supplied value to only the allowed number of bits) instead.
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*/
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#define VAL2FIELD_M(fieldname, value) (((value) & fieldname##_M) << fieldname##_S)
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#define SET_FIELD_M(regbits, fieldname, value) (((regbits) & ~FIELD_MASK(fieldname)) | VAL2FIELD_M(fieldname, value))
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/* Set bits in reg with specified mask.
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*/
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#define SET_MASK_BITS(reg, mask) (reg) |= (mask)
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/* Clear bits in reg with specified mask
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*/
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#define CLEAR_MASK_BITS(reg, mask) (reg) &= ~(mask)
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/* Use the IRAM macro to place functions into Instruction RAM (IRAM)
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instead of flash (aka irom).
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(This is the opposite to the Espressif SDK, where functions default
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to being placed in IRAM but the ICACHE_FLASH_ATTR attribute will
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place them in flash.)
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Use the IRAM attribute for functions which are called when the
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flash may not be available (for example during NMI exceptions), or
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for functions which are called very frequently and need high
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performance.
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Usage example:
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void IRAM high_performance_function(void)
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{
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// do important thing here
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}
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Bear in mind IRAM is limited (32KB), compared to up to 1MB of flash.
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*/
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#define IRAM __attribute__((section(".iram1.text")))
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/* Use the RAM macro to place constant data (rodata) into RAM (data
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RAM) instead of the default placement in flash. This is useful for
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constant data which needs high performance access.
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Usage example:
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const RAM uint8_t constants[] = { 1, 2, 3, 7 };
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When placing string literals in RAM, they need to be declared with
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the type "const char[]" not "const char *"
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Usage example:
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const RAM char hello_world[] = "Hello World";
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*/
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#define RAM __attribute__((section(".data")))
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/* Use the IRAM_DATA macro to place data into Instruction RAM (IRAM)
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instead of the default of flash (for constant data) or data RAM
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(for non-constant data).
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This may be useful to free up data RAM. However all data read from
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any instruction space (either IRAM or Flash) must be 32-bit aligned
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word reads. Reading unaligned data stored with IRAM_DATA will be
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slower than reading data stored in RAM. You can't perform unaligned
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writes to IRAM.
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*/
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#define IRAM_DATA __attribute__((section(".iram1.data")))
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/* Use the IROM macro to store constant values in IROM flash. In
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esp-open-rtos this is already the default location for most constant
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data (rodata), so you don't need this attribute in 99% of cases.
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The exceptions are to mark data in the core & freertos libraries,
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where the default for constant data storage is RAM.
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(Unlike the Espressif SDK you don't need to use an attribute like
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ICACHE_FLASH_ATTR for functions, they go into flash by default.)
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Important to note: IROM flash is accessed via 32-bit word aligned
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reads. esp-open-rtos does some magic to "fix" unaligned reads, but
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performance is reduced.
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*/
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#ifdef __cplusplus
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#define IROM __attribute__((section(".irom0.text")))
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#define IROM_LIT __attribute__((section(".irom0.literal")))
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#else
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#define IROM __attribute__((section(".irom0.text")))
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#define IROM_LIT __attribute__((section(".irom0.literal"))) const
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* COMMON_MACROS_H */
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65
cpu/esp8266/vendor/esp/xtensa_ops.h
vendored
65
cpu/esp8266/vendor/esp/xtensa_ops.h
vendored
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/** xtensa_ops.h
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*
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* Special macros/etc which deal with Xtensa-specific architecture/CPU
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* considerations.
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*
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* Part of esp-open-rtos
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* Copyright (C) 2015 Superhouse Automation Pty Ltd
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* BSD Licensed as described in the file LICENSE
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*/
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/*
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Copyright (c) 2015, SuperHouse Automation Pty Ltd
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef XTENSA_OPS_H
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#define XTENSA_OPS_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Read stack pointer to variable.
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*
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* Note that the compiler will push a stack frame (minimum 16 bytes)
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* in the prelude of a C function that calls any other functions.
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*/
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#define SP(var) __asm__ volatile ("mov %0, a1" : "=r" (var))
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/* Read the function return address to a variable.
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*
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* Depends on the containing function being simple enough that a0 is
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* being used as a working register.
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*/
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#define RETADDR(var) __asm__ volatile ("mov %0, a0" : "=r" (var))
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// GCC macros for reading, writing, and exchanging Xtensa processor special
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// registers:
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#define RSR(var, reg) __asm__ volatile ("rsr %0, " #reg : "=r" (var));
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#define WSR(var, reg) __asm__ volatile ("wsr %0, " #reg : : "r" (var));
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#define XSR(var, reg) __asm__ volatile ("xsr %0, " #reg : "+r" (var));
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// GCC macros for performing associated "*sync" opcodes
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#define ISYNC() __asm__ volatile ( "isync" )
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#define RSYNC() __asm__ volatile ( "rsync" )
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#define ESYNC() __asm__ volatile ( "esync" )
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#define DSYNC() __asm__ volatile ( "dsync" )
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#ifdef __cplusplus
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}
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#endif
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#endif /* XTENSA_OPS_H */
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@ -57,6 +57,7 @@ INCLUDES += -I$(RIOTBOARD)/common/$(CPU)/include
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INCLUDES += -I$(RIOTCPU)/esp_common
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INCLUDES += -I$(RIOTCPU)/esp_common/include
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INCLUDES += -I$(RIOTCPU)/esp_common/vendor/
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INCLUDES += -I$(RIOTCPU)/esp_common/vendor/esp
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# Flags
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6
cpu/esp_common/vendor/README.md
vendored
6
cpu/esp_common/vendor/README.md
vendored
@ -1,4 +1,8 @@
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The subdirectories here contain third-party software components used by the RIOT port for ESP32.
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The subdirectories here contain third-party software components used by the RIOT port for ESP32 and ESP8266.
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### esp
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The files that are part of [esp-open-rtos](https://github.com/SuperHouse/esp-open-rtos.git). The files in this directory are under the copyright of their respective owners. Please note the copyright notice in these files. All of these files are BSD Licensed as described in the file [LICENSE](https://github.com/SuperHouse/esp-open-rtos/blob/master/LICENSE).
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### xtensa
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The files in this directory are from the [FreeRTOS port for Xtensa](https://github.com/tensilica/freertos) configurable processors and Diamond processors. All of these files are copyright of Cadence Design Systems Inc. and licensed under the MIT license.
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