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Commit Graph

8237 Commits

Author SHA1 Message Date
Marian Buschsieweke
df5c319978
cpu/msp430fxyz: clean up clock initialization
Provide a common clock initialization driver rather than leaving
clock initialization to the boards code. A declarative description of
the board's clock configuration using a struct does still allow to
fine-tune settings. In addition, a board is still allowed to just
provide a custom `void clock_init(void)` if there really is the need
to do crazy things.
2023-05-16 10:05:09 +02:00
bors[bot]
2b97b76d83
Merge #18056 #19571 #19589
18056: pkg/cmsis: use unique package for CMSIS headers, DSP and NN modules r=benpicco a=aabadie



19571: cpu/stm32/periph_adc: fixes and improvements for L4 support r=benpicco a=gschorcht

### Contribution description

This PR provides the following fixes and improvements for the `periph_adc` implementation for STM32L4.
- Support STM32L496AG added.
- Instead of defining the number of ADC devices for each MCU model, the number of ADC devices is determined from ADCx definitions in CMSIS header.
- MCU specific register/value defines are valid for all L4 MCUs, model based conditional compilation is removed.
- The ADC clock disable function is fixed using a counter. The counter is incremented in `prep` and decremented in `done`. The ADC clock is disabled if the counter becomes 0.
- For boards that have not connected the V_REF+ pin to an external reference voltage, the VREFBUF peripheral can be used as V_REF+ (if supported) by setting `VREFBUF_ENABLE=1`.
- The ASCR register is available and has to be set for all STM32L471xx, STM32L475xx, STM32L476xx, STM32L485xx and STM32L486xx MCUs. Instead of using the CPU model for conditional compilation, the CPU line is used to support all MCU of that lines.
- Setting of SQR1 is fixed. Setting the SQR1 did only work before because the `ADC_SRQ_L` is set to 0 for a sequence length of 1.
- Setting the `ADC_CCR_CKMODE` did only work for the reset state. It is now cleared before it is set. Instead of using the `ADC_CCR_CKMODE_x` bits to set the mode, the mode defines are used.
 - Support for V_REFINT as ADC channel added.

### Testing procedure



19589: gnrc/gnrc_netif_hdr_print: printout timestamp if enabled r=aabadie a=chudov



Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: chudov <chudov@gmail.com>
2023-05-15 12:41:48 +00:00
Gunar Schorcht
caa50a57e6 cpu/stm32/periph_adc: support V_REFINT as ADC channel on L4 2023-05-15 14:24:53 +02:00
Gunar Schorcht
6247b2aea4 cpu/stm32/periph_adc: fix CKMODE setting for L4
Setting the `ADC_CCR_CKMODE` did only work for the reset state. It is now cleared before it is set. Instead of using the `ADC_CCR_CKMODE_x` bits to set the mode, the mode defines are used.
2023-05-15 14:24:53 +02:00
625f1f546e
cpu/efm32: fix dependency to cmsis-dsp module 2023-05-14 21:18:50 +02:00
2467ff0961
cpu/efm32: add CMSIS DSP include for arm_math.h 2023-05-14 21:08:30 +02:00
9b32854b13
cpu/cortexm_common: remove CMSIS vendor code 2023-05-14 21:08:28 +02:00
2e59f8e9b6
cpu/cortexm_common: use cmsis package instead of internal vendor headers 2023-05-14 21:08:27 +02:00
d2433454b5
cpu/stm32: cpu/sam0_common: rename internal i2c _start function 2023-05-14 21:08:26 +02:00
5f3a9de7fa
treewide: fix path to ztimer test applications 2023-05-13 19:08:38 +02:00
3989cd79ff
treewide: fix path to shell related tests in doc 2023-05-13 18:27:58 +02:00
bors[bot]
cf8c1391d9
Merge #19573 #19579 #19583 #19584
19573: cpu/stm32/periph_dac: small improvements r=maribu a=gschorcht

### Contribution description

This PR provides the following improvements for `periph_dac` on STM32

- Support for `RCC_APB1ENR1_DAC1EN` symbol added.
- For boards that have not connected the V_REF+ pin to an external reference voltage, the VREFBUF peripheral can be used as V_REF+ (if supported) by setting `VREFBUF_ENABLE=1`.
- If the DAC peripheral has a mode register (`DAC_MCR`), it is set to normal mode with buffer enabled and connected to external pin and on-chip peripherals. This allows to measure the current value of a DAC channel with an ADC channel or to use the DAC channel also for other on-chip peripherals.

### Testing procedure

- Green CI
- `tests/periph_dac` should still work for any board supporting the `periph_dac` feature.

### Issues/PRs references



19579: doc/doxygen/src/flashing.md: work around Doxygen bug r=maribu a=maribu

### Contribution description

Doxygen fails to render inline code in headers correctly in the version the CI uses. So, work around the issue by not typestetting `stm32flash` as inline code but as regular text.


19583: tests: move cpu related applications to tests/cpu r=maribu a=aabadie



19584: tests/build_system/external_board_dirs: fix broken symlinks r=maribu a=aabadie



Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
2023-05-12 09:17:22 +00:00
bors[bot]
d362a8d697
Merge #19565 #19568 #19574
19565: tests: move core related applications to their own tests/core/ folder r=maribu a=aabadie



19568: tests: move remaining driver related applications to tests/drivers r=maribu a=aabadie



19574: cpu/stm32/periph_gpio: reset PU/PD for ADC channels r=maribu a=gschorcht

### Contribution description

This PR provides a small fix that is relevant when a GPIO has been used as input/output with a pull resistor before it is initialized as an ADC channel.

The PU/PD configuration has to be `0b00` for analog outputs which is corresponds to the reset state. However, if the GPIO is not in the reset state but was used digital input/output with any pull resistor, the PU/PD configuration has also to be reset to use it as ADC channel.

### Testing procedure

- Green CI
- The `periph_adc` test application should still work for any board that supports the `periph_adc` feature.

### Issues/PRs references



Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2023-05-11 10:11:37 +00:00
Gunar Schorcht
85f7d8b244 cpu/esp32: fix compilation of esp_can 2023-05-11 07:22:52 +02:00
Gunar Schorcht
61bfa5372a cpu/esp32: fix compilation of esp_hw_counter 2023-05-11 06:56:36 +02:00
Gunar Schorcht
f2a18a7663 cpu/esp32: fix compilation of esp_eth 2023-05-11 06:56:36 +02:00
bors[bot]
f4fa6bb809
Merge #19484
19484: makefiles/arch/msp430.inc.mk: Fix compilation issues with GCC 12 r=maribu a=maribu

### Contribution description

This fixes the following compilation issues:

    /home/maribu/Repos/software/RIOT/cpu/msp430fxyz/periph/gpio.c: In function 'gpio_periph_mode':
    /home/maribu/Repos/software/RIOT/cpu/msp430fxyz/periph/gpio.c:95:15: error: array subscript 0 is outside array bounds of 'msp_port_isr_t[0]' [-Werror=array-bounds]
       95 |         sel = &(isrport->SEL);
          |               ^~~~~~~~~~~~~~~
    cc1: all warnings being treated as errors

by adding `CFLAGS += --param-min-pagesize=0` for GCC 12 (same issue as already fixed for AVR).

and:

    /usr/lib/gcc/msp430-elf/12.2.0/../../../../msp430-elf/bin/ld: warning: /home/maribu/Repos/software/RIOT/cpu/msp430_common/ldscripts/xfa.ld contains output sections; did you forget -T?

by adding the missing `-T`.

### Testing procedure

The following should still work:

- `make BOARD=msb-430 -C examples/hello-world`
- `make BOARD=msb-430 -C tests/xfa flash test`

### Issues/PRs references

None

Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-05-10 17:52:04 +00:00
Marian Buschsieweke
64f4f9a9be
cpu/esp32/periph/pwm.c: fix format specifier
Use %u to print `unsigned`.
2023-05-10 13:02:47 +02:00
Gunar Schorcht
af8a87ad99 cpu/stm32/periph_adc: fix SQR1 setting for L4
The setting of SQR1 is fixed. Setting the SQR1 did only work before because the ADC_SRQ_L is set to 0 for a sequence length of 1.
2023-05-10 12:39:32 +02:00
Gunar Schorcht
5483235c61 cpu/stm32/periph_adc: use L4 lines instead of L4 models
The ASCR register is available and has to be set for all STM32L471xx, STM32L475xx, STM32L476xx, STM32L485xx and STM32L486xx MCUs. Instead of using the CPU model for conditional compilation, the CPU line is used to support all MCU of that lines.
2023-05-10 12:39:32 +02:00
Gunar Schorcht
ccba70ff61 cpu/stm32/periph_adc: support for internal V_REF+
For boards that have not connected the V_REF+ pin to an external reference voltage, the VREFBUF peripheral can be used as V_REF+ if supported by setting `VREFBUF_ENABLE=1`.
2023-05-10 12:38:53 +02:00
Gunar Schorcht
d8bd2d9f43 cpu/stm32/periph_adc: fix ADC clock disable for L4
The ADC clock disable is fixed using a counter. The counter is incremented in `prep` and decremented in `done`. The ADC clock is disabled if the counter becomes 0.
2023-05-10 12:38:53 +02:00
Gunar Schorcht
c4d09083fa cpu/stm32/periph_adc: defines are valid for all L4 MCUs 2023-05-10 12:19:25 +02:00
Gunar Schorcht
e4ca7b8182 cpu/stm32/periph_adc: determine number of ADC from CMSIS header
Instead of defining the number of ADC devices for each MCU model, the number of ADC devices is determined from ADCx definitions in CMSIS header.
2023-05-10 12:19:19 +02:00
Gunar Schorcht
c1073024a6 cpu/stm32/periph_adc: support STM32L496AG 2023-05-10 12:19:10 +02:00
Gunar Schorcht
2a210c157b cpu/stm32/periph_dac: support of DAC mode register
If the DAC peripheral has a mode register (DAC_MCR), it is set to normal mode with buffer enabled and connected to external pin and on-chip peripherals. This allows to measure the current value of a DAC channel or to use the DAC channel also for other on-chip peripherals.
2023-05-10 12:12:53 +02:00
Gunar Schorcht
fb0a139eb9 cpu/stm32/periph_dac: support for internal V_REF+
For boards that have not connected the V_REF+ pin to an external reference voltage, the VREFBUF peripheral can be used as V_REF+ if supported by setting `VREFBUF_ENABLE=1`.
2023-05-10 12:12:47 +02:00
Gunar Schorcht
63b4da3e1f cpu/stm32/periph_dac: support for RCC_APB1ENR1_DAC1EN 2023-05-10 12:12:40 +02:00
Gunar Schorcht
ddb95e7648 cpu/stm32/periph_gpio: reset PU/PD for ADC channels
PU/PD configuration has to be `0b00` for analog outputs which is corresponds to the reset state. However, if the GPIO is not in reset state but was used digital input/output with any pull resistor, the PU/PD configuration has also to be reset to work as ADC channel.
2023-05-10 12:11:14 +02:00
Marian Buschsieweke
b123f1071a
cpu/msp430_common: Fix linking with binutils 2.40
An `INSERT AFTER` directive no longer can refer to a different linker
script included with `-T path/to/script.ld`. Instead, this adds wrapper
linker scripts that just `INCLUDE` the three individual linker scripts.
This way, the xfa.ld can safely refer back to sections defined in
the vendor linker script.

For some reason, this approach cause the exact issue it fixes for
binutils 2.40 with the binutils in the CI. We stick with the old
linker flags with binutils prior 2.40 to be compatible with both
conflicting behaviors.

The best approach would be to come up with something that works across
different versions of binutils; but no such solution materialized.
2023-05-08 15:40:26 +02:00
da95d2c56c
treewide: replace occurrences of tests/periph_ with new path 2023-05-06 15:33:03 +02:00
bors[bot]
718a4513b5
Merge #19368 #19529 #19531
19368: debug: add DEBUG_BREAKPOINT() macro, set breakpoint on failed assertion r=benpicco a=benpicco



19529: cpu/stm32/periph/dac: optimize setting DAC r=benpicco a=Enoch247

### Contribution description

The current implmentation right shifted the 16 bit value passed into `dac_set()` down to the 12 bits that the DAC is actually capable of. This patch drops the shift and instead writes the 16 bit value to the DAC's left aligned 12 bit wide data holding register.


### Testing procedure

do something like:
``` c
#include "perip/dac.h"

int main(void)
{
    dac_set(DAC_LINE(0), 0xffff/2);
    return 0;
}
```
- observe DAC's output is half of vref


### Issues/PRs references

- none known


19531: tests/unittests: allow passing `UNIT_TESTS` via env r=benpicco a=kaspar030



Co-authored-by: Benjamin Valentin <benpicco@beuth-hochschule.de>
Co-authored-by: Joshua DeWeese <jdeweese@primecontrols.com>
Co-authored-by: Kaspar Schleiser <kaspar@schleiser.de>
2023-05-02 18:08:42 +00:00
bors[bot]
33489daba7
Merge #19440
19440: cpu/rpx0xx: implement periph_spi r=dylad a=fengelhardt

 


Co-authored-by: Frank Engelhardt <fengelha@ovgu.de>
2023-05-02 11:03:21 +00:00
Marian Buschsieweke
c3500eb6e0
tree wide: fix typos in comments found by codespell
This will not change generated binaries, only the Doxygen output and
source code will have less typos.
2023-05-02 09:52:06 +02:00
Joshua DeWeese
11344241b8 cpu/stm32/periph/dac: optimize setting DAC
The current implmentation right shifted the 16 bit value passed into
`dac_set()` down to the 12 bits that the DAC is actually capable of.
This patch drops the shift and instead writes the 16 bit value to the
DAC's left aligned 12 bit wide data holding register.
2023-05-01 16:17:25 -04:00
Frank Engelhardt
6353181c74 cpu/rpx0xx: add spi functionality 2023-05-01 12:13:15 +02:00
Benjamin Valentin
fe4cc9169d cpu/native: define ARCHITECTURE_BREAKPOINT() 2023-04-27 13:19:17 +02:00
Benjamin Valentin
e850dcd921 cpu/cortexm_common: define ARCHITECTURE_BREAKPOINT() 2023-04-27 13:19:17 +02:00
bors[bot]
ffdc1df807
Merge #19516
19516: cpu/rpx0xx: add initial ADC support r=dylad a=dylad

### Contribution description

This PR adds initial support for RP2040 ADC peripheral.
It is rather minimalist, and only use oneshot trigger to perform a single acquisition.

I've tested this PR using a potentiometer connected between GND and 3V3.
GP26, GP27, GP28 has been tested.

### Testing procedure
Select `ADC_RES_12BIT` and flash `tests/periph_adc`
`make BOARD=rpi-pico -C tests/periph_adc`

### Issues/PRs references
None.


Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-27 10:35:10 +00:00
Dylan Laduranty
aaecb5419e cpu/rpx0xx: add minimal ADC support
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-27 12:15:19 +02:00
bors[bot]
429de92251
Merge #19346 #19512 #19513 #19514
19346: pkg/tinydtls: allow build for AVR r=benpicco a=benpicco



19512: SUBSYSTEMS.md: add jia200x to subsystems r=benpicco a=jia200x



19513: boards/nrf52840dongle/doc: Update nrfutil pointers r=benpicco a=chrysn

### Contribution description

Nordic changed its nrfutil; this change adjust to it.

I'm not fully happy with recommending that tool at all due to its bad quality (see rambling in https://github.com/RIOT-OS/RIOT/issues/19511), but short of soldering on a debug header or touch-probing it with wires it's the only way in to the device. I may later add follow-up recommendations to switch to riotboot, but this now at least fixes the immediate issue.

### Testing procedure

* Look at the updated documentation.

### Issues/PRs references

Closes: https://github.com/RIOT-OS/RIOT/issues/19511

19514: dist/testbed-support: remove obsolete boards from iotlab archi r=benpicco a=aabadie



Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Co-authored-by: Benjamin Valentin <benjamin.valentin@bht-berlin.de>
Co-authored-by: Jose Alamos <jose@alamos.cc>
Co-authored-by: chrysn <chrysn@fsfe.org>
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
2023-04-26 15:40:08 +00:00
bors[bot]
dadfa88911
Merge #19507
19507: cpu/cc26x0_cc13x0: Drop feature cortexm_mpu r=maribu a=maribu

### Contribution description

At least the CC2650 doesn't have an MPU, I assume this is also true for the rest of the family.

The CC2652 does have an MPU according to the datasheet. So I keep the feature there in place.

### Testing procedure

E.g.

```
make BOARD=cc2650-launchpad -C tests/mpu_noexec_ram flash test
```

fails. (Note: A successful test run would also crash but with a mem manage handler rather than a hardfault due to an invalid instruction on the stack being executed.)

It would be nice to also test the same for a `cc2652-launchpad`, for which the MPU should work.

### Issues/PRs references

None

Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-04-26 09:20:01 +00:00
Marian Buschsieweke
5c8e3c7c93
cpu/cc26x0_cc13x0: Drop feature cortexm_mpu
At least the CC2650 doesn't have an MPU, I assume this is also true
for the rest of the family.

The CC2652 does have an MPU according to the datasheet. So I keep the
feature there in place.
2023-04-26 10:51:52 +02:00
Benjamin Valentin
5274e30178 cpu/avr8_common: implement perror() 2023-04-26 10:31:09 +02:00
bors[bot]
23f7087845
Merge #19315
19315: cpu/native: add host fs access via VFS r=benpicco a=benpicco



Co-authored-by: Benjamin Valentin <benpicco@beuth-hochschule.de>
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2023-04-25 23:14:45 +00:00
Benjamin Valentin
6fe5d85e11 cpu/native: unmount fs on exit 2023-04-26 00:53:14 +02:00
Benjamin Valentin
c438c80548 cpu/native: add host fs access via VFS 2023-04-26 00:53:14 +02:00
Dylan Laduranty
9c5e508d2f cpu/rpx0xx: initialize USB PLL and ADC clock
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-25 21:12:42 +02:00
Dylan Laduranty
80e3f57205 cpu/rpx0xx: fix doc error in periph_cpu.h
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-25 21:02:54 +02:00
Marian Buschsieweke
d6499fa8fd
cpu/cc26xx_cc13xx: Fix bogus array-bound warning
GCC 12 create a bogus array out of bounds warning as it assumes that
because there is special handling for `uart == 0` and `uart == 1`,
`uart` can indeed be `1`. There is an `assert(uart < UART_NUMOF)` above
that would blow up prior to any out of bounds access.

In any case, optimizing out the special handling of `uart == 1` for
when `UART_NUMOF == 1` likely improves the generated code and fixes
the warning.

    /home/maribu/Repos/software/RIOT/cc2650/cpu/cc26xx_cc13xx/periph/uart.c:88:8: error: array subscript 1 is above array bounds of 'uart_isr_ctx_t[1]' [-Werror=array-bounds]
       88 |     ctx[uart].rx_cb = rx_cb;
          |     ~~~^~~~~~
    /home/maribu/Repos/software/RIOT/cc2650/cpu/cc26xx_cc13xx/periph/uart.c:52:23: note: while referencing 'ctx'
       52 | static uart_isr_ctx_t ctx[UART_NUMOF];
          |                       ^~~
    /home/maribu/Repos/software/RIOT/cc2650/cpu/cc26xx_cc13xx/periph/uart.c:89:8: error: array subscript 1 is above array bounds of 'uart_isr_ctx_t[1]' [-Werror=array-bounds]
       89 |     ctx[uart].arg = arg;
          |     ~~~^~~~~~
    /home/maribu/Repos/software/RIOT/cc2650/cpu/cc26xx_cc13xx/periph/uart.c:52:23: note: while referencing 'ctx'
       52 | static uart_isr_ctx_t ctx[UART_NUMOF];
          |                       ^~~
2023-04-25 15:31:27 +02:00