The ATxmega can have up to 8 UARTs. This increase from 2 up to 7 to
keep avr8_state flags with 8 bits wide.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Some periph_rtt implementations do not provide `rtt_set_counter()`. This
adds `periph_rtt_set_counter` as feature to allow testing for its
availability. The feature is provided at CPU level if periph_rtt is
provided by the board for all CPUs implementing `rtt_set_counter()`.
Some periph_rtt implementations do not provide `rtt_set_counter()`. This
adds `periph_rtt_set_counter` as feature to allow testing for its
availability. The feature is provided at CPU level if periph_rtt is
provided by the board for all CPUs implementing `rtt_set_counter()`.
Found and fixed the issue for the kinetis-based boards: The kinetis
code is using some macros to map some IRQ names, that differ in
some versions of vendor headers, to a RIOT wide unique name. The
doxygen of this mapping states, that this mapping must be done before
any vendor header is included. Unfortunately, the mapping was so far
placed in cpu/kinetis/vectors.c, before any other include statement.
In some cases, the vendor headers might be included before the
mapping macros in vectors.c, leading to the compilation errors down
the line. To fix this, the adaption defines are moved into
cpu/kinetis/cpu_conf.h, which is the file that actually includes
the vendor headers. This way it is ensured, that these adaption
macros are always defined before any vendor header is included,
and therefore preventing this kind of error for good.
- Adds capabilities for each PHY mode. Converts the uint16_t caps field to an
uint32_t in order to hold all capability bits, size of the structure remains
unchanged due to alignment.
- Modifies the test application to configure the PHY mode using the shell
command. Also adds the PHY modes to the capabilities shell command.
- Updates the nrf802154 and cc2538 radio drivers to specify the PHY mode
supported.
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
If there is an event to be handled by _esp_eth_isr(), don't
overwrite it if a new packet has been received.
In my testing, all SYSTEM_EVENT_ETH_CONNECTED events except the first
are immediately followed by at least one SYSTEM_EVENT_ETH_RX_DONE event.
This causes the SYSTEM_EVENT_ETH_CONNECTED to not get handled, and the
IP stack will not be notified of the new link state.
Protect the other events by dropping the packet instead. If an earlier
unhandled SYSTEM_EVENT_ETH_RX_DONE event exists, overwrite it with the
newer packet.
I only saw this happen with lwIP and not with GNRC - I am not sure why.
But it still is a race waiting to happen. The nice long term solution
is probably to have a queue of unhandled events, allowing them all to
be processed once there is time.
The ADC SYNCBUSY.SWTRIG gets stuck to '1' after wake-up from Standby Sleep mode.
Ignore the ADC `SYNCBUSY.SWTRIG` status bit, this functionality is not used by
the driver anyway.
The global core/ldscripts/xfa.ld doesn't match our cortexm_base.ld.
This commit directly adds the two XFA lines to cortexm_base.ld.
In addition to that, a dummy (empty) xfa.ld is added, which the linker will pick
instead of core/ldscripts/xfa.ld, effectingly not using it.
nRF52833 has POWER_MAINREGSTATUS_MAINREGSTATUS_High, but no POWER->DCDCEN0
register.
This breaks all builds on this MCU.
Fix the ifdef to fix the build.
This allows using the macro inside the periph_conf.h board files since the
periph/gpio.h header can't be included on the peripheral configuration.
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
Deep-sleep was based on using rx pin as external interrupt to be able to
wake up from stop mode. If rx pin cannot be used as interrupt or user
does not need to wake up from stop from the CAN, an option is now
present. If en_deep_sleep_wake_up is set to false, setting the device to
sleep simply unblock stop mode. Otherwise the behavior is unchanged.
In case a non-gpio EXTI (>= 16) is pending, the isr_exti() used to clear
the flag and try to call a callback, which was out-of-bouds, thus
generating a hard fault.
This fixes it by masking the pending_isr variables with 0xFFFF.
The ram size is exposed as macro value and available for use in code.
For the stm32 it has a value in kilobytes suffixed with 'k'. This is
less than optimal for usage in arithmetic. This commit modifies the
value to bytes so that it can be used in preprocessor magic
This patch implements the basic support the last of the FLEXCOMM modes,
Serial Peripheral Interface, in a simple blocking mode with busy wait,
which is enough to test all the SPI functionality end-to-end.
Tested reading and writing registers on a SPI peripheral, and checked
with the oscilloscope that the frequencies were as expected.
Results from `tests/periph_spi`:
```
> init 0 0 2 -1 0
SPI_DEV(0) initialized: mode: 0, clk: 2, cs_port: -1, cs_pin: 0
> bench
1 - write 1000 times 1 byte: 16002 16009
2 - write 1000 times 2 byte: 18001 18008
3 - write 1000 times 100 byte: 802000 802007
4 - write 1000 times 1 byte to register: 24003 24010
5 - write 1000 times 2 byte to register: 26001 26008
6 - write 1000 times 100 byte to register: 810001 810008
7 - read 1000 times 2 byte: 23003 23009
8 - read 1000 times 100 byte: 807002 807009
9 - read 1000 times 2 byte from register: 32002 32009
10 - read 1000 times 100 byte from register: 816002 816009
11 - transfer 1000 times 2 byte: 23003 23009
12 - transfer 1000 times 100 byte: 807003 807010
13 - transfer 1000 times 2 byte to register: 32003 32009
14 - transfer 1000 times 100 byte to register:816002 816009
15 - acquire/release 1000 times: 7222 7228
-- - SUM: 5059250 5059351
```
The macro was moved from Kconfig to the periph_cpu.h which means that
the macro name needed to be updated to BOARD_HAS_ADC_PA06_CAP instead
of CONFIG_BOARD_HAS_ADC_PA06_CAP.
The ADC in the QN908x cpu offers multiple options for ADC conversion
using up to 8 external pins, one external reference pin and some
internal signals like a 1.2V reference, Vss, Vcc and an internal
temperature monitor.
This patch implements support for sampling ADC values from the ADC lines
defined in the board configuration. Some configurations are really
always present and don't require a board configuration, like the Vcc or
internal temperature monitor but to coexist with other board ADC line
options they are only set as part of the board configuration.
The mv instruction (which is usually implemented as `add rd, x0, r1`) is
changed to `add rd, x0, %input`. This can either be used as a load
immediate or as an move.
The code size grows by two bytes. This because GCC does not compress the
li instruction to the compressed version (even though this is possible).
Add ENABLE_DEBUG_VERBOSE flag, so that the noise during debugging can be
reduced. This is super helpful when testing under load, as otherwise there is
just too much noise in the output.
An earlier version of periph_eth used to always pack the first chunk of the
outgoing frame to the first DMA descriptor by telling the DMA to jump back
to the first descriptor within the last descriptor. This worked fine unless
the frame was send in one chunk (as e.g. lwip does), which resulted due to a
hardware bug in a frame being send out twice. For that reason, the behavior was
changed to cycle throw the linked DMA descriptor list in round-robin fashion.
However, the error checking was not updated accordingly. Hence, the error
check might run over (parts of) unrelated frames and fail to detect errors
correctly.
This commit fixes the issue and also provides proper return codes for errors.
Additionally, an DMA reset is performed on detected errors during RX/TX. I'm
not sure if/when this is needed, as error conditions are neigh impossible to
produce. But better be safe than sorry.
CPU_HAS_SRAM_BITBAND can be used to check whether bit-banding is supported for
all of SRAM. With partially supported bit-banding, this feature is more of a
foot gun that a valuable tool.
This commit fixes the CCA threshold range for set_cca_threshold.
Without this commit the threshold overflows when using values below
the receiver sensitivity.
This commit turns off the transceiver immediately after sending an ACK
frame in order to avoid unwanted emissions (see ERRATA ID 204).
When the radio stays in TX_ON without an explicit transition, the radio
keeps sending a spurious signal for some milliseconds.
This commit sets the correct value to the MCU_CTRL bit for the
cc2538_rf. This variable is used to detect when the radio is doing
transmission with CCA. Since this was not set to 1 when sending without
CCA, the `confirm_transmit` function returned -EAGAIN after the TX_DONE
event (which violates the HAL API).
This error was discovered using some Radio HAL riotctrl scripts by @LarsKowoll.
`gnrc_netif_hdr_build()` calls internally `gnrc_netif_hdr_init()`, which does
initialize `gnrc_netif_hdr_t::rssi` and `gnrc_netif_hdr_t::lqi`. So no need to
do this twice.
Errate 2.17.4 says:
> Upon enabling the RTC tamper detection feature, a false tamper
> detection *can* be reported by the RTC.
It turns out that this spurious event is not always generated.
If RTC alarm is used and the CPU was previously woken from hibernate
by RTC, it *can* happen that the false tamper event is *not* generated.
In this case, we will block indefinitely on the mutex.
To solve this, add a timeout to the event.
Also poll the event instead of using a mutex, as we have already set
`PM->SLEEPCFG.bit.SLEEPMODE` at this point.
