19789: cpu/nrf5x/periph/wdt: enable support for nRF53/nRF9160 r=benpicco a=dylad
### Contribution description
This PR enables support for the watchdog driver on nRF53.
This MCU has two watchdog peripherals, for now, it only uses the first one.
The use of the second watchdog can be add in a followup PR later.
### Testing procedure
Flash and play with `tests/periph/wdt` application.
### Issues/PRs references
None.
19796: boards/b_u585i_ iot02a/periph usbdev r=benpicco a=gschorcht
### Contribution description
This PR adds the USB OTG support for STM32U5 and the `b_u585i_iot02a` board.
This PR includes PR #19795 since it uses directly the changes made in PR #19795.
### Testing procedure
Compile and flash
```
BOARD=b-u585i-iot02a make -C tests/sys/usbus_cdc_ecm/ flash term
```
Use the `sudo dmesg` command to get the kernel messages.
```pyhon
[766948.556645] usb 1-2.2: new full-speed USB device number 108 using xhci_hcd
[766948.658688] usb 1-2.2: New USB device found, idVendor=1209, idProduct=7d00, bcdDevice= 1.00
[766948.658696] usb 1-2.2: New USB device strings: Mfr=3, Product=2, SerialNumber=4
[766948.658699] usb 1-2.2: Product: b-u585i-iot02a
[766948.658702] usb 1-2.2: Manufacturer: RIOT-os.org
[766948.658704] usb 1-2.2: SerialNumber: AA140057DA41D467
[766948.668681] cdc_ether 1-2.2:1.0 usb0: register 'cdc_ether' at usb-0000:00:14.0-2.2, CDC Ethernet Device, ea:dc:44:71:d9:24
[766948.743250] cdc_ether 1-2.2:1.0 enxeadc4471d924: renamed from usb0
```
Use the `ifconfig` command on the node to determine the IPv6 LLUA and ping the node.
```
ping6 -c 3 fe80::e8dc:44ff:fe71:c524%enxeadc4471d924
PING fe80::e8dc:44ff:fe71:c524%enxeadc4471d924(fe80::e8dc:44ff:fe71:c524%enxeadc4471d924) 56 data bytes
64 bytes from fe80::e8dc:44ff:fe71:c524%enxeadc4471d924: icmp_seq=1 ttl=64 time=0.523 ms
64 bytes from fe80::e8dc:44ff:fe71:c524%enxeadc4471d924: icmp_seq=2 ttl=64 time=0.546 ms
64 bytes from fe80::e8dc:44ff:fe71:c524%enxeadc4471d924: icmp_seq=3 ttl=64 time=0.599 ms
```
### Issues/PRs references
Includes PR #19795
19802: cpu/nrf53: enable flashpage support r=benpicco a=dylad
### Contribution description
This PR enables flashpage support on nRF53 family.
The peripheral is identical to nRF52, just add the flashpage configuration and enable the module in both Makefiles.features and Kconfig.
### Testing procedure
run `/tests/periph/flashpage` on `nrf5340dk-app`
output of `make BOARD=nrf5340dk-app flash test`
```
/home/dylan/work/RIOT/dist/tools/pyterm/pyterm -p "/dev/ttyACM0" -b "115200" --no-reconnect --noprefix --no-repeat-command-on-empty-line
Twisted not available, please install it if you want to use pyterm's JSON capabilities
Connect to serial port /dev/ttyACM0
Welcome to pyterm!
Type '/exit' to exit.
>
>
test_last_raw
> test_last_raw
wrote raw short buffer to last flash page
> help
help
Command Description
---------------------------------------
info Show information about pages
dump Dump the selected page to STDOUT
dump_local Dump the local page buffer to STDOUT
read Copy the given page to the local page buffer and dump to STDOUT
write Write the local page buffer to the given page
write_raw Write (ASCII, max 64B) data to the given address
erase Erase the given page buffer
edit Write bytes to the local page buffer
test Write and verify test pattern
test_last_pagewise Write and verify test pattern on last page available
test_last_pagewise
test_reserved_pagewise Write and verify short write on reserved page
test_last_raw Write and verify raw short write on last page available
> test_last_pagewise
wrote local page buffer to last flash page
> help
help
Command Description
---------------------------------------
info Show information about pages
dump Dump the selected page to STDOUT
dump_local Dump the local page buffer to STDOUT
read Copy the given page to the local page buffer and dump to STDOUT
write Write the local page buffer to the given page
write_raw Write (ASCII, max 64B) data to the given address
erase Erase the given page buffer
edit Write bytes to the local page buffer
test Write and verify test pattern
test_last_pagewise Write and verify test pattern on last page available
test_reserved_pagewise Write and verify short write on reserved page
test_reserved_pagewise
test_last_raw Write and verify raw short write on last page available
> test_reserved_pagewise
Reserved page num: 5
Since the last firmware update this test has been run 0 times
wrote local page buffer to reserved flash page
When running on a bootloader, as an extra check, try restarting the board and check whether this application still comes up.
> help
help
Command Description
---------------------------------------
info Show information about pages
dump Dump the selected page to STDOUT
dump_local Dump the local page buffer to STDOUT
read Copy the given page to the local page buffer and dump to STDOUT
write Write the local page buffer to the given page
write_raw Write (ASCII, max 64B) data to the given address
erase Erase the given page buffer
edit Write bytes to the local page buffer
test Write and verify test pattern
test_last_pagewise Write and verify test pattern on last page available
test_reserved_pagewise Write and verify short write on reserved page
test_last_raw Write and verify raw short write on last page available
>
make : on quitte le répertoire « /home/dylan/work/RIOT/tests/periph/flashpage »
```
### Issues/PRs references
None.
19803: cpu/nrf5x_common: rework LFCLK source selection r=benpicco a=dylad
### Contribution description
This PR changes the source selection of LFCLK for all nRF families.
This idea is to use the values provided by Nordic vendor files to properly populate the source of the LFCLK. Then setup a per CPU check to ensure the value provided at board level is fine. In the end, the LFCLK source selection is a mere assignment.
The selection of the LFCLK source is still done at board level. I also add a bit of documentation to help users to select another value if needed.
I'll provide in a followup PR, `periph_rtt` support for both nRF9160 and nRF53.
### Testing procedure
CI should be enough I think. Otherwise, one can ran tests/periph/rtt on any nRF51-based board and any nRF52-based board.
You can also change the LFCLK source at board level to ensure the guards are doing their jobs.
### Issues/PRs references
None.
Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
19733: cpu/msp430: reorganize code r=maribu a=maribu
### Contribution description
RIOT supports two distinct families of the MSP430: The [MSP430 x1xx] MCU family and the [MSP430 F2xx/G2xx] MCU family. For both incompatible MCU families the code was located in the msp430fxyz folder, resulting in case of the UART driver in particularly bizarre code looking roughly like this:
```C
#ifndef UART_USE_USCI
/* implementation of x1xx peripheral ... */
#else
/* implementation of F2xx/G2xx peripheral ... */
#endif
/* zero shared code between both variants */
```
This moves peripheral drivers shared between the two families to msp430_common and splits the SPI and UART driver into two MCU families.
In addition, it cleans up the `msp430_regs.h` by dropping most of it and using the macros and symbols provided by the vendor header files. There is little reason for us to maintain constants when TI is already doing that.
[MSP430 x1xx]: https://www.ti.com/lit/ug/slau049f/slau049f.pdf
[MSP430 F2xx/G2xx]: https://www.ti.com/lit/ug/slau144k/slau144k.pdf
19747: gnrc/ipv6/nib: reset rs_sent counter also for not-6LN interfaces r=maribu a=fabian18
19769: cpu/nrf53: add initial support with nRF5340DK-APP board r=maribu a=dylad
### Contribution description
This PR adds support for nRF5340 MCU and its associated Nordic development board, nRF5340DK.
This MCU provides a dual Cortex-M33, one application core running at up to 128MHz, and one network core running at up to 64MHz.
Peripherals are inherited from others Nordic MCUs families so it shouldn't be hard to add more of them in followup PRs.
For now, only the minimal set of peripherals is supported:
- GPIO / GPIO_IRQ
- UART
- TIMER
### Testing procedure
Build the usual test application for the supported peripherals and flash the board.
nRF5340DK provides two serial ports on its embedded debugger. RIOT's shell should be available on the first one (/dev/ttyACM0)
### Issues/PRs references
#18576#19267
19782: cpu/msp430: fix for ti's msp430-gcc-opensource package ld version r=maribu a=hugueslarrive
### Contribution description
My msp430 toolchain (https://www.ti.com/tool/MSP430-GCC-OPENSOURCE) was broken by #19484:
```
hugues@p700:~/github/cpu_msp430_common/RIOT$ BOARD=msb-430 make -j64 -C examples/hello-world
make : on entre dans le répertoire « /home/hugues/github/cpu_msp430_common/RIOT/examples/hello-world »
Building application "hello-world" for "msb-430" with MCU "msp430fxyz".
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/boards/common/init
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/boards/msb-430
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/core
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/core/lib
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/cpu/msp430fxyz
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/drivers
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/boards/common/msb-430
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/drivers/periph_common
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys/auto_init
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys/div
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys/libc
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys/malloc_thread_safe
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/cpu/msp430_common
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys/newlib_syscalls_default
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/cpu/msp430fxyz/periph
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys/preprocessor
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys/stdio_uart
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/cpu/msp430_common/periph
/opt/ti/msp430-gcc/bin/../lib/gcc/msp430-elf/9.3.1/../../../../msp430-elf/bin/ld: .rodata not found for insert
collect2: error: ld returned 1 exit status
make: *** [/home/hugues/github/cpu_msp430_common/RIOT/examples/hello-world/../../Makefile.include:761 : /home/hugues/github/cpu_msp430_common/RIOT/examples/hello-world/bin/msb-430/hello-world.elf] Erreur 1
make : on quitte le répertoire « /home/hugues/github/cpu_msp430_common/RIOT/examples/hello-world »
hugues@p700:~/github/cpu_msp430_common/RIOT$ /opt/ti/msp430-gcc/msp430-elf/bin/ld --version
GNU ld (Mitto Systems Limited - msp430-gcc 9.3.1.11) 2.34
Copyright (C) 2020 Free Software Foundation, Inc.
This program is free software; you may redistribute it under the terms of
the GNU General Public License version 3 or (at your option) a later version.
This program has absolutely no warranty.
hugues@p700:~/github/cpu_msp430_common/RIOT$ /opt/ti/msp430-gcc/msp430-elf/bin/ld --version | grep -Eo '[0-9]\.[0-9]+'
9.3
1.11
2.34
hugues@p700:~/github/cpu_msp430_common/RIOT$ /opt/ti/msp430-gcc/msp430-elf/bin/ld --version | grep -Eo '[0-9]\.[0-9]+$'
2.34
```
### Testing procedure
```
hugues@p700:~/github/cpu_msp430_common/RIOT$ BOARD=msb-430 make -j64 -C examples/hello-world
make : on entre dans le répertoire « /home/hugues/github/cpu_msp430_common/RIOT/examples/hello-world »
Building application "hello-world" for "msb-430" with MCU "msp430fxyz".
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/boards/common/init
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/boards/msb-430
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/core
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/core/lib
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/cpu/msp430fxyz
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/drivers
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/boards/common/msb-430
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/drivers/periph_common
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys/auto_init
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys/div
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys/libc
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys/malloc_thread_safe
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys/newlib_syscalls_default
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys/preprocessor
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/cpu/msp430_common
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/sys/stdio_uart
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/cpu/msp430fxyz/periph
"make" -C /home/hugues/github/cpu_msp430_common/RIOT/cpu/msp430_common/periph
text data bss dec hex filename
8612 722 866 10200 27d8 /home/hugues/github/cpu_msp430_common/RIOT/examples/hello-world/bin/msb-430/hello-world.elf
make : on quitte le répertoire « /home/hugues/github/cpu_msp430_common/RIOT/examples/hello-world »
```
### Issues/PRs references
Introduced by #19484, highlighted in #16727.
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@posteo.net>
Co-authored-by: Fabian Hüßler <fabian.huessler@ml-pa.com>
Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
Co-authored-by: Hugues Larrive <hlarrive@pm.me>
The MSP430 vendor files already provide macros containing register
constants and symbols (provided via linker scripts) containing addresses
of peripheral registers. So lets make use of that rather than
maintaining a long list of constants.
19770: cpu/nrf5x_common: reset all available CC channels r=maribu a=dylad
### Contribution description
Properly reset all CC channels of a given timer at initialization (except the last one which seems to be used for capture only in the driver).
The issue with the previous code was that some CCs were not clear on some nRF52 MCUs.
For instance, nRF52840 has 4 CCs for its two first timers, then 6 CCs for all others.
nRF9160 and nRF5340 also have 6 CCs for all its timer peripherals.
Thus, loop through the reported number of channels and clear the associated register instead of hardcoding the first 3 CC channels.
### Testing procedure
CI should be enough I think.
### Issues/PRs references
None.
19773: cpu/nrf{52,9160}: remove duplicate sevonpend bit r=maribu a=dylad
### Contribution description
This PR removes duplicate calls of `SCB_SCR_SEVONPEND` bit in nRF52 and nRF9160.
This call is already done [here](7c320055a1/cpu/cortexm_common/cortexm_init.c (L60))
### Testing procedure
Flash a nRF52 or nRF9160-based board and check that the board is still alive.
### Issues/PRs references
None. I notice this duplicate call when porting nRF53.
19774: boards/frdm-k22f: fixes long lines in periph_conf.h r=maribu a=hugueslarrive
19775: boards/frdm-k64f: fixes long lines and comma separated by whitespaces… r=maribu a=hugueslarrive
… warnings
Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
Co-authored-by: dylad <dylan.laduranty@mesotic.com>
Co-authored-by: Hugues Larrive <hlarrive@pm.me>
19771: boards/nrf9160dk: use all available CC timer channels r=dylad a=dylad
### Contribution description
`nRF9160` has 6 CC per timer.
You can `grep -ra "CC_NUM" cpu/nrf9160 ` to check it.
So let's use all available CC.
### Testing procedure
You can run `tests/periph/timer` to see the new CC.
### Issues/PRs references
None.
Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
The correct macro name is `ARDUINO_I2C_UNO` for Arduino UNO compatible
I2C bus location, or `ARDUINO_I2C_NANO` for Arduino Nano compatible
I2C bus location.
Rather than providing this for every board (or group of boards)
individually, it is better to provide this once relying on the Arduino
I/O mapping features.
- Rename all `arduino_pinmap.h` to `arduino_iomap.h`
- An empty `arduino_pinmap.h` that just includes `arduino_iomap.h`
is provided for backward compatibility
- Move all info from `arduino_board.h` into the new file as trivial
macros, so that they can also be used outside of sketches
- The new name reflects the fact not just pin mappings, but also
other I/O features such as PWMs are mapped
- Drop all `arduino_board.h`
- `arduino_board.h` and `arduino_iomap.h` now provide the exact
same information, just in a different format
- a generic `arduino_board.h` is provided instead that just
uses the info in `arduinio_iomap.h` and provides them in the
format the code in `sys/arduino` expects it
- Add fine grained features to indicate for mappings
- availability of mappings for analog pins, DAC pins, PWM pins,
UART devices, SPI/I2C buses to the corresponding RIOT
identification can now be expressed:
- `arduino_pins`: `ARDUINO_PIN_0` etc. are available
- `arduino_analog`: `ARDUINO_A0` etc. are available
- `arduino_pwm`: `ARDUINO_PIN_13_PWM_DEV` etc. are available
- `arduino_dac`: `ARDUINO_DAC0` etc. are available
- `arduino_uart`: `ARDUINO_UART_D0D1` or similar are available
- `arduino_spi`: `ARDUINO_SPI_ISP` or similar are available
- `arduino_i2c`: `ARDUINO_I2C_UNO` or similar are available
- mechanical/electrical compatibility with specific form factors
can now be expressed as features:
- `aruino_shield_nano`: Arduino NANO compatible headers
- `aruino_shield_uno`: Arduino UNO compatible headers
- `aruino_shield_mega`: Arduino MEGA compatible headers
- `aruino_shield_isp`: ISP header is available
This provides the groundwork to implement shield support as modules
that can rely on the I/O mappings, rather than having to provide a
configuration per board.
RIOT supports two distinct families of the MSP430: The [MSP430 x1xx]
MCU family and the [MSP430 F2xx/G2xx] MCU family. For both incompatible
MCU families the code was located in the msp430fxyz folder, resulting
in case of the UART driver in particularly bizarre code looking roughly
like this:
#ifndef UART_USE_USCI
/* implementation of x1xx peripheral ... */
#else
/* implementation of F2xx/G2xx peripheral ... */
#endif
/* zero shared code between both variants */
This splits the peripheral drivers for USCI and USART serial IP blocks
into separate files and relocates everything in cpu/msp430, similar to
how cpu/stm32 is organized.
[MSP430 x1xx]: https://www.ti.com/lit/ug/slau049f/slau049f.pdf
[MSP430 F2xx/G2xx]: https://www.ti.com/lit/ug/slau144k/slau144k.pdf
19730: boards/qn9080dk: fix periph conflict r=maribu a=maribu
### Contribution description
- Document which I2C/SPI/UART peripheral maps to which FLEXCONN IP block to easily detect potential overlap
- Switch conflict between SPI and I2C peripheral by using a different FLEXCONN for I2C
19731: boards/qn9080dk: update doc on flashing r=maribu a=maribu
### Contribution description
- update the doc on the internal programmer firmware:
- not only switching to J-Link, but also just updating it does improve reliability of flashing
- give hints in how to get the ~~shitty~~ wonderful update process working
- update notes on OpenOCD requirements
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@posteo.net>
- update the doc on the internal programmer firmware:
- not only switching to J-Link, but also just updating it does
improve reliability of flashing
- give hints in how to get the ~~shitty~~ wonderful update process
working
- update notes on OpenOCD requirements
- Document which I2C/SPI/UART peripheral maps to which FLEXCONN IP
block to easily detect potential overlap
- Switch conflict between SPI and I2C peripheral by using a different
FLEXCONN for I2C
19717: boards/rpi-pico: update openocd.cfg file r=aabadie a=dylad
### Contribution description
This PR fixes the use of openOCD to flash a rpi-pico board.
Currently on master, trying to flash this board with openOCD (v12) and a CMSIS-DAP probe fails.
with this PR, it now works as expected (even debugging)
Moreover, the configuration file used by RIOT is now deprecated on openOCD v12 so changes it while we're at it.
master:
```
### Flashing Target ###
Open On-Chip Debugger 0.12.0
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
swd
Warn : rp2040-core0.cfg configuration file is deprecated and will be
removed in the next release. Use following parameters instead:
-c 'set USE_CORE 0' -f target/rp2040.cfg
Warn : Transport "swd" was already selected
adapter speed: 4000 kHz
Info : Using CMSIS-DAPv2 interface with VID:PID=0x2e8a:0x000c, serial=E46170D59B552B2C
Info : CMSIS-DAP: SWD supported
Info : CMSIS-DAP: Atomic commands supported
Info : CMSIS-DAP: Test domain timer supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 0 SWDIO/TMS = 0 TDI = 0 TDO = 0 nTRST = 0 nRESET = 0
Info : CMSIS-DAP: Interface ready
Info : clock speed 4000 kHz
Info : SWD DPIDR 0x0bc12477
Error: [rp2040.cpu] Could not find MEM-AP to control the core
Warn : target rp2040.cpu examination failed
Info : starting gdb server for rp2040.cpu on 0
Info : Listening on port 37347 for gdb connections
TargetName Type Endian TapName State
-- ------------------ ---------- ------ ------------------ ------------
0* rp2040.cpu cortex_m little rp2040.cpu unknown
Error: [rp2040.cpu] Could not find MEM-AP to control the core
Error: [rp2040.cpu] Debug AP not available, reset NOT asserted!
make: *** [/home/dylan/work/RIOT/examples/blinky/../../Makefile.include:855: flash] Error 1
make: Leaving directory '/home/dylan/work/RIOT/examples/blinky'
```
with this PR:
```
### Flashing Target ###
Open On-Chip Debugger 0.12.0
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
swd
Warn : Transport "swd" was already selected
adapter speed: 4000 kHz
Info : Using CMSIS-DAPv2 interface with VID:PID=0x2e8a:0x000c, serial=E46170D59B552B2C
Info : CMSIS-DAP: SWD supported
Info : CMSIS-DAP: Atomic commands supported
Info : CMSIS-DAP: Test domain timer supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 0 SWDIO/TMS = 0 TDI = 0 TDO = 0 nTRST = 0 nRESET = 0
Info : CMSIS-DAP: Interface ready
Info : clock speed 4000 kHz
Info : SWD DPIDR 0x0bc12477, DLPIDR 0x00000001
Info : SWD DPIDR 0x0bc12477, DLPIDR 0x10000001
Info : [rp2040.core0] Cortex-M0+ r0p1 processor detected
Info : [rp2040.core0] target has 4 breakpoints, 2 watchpoints
Info : [rp2040.core1] Cortex-M0+ r0p1 processor detected
Info : [rp2040.core1] target has 4 breakpoints, 2 watchpoints
Info : starting gdb server for rp2040.core0 on 0
Info : Listening on port 40985 for gdb connections
Info : starting gdb server for rp2040.core1 on 0
Info : Listening on port 39901 for gdb connections
TargetName Type Endian TapName State
-- ------------------ ---------- ------ ------------------ ------------
0* rp2040.core0 cortex_m little rp2040.cpu running
1 rp2040.core1 cortex_m little rp2040.cpu running
[rp2040.core0] halted due to debug-request, current mode: Thread
xPSR: 0xf1000000 pc: 0x000000ee msp: 0x20041f00
[rp2040.core1] halted due to debug-request, current mode: Thread
xPSR: 0xf1000000 pc: 0x000000ee msp: 0x20041f00
Info : Found flash device 'win w25q16jv' (ID 0x001540ef)
Info : RP2040 B0 Flash Probe: 2097152 bytes `@0x10000000,` in 32 sectors
Info : Padding image section 2 at 0x10003190 with 112 bytes (bank write end alignment)
Warn : Adding extra erase range, 0x10003200 .. 0x1000ffff
auto erase enabled
wrote 12800 bytes from file /home/dylan/work/RIOT/tests/leds/bin/rpi-pico/tests_leds.elf in 1.516848s (8.241 KiB/s)
verified 12688 bytes in 0.089461s (138.503 KiB/s)
shutdown command invoked
Done flashing
```
### Testing procedure
Flash a `rpi-pico` board using openOCD.
### Issues/PRs references
None.
Co-authored-by: dylad <dylan.laduranty@mesotic.com>
19705: boards/z1: fix broken clock configuration r=maribu a=maribu
### Contribution description
The MSP430F2xx family has on RSEL bit more than the MSP430x1xxx family. The first commit updates the clock calibration accordingly.
df5c319978 from https://github.com/RIOT-OS/RIOT/pull/19558 broke the clock configuration of the Z1 by relying on the incorrect documentation of what clock is actually used. Closely reading the convoluted clock initialization code revealed that no XT2 crystal is present (as also indicated by some comments in `board.c`), contradicting the `#define MSP430_HAS_EXTERNAL_CRYSTAL 1` in the `board.h`.
The second commit should restore behavior (but with calibrated DCO than hard coded magic numbers).
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@posteo.net>
df5c319978 from
https://github.com/RIOT-OS/RIOT/pull/19558 broke the clock
configuration of the Z1 by relying on the incorrect documentation of
what clock is actually used. Closely reading the convoluted clock
initialization code revealed that no XT2 crystal is present (as also
indicated by some comments in `board.c`), contradicting the
`#define MSP430_HAS_EXTERNAL_CRYSTAL 1` in the `board.h`.
This now should restore behavior (but with calibrated DCO than
hard coded magic numbers).
The statement about the missing pin 1 marking on the JTAG header is
not correct. It's just a bit hidden between the JTAG header and the
power selector jumper.
This adds the three general purpose timers on STM32L4 boards in a
central place so that STM32L4 boards can just include it.
Some other families may also have TIM15 and TIM16 and could use this,
but likely some generalization is needed to use this for other
families as well. This can be added later on.
19593: boards/msb-430: add documentation r=maribu a=maribu
### Contribution description
This adds basic documentation, schematics, pinouts, and info how to get started with the `msb-430` board.
19597: sys/shell: Add coreclk command to shell_cmd_sys r=maribu a=maribu
### Contribution description
The coreclk shell command now prints the CPU frequency in Hz, which can be useful for boards with RC generated CPU frequency (e.g. RP2040, FE310, or MPS430Fx1xx MCUs allow this) which may quite a bit off the target frequency.
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Provide a common clock initialization driver rather than leaving
clock initialization to the boards code. A declarative description of
the board's clock configuration using a struct does still allow to
fine-tune settings. In addition, a board is still allowed to just
provide a custom `void clock_init(void)` if there really is the need
to do crazy things.
19552: tests: move all periph applications to their own periphs/ folder r=gschorcht a=aabadie
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
19548: boards/telosb: minor clean ups r=maribu a=maribu
### Contribution description
This cleans up the documentation and the header files of the TelosB board. It is supposed to not changed the generated firmware (except for debug symbols).
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
19523: boards/iotlab-m3: enable l3g4200d_ng r=benpicco a=benpicco
19527: drivers/sdcard_spi: small cleanup r=benpicco a=gschorcht
### Contribution description
This PR provides a small cleanup:
- the copy of `sdcard_spi_params_t` is removed (commit bfc2a51f70)
- the documentation was changed to fit the 100 characters per line. (commit 36f0162b34)
It is not necessary to hold a complete copy `sdcard_spi_params_t` in the device descriptor. Constant parameters can be used directly from ROM instead. This saves 24 bytes of RAM.
### Testing procedure
Use any board with SD Card SPI interface. The driver test should still work, for example:
```
BOARD=esp32-wrover-kit make -j8 -C tests/driver_sdcard_spi flash term
```
```
main(): This is RIOT! (Version: 2023.07-devel-176-g7213c-drivers/sdcard_spi_cleanup)
SD-card spi driver test application
insert SD-card and use 'init' command to set card to spi mode
WARNING: using 'write' or 'copy' commands WILL overwrite data on your sd-card and
almost for sure corrupt existing filesystems, partitions and contained data!
> init
Initializing SD-card at SPI_0...
[OK]
>
```
### Issues/PRs references
19530: sys/xtimer: add missing "modules.h" include to `xtimer.h` r=benpicco a=kaspar030
19532: tests/unittests: tests-core-mbox: add missing `container.h` include r=benpicco a=kaspar030
19533: core: move macros/math.h to core/lib/include/macros r=benpicco a=kaspar030
19535: nanocoap_sock: defuse nanocoap_sock_get() API footgun r=benpicco a=benpicco
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Kaspar Schleiser <kaspar@schleiser.de>
19526: boards/arduino-mkrwan1300: update board name to correct one r=aabadie a=FlapKap
Co-authored-by: Kasper Hjort Berthelsen <kasper.berthelsen@hotmail.com>
19516: cpu/rpx0xx: add initial ADC support r=dylad a=dylad
### Contribution description
This PR adds initial support for RP2040 ADC peripheral.
It is rather minimalist, and only use oneshot trigger to perform a single acquisition.
I've tested this PR using a potentiometer connected between GND and 3V3.
GP26, GP27, GP28 has been tested.
### Testing procedure
Select `ADC_RES_12BIT` and flash `tests/periph_adc`
`make BOARD=rpi-pico -C tests/periph_adc`
### Issues/PRs references
None.
Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
19447: boards/nucleo-f429zi: Provide 2nd timer r=benpicco a=maribu
### Contribution description
- Add a common timer config with two (instead of only one) timer using TIM2 + TIM5
- Mostly copy-pasting the cfg_timer_tim2.h and cfg_timer_tim5.h together
- Make use of that for the `nucleo-f429zi`
### Testing procedure
E.g. `tests/periph_timer`, but also grepping for TIM2 and TIM5 in `boards/nucleo-f429zi/include/periph_conf.h` to detect any conflict e.g. between PWM and timer config.
### Issues/PRs references
None
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
19432: boards/esp32: deduplication in common ESP32x board definitions r=benpicco a=gschorcht
### Contribution description
The PR reduced code duplication in `boards/common/esp32*`.
The PR moves the header files from `boards/common/esp32s3/include` that can be used for all types of ESP32x SoCs to a new common ESP32x board definition which is then included by all common ESP32x board definitions.
### Testing procedure
Green CI.
### Issues/PRs references
19461: drivers/enc28j60: fix ISR routine and bth r=benpicco a=peteut
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Alain Péteut <alain.peteut@yahoo.com>
The board uses the USB OTG HS peripheral together with the on-hip FS PHY. Using the `periph_usbdev_hs` module increases the EP data size for the CDC ECM bulk endpoint to 512 bytes, which does not work for the FS interface. Module `periph_usbdev_hs` is therefore not used.
19417: boards/esp32c3-wemos-mini: add support for Wemos ESP32-C3 mini r=benpicco a=gschorcht
### Contribution description
This PR provides the support for the [Wemos ESP32-C3 mini](https://www.wemos.cc/en/latest/c3/c3_mini.html) board.
### Testing procedure
The board should work for provided features.
The board was already tested with:
- [x] `tests/driver_sht3x` using I2C
- [x] `tests/driver_l3gxxxx` using SPI
- [x] `tests/periph_adc`
- [x] `tests/periph_pwm`
- [ ] `tests/driver_ws281x`
### Issues/PRs references
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
The commit moves the header files from `boards/common/esp32s3/include` that can be used for all types of ESP32x SoCs to a new common ESP32x board module.
