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boards/common/stm32: Add timer config based on TIM2,15,16

This adds the three general purpose timers on STM32L4 boards in a
central place so that STM32L4 boards can just include it.

Some other families may also have TIM15 and TIM16 and could use this,
but likely some generalization is needed to use this for other
families as well. This can be added later on.
This commit is contained in:
Marian Buschsieweke 2023-05-30 13:03:19 +02:00
parent 7c0a4b8390
commit a6e8e1ff7e
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/*
* Copyright (C) 2023 Otto-von-Guericke-Universität Magdeburg
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_common_stm32
* @{
*
* @file
* @brief Common configuration for STM32 Timer peripheral based on TIM2,
* TIM15, and TIM16
*
* @author Marian Buschsieweke <marian.buschsieweke@ovgu.de>
*/
#ifndef CFG_TIMER_TIM2_TIM15_TIM16_H
#define CFG_TIMER_TIM2_TIM15_TIM16_H
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/* Please note: This likely needs some generalization for use in STM32 families
* other than L4. */
/**
* @name Timer configuration
* @{
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR1_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM15,
.max = 0x0000ffff,
.rcc_mask = RCC_APB2ENR_TIM15EN,
.bus = APB2,
.irqn = TIM1_BRK_TIM15_IRQn,
.channel_numof = 2,
},
{
.dev = TIM16,
.max = 0x0000ffff,
.rcc_mask = RCC_APB2ENR_TIM16EN,
.bus = APB2,
.irqn = TIM1_UP_TIM16_IRQn,
.channel_numof = 1,
},
};
#define TIMER_0_ISR isr_tim2 /**< IRQ of timer at idx 0 */
#define TIMER_1_ISR isr_tim1_brk_tim15 /**< IRQ of timer at idx 1 */
#define TIMER_2_ISR isr_tim1_up_tim16 /**< IRQ of timer at idx 2 */
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* CFG_TIMER_TIM2_TIM15_TIM16_H */
/** @} */